Lines Matching full:addr

4 define i8 @test_load_8(ptr %addr) {
7   %val = load atomic i8, ptr %addr seq_cst, align 1
11 define i16 @test_load_16(ptr %addr) {
14   %val = load atomic i16, ptr %addr acquire, align 2
18 define i32 @test_load_32(ptr %addr) {
21   %val = load atomic i32, ptr %addr seq_cst, align 4
25 define i64 @test_load_64(ptr %addr) {
28   %val = load atomic i64, ptr %addr seq_cst, align 8
32 define ptr @test_load_ptr(ptr %addr) {
35   %val = load atomic ptr, ptr %addr seq_cst, align 8
39 define void @test_store_8(ptr %addr) {
42   store atomic i8 0, ptr %addr seq_cst, align 1
46 define void @test_store_16(ptr %addr) {
49   store atomic i16 0, ptr %addr seq_cst, align 2
53 define void @test_store_32(ptr %addr) {
56   store atomic i32 0, ptr %addr seq_cst, align 4
60 define void @test_store_64(ptr %addr) {
63   store atomic i64 0, ptr %addr seq_cst, align 8
67 define void @test_store_ptr(ptr %addr) {
70   store atomic ptr null, ptr %addr seq_cst, align 8
74 declare i64 @llvm.aarch64.ldxr.p0(ptr %addr)
76 define i8 @test_ldxr_8(ptr %addr) {
80   %val = call i64 @llvm.aarch64.ldxr.p0(ptr elementtype(i8) %addr)
85 define i16 @test_ldxr_16(ptr %addr) {
89   %val = call i64 @llvm.aarch64.ldxr.p0(ptr elementtype(i16) %addr)
94 define i32 @test_ldxr_32(ptr %addr) {
98   %val = call i64 @llvm.aarch64.ldxr.p0(ptr elementtype(i32) %addr)
103 define i64 @test_ldxr_64(ptr %addr) {
107   %val = call i64 @llvm.aarch64.ldxr.p0(ptr elementtype(i64) %addr)
111 declare i64 @llvm.aarch64.ldaxr.p0(ptr %addr)
113 define i8 @test_ldaxr_8(ptr %addr) {
117   %val = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i8) %addr)
122 define i16 @test_ldaxr_16(ptr %addr) {
126   %val = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) %addr)
131 define i32 @test_ldaxr_32(ptr %addr) {
135   %val = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) %addr)
140 define i64 @test_ldaxr_64(ptr %addr) {
144   %val = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) %addr)
150 define i32 @test_stxr_8(ptr %addr, i8 %val) {
156   %success = call i32 @llvm.aarch64.stxr.p0(i64 %extval, ptr elementtype(i8) %addr)
160 define i32 @test_stxr_16(ptr %addr, i16 %val) {
166   %success = call i32 @llvm.aarch64.stxr.p0(i64 %extval, ptr elementtype(i16) %addr)
170 define i32 @test_stxr_32(ptr %addr, i32 %val) {
176   %success = call i32 @llvm.aarch64.stxr.p0(i64 %extval, ptr elementtype(i32) %addr)
180 define i32 @test_stxr_64(ptr %addr, i64 %val) {
185   %success = call i32 @llvm.aarch64.stxr.p0(i64 %val, ptr elementtype(i64) %addr)
191 define i32 @test_stlxr_8(ptr %addr, i8 %val) {
197   %success = call i32 @llvm.aarch64.stlxr.p0(i64 %extval, ptr elementtype(i8) %addr)
201 define i32 @test_stlxr_16(ptr %addr, i16 %val) {
207   %success = call i32 @llvm.aarch64.stlxr.p0(i64 %extval, ptr elementtype(i16) %addr)
211 define i32 @test_stlxr_32(ptr %addr, i32 %val) {
217   %success = call i32 @llvm.aarch64.stlxr.p0(i64 %extval, ptr elementtype(i32) %addr)
221 define i32 @test_stlxr_64(ptr %addr, i64 %val) {
226   %success = call i32 @llvm.aarch64.stlxr.p0(i64 %val, ptr elementtype(i64) %addr)
230 define {ptr, i1} @test_cmpxchg_ptr(ptr %addr, ptr %cmp, ptr %new) {
249   %res = cmpxchg ptr %addr, ptr %cmp, ptr %new acq_rel acquire