Lines Matching defs:Operands
433 ParseStatus parseRegister(OperandVector &Operands, RegisterKind Kind);
435 ParseStatus parseAnyRegister(OperandVector &Operands);
446 ParseStatus parseAddress(OperandVector &Operands, MemoryKind MemKind,
449 ParseStatus parsePCRel(OperandVector &Operands, int64_t MinVal,
452 bool parseOperand(OperandVector &Operands, StringRef Mnemonic);
512 SMLoc NameLoc, OperandVector &Operands) override;
514 OperandVector &Operands, MCStreamer &Out,
520 ParseStatus parseGR32(OperandVector &Operands) {
521 return parseRegister(Operands, GR32Reg);
523 ParseStatus parseGRH32(OperandVector &Operands) {
524 return parseRegister(Operands, GRH32Reg);
526 ParseStatus parseGRX32(OperandVector &Operands) {
529 ParseStatus parseGR64(OperandVector &Operands) {
530 return parseRegister(Operands, GR64Reg);
532 ParseStatus parseGR128(OperandVector &Operands) {
533 return parseRegister(Operands, GR128Reg);
535 ParseStatus parseADDR32(OperandVector &Operands) {
537 return parseRegister(Operands, GR32Reg);
539 ParseStatus parseADDR64(OperandVector &Operands) {
541 return parseRegister(Operands, GR64Reg);
543 ParseStatus parseADDR128(OperandVector &Operands) {
546 ParseStatus parseFP32(OperandVector &Operands) {
547 return parseRegister(Operands, FP32Reg);
549 ParseStatus parseFP64(OperandVector &Operands) {
550 return parseRegister(Operands, FP64Reg);
552 ParseStatus parseFP128(OperandVector &Operands) {
553 return parseRegister(Operands, FP128Reg);
555 ParseStatus parseVR32(OperandVector &Operands) {
556 return parseRegister(Operands, VR32Reg);
558 ParseStatus parseVR64(OperandVector &Operands) {
559 return parseRegister(Operands, VR64Reg);
561 ParseStatus parseVF128(OperandVector &Operands) {
564 ParseStatus parseVR128(OperandVector &Operands) {
565 return parseRegister(Operands, VR128Reg);
567 ParseStatus parseAR32(OperandVector &Operands) {
568 return parseRegister(Operands, AR32Reg);
570 ParseStatus parseCR64(OperandVector &Operands) {
571 return parseRegister(Operands, CR64Reg);
573 ParseStatus parseAnyReg(OperandVector &Operands) {
574 return parseAnyRegister(Operands);
576 ParseStatus parseBDAddr32(OperandVector &Operands) {
577 return parseAddress(Operands, BDMem, GR32Reg);
579 ParseStatus parseBDAddr64(OperandVector &Operands) {
580 return parseAddress(Operands, BDMem, GR64Reg);
582 ParseStatus parseBDXAddr64(OperandVector &Operands) {
583 return parseAddress(Operands, BDXMem, GR64Reg);
585 ParseStatus parseBDLAddr64(OperandVector &Operands) {
586 return parseAddress(Operands, BDLMem, GR64Reg);
588 ParseStatus parseBDRAddr64(OperandVector &Operands) {
589 return parseAddress(Operands, BDRMem, GR64Reg);
591 ParseStatus parseBDVAddr64(OperandVector &Operands) {
592 return parseAddress(Operands, BDVMem, GR64Reg);
594 ParseStatus parseLXAAddr64(OperandVector &Operands) {
595 return parseAddress(Operands, LXAMem, GR64Reg);
597 ParseStatus parsePCRel12(OperandVector &Operands) {
598 return parsePCRel(Operands, -(1LL << 12), (1LL << 12) - 1, false);
600 ParseStatus parsePCRel16(OperandVector &Operands) {
601 return parsePCRel(Operands, -(1LL << 16), (1LL << 16) - 1, false);
603 ParseStatus parsePCRel24(OperandVector &Operands) {
604 return parsePCRel(Operands, -(1LL << 24), (1LL << 24) - 1, false);
606 ParseStatus parsePCRel32(OperandVector &Operands) {
607 return parsePCRel(Operands, -(1LL << 32), (1LL << 32) - 1, false);
609 ParseStatus parsePCRelTLS16(OperandVector &Operands) {
610 return parsePCRel(Operands, -(1LL << 16), (1LL << 16) - 1, true);
612 ParseStatus parsePCRelTLS32(OperandVector &Operands) {
613 return parsePCRel(Operands, -(1LL << 32), (1LL << 32) - 1, true);
832 // Parse a register of kind Kind and add it to Operands.
833 ParseStatus SystemZAsmParser::parseRegister(OperandVector &Operands,
909 Operands.push_back(
914 // Parse any type of register (including integers) and add it to Operands.
915 ParseStatus SystemZAsmParser::parseAnyRegister(OperandVector &Operands) {
933 Operands.push_back(SystemZOperand::createImm(Register, StartLoc, EndLoc));
973 Operands.push_back(SystemZOperand::createReg(Kind, RegNo,
1121 // Parse a memory operand and add it to Operands. The other arguments
1123 ParseStatus SystemZAsmParser::parseAddress(OperandVector &Operands,
1229 Operands.push_back(SystemZOperand::createMem(MemKind, RegKind, Base, Disp,
1259 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 8> Operands;
1289 ResTy = parseAnyReg(Operands);
1291 ResTy = parseVR128(Operands);
1293 ResTy = parseBDXAddr64(Operands);
1295 ResTy = parseBDAddr64(Operands);
1297 ResTy = parseBDVAddr64(Operands);
1299 ResTy = parseLXAAddr64(Operands);
1301 ResTy = parsePCRel32(Operands);
1303 ResTy = parsePCRel16(Operands);
1316 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
1327 for (size_t I = 0; I < Operands.size(); I++) {
1328 MCParsedAsmOperand &Operand = *Operands[I];
1439 OperandVector &Operands) {
1445 Operands.push_back(SystemZOperand::createToken(Name, NameLoc));
1450 if (parseOperand(Operands, Name)) {
1463 if (parseOperand(Operands, Name)) {
1500 bool SystemZAsmParser::parseOperand(OperandVector &Operands,
1511 ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic);
1530 Operands.push_back(SystemZOperand::createInvalid(Reg.StartLoc, Reg.EndLoc));
1556 Operands.push_back(SystemZOperand::createInvalid(StartLoc, EndLoc));
1558 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
1563 OperandVector &Operands,
1573 MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
1598 if (ErrorInfo >= Operands.size())
1601 ErrorLoc = ((SystemZOperand &)*Operands[ErrorInfo]).getStartLoc();
1611 ((SystemZOperand &)*Operands[0]).getToken(), FBS, Dialect);
1613 ((SystemZOperand &)*Operands[0]).getLocRange());
1620 ParseStatus SystemZAsmParser::parsePCRel(OperandVector &Operands,
1699 Operands.push_back(SystemZOperand::createImmTLS(Expr, Sym,
1702 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));