Lines Matching defs:MIB
224 void renderImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
226 void renderFImm64(MachineInstrBuilder &MIB, const MachineInstr &I,
566 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpVectorShuffle))
572 MIB.addImm(V);
573 return MIB.constrainAllUses(TII, TRI, RBI);
804 MachineInstrBuilder MIB =
809 return MIB.constrainAllUses(TII, TRI, RBI) &&
834 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSpecConstantOp))
842 return MIB.constrainAllUses(TII, TRI, RBI);
940 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
952 MIB.add(I.getOperand(Index));
953 return MIB.constrainAllUses(TII, TRI, RBI);
964 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode))
968 MIB.addUse(SReg);
970 return MIB.constrainAllUses(TII, TRI, RBI);
1023 MachineInstrBuilder &MIB) {
1033 MIB.addImm(SpvMemOp);
1035 MIB.addImm(MemOp->getAlign().value());
1039 static void addMemoryOperands(uint64_t Flags, MachineInstrBuilder &MIB) {
1047 MIB.addImm(SpvMemOp);
1074 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad))
1082 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB);
1084 addMemoryOperands(*I.memoperands_begin(), MIB);
1086 return MIB.constrainAllUses(TII, TRI, RBI);
1117 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpStore))
1124 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB);
1126 addMemoryOperands(*I.memoperands_begin(), MIB);
1128 return MIB.constrainAllUses(TII, TRI, RBI);
1199 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCopyMemorySized))
1204 addMemoryOperands(*I.memoperands_begin(), MIB);
1205 Result &= MIB.constrainAllUses(TII, TRI, RBI);
1206 if (ResVReg.isValid() && ResVReg != MIB->getOperand(0).getReg())
1207 Result &= BuildCOPY(ResVReg, MIB->getOperand(0).getReg(), I);
1278 auto MIB =
1284 Res |= MIB.constrainAllUses(TII, TRI, RBI);
1344 auto MIB =
1349 MIB.addUse(I.getOperand(i).getReg());
1350 bool Result = MIB.constrainAllUses(TII, TRI, RBI);
1356 auto MIB =
1362 Result &= MIB.constrainAllUses(TII, TRI, RBI);
1520 MachineInstrBuilder MIB = buildSpecConstantOp(
1523 GR.add(MIB.getInstr(), MF, Tmp);
1524 return MIB;
1570 MachineInstrBuilder MIB = buildConstGenericPtr(I, SrcPtr, SrcPtrTy);
1571 return MIB.constrainAllUses(TII, TRI, RBI) &&
1573 I, ResVReg, MIB->getOperand(0).getReg(),
2332 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
2338 MIB.addUse(I.getOperand(i).getReg());
2339 return MIB.constrainAllUses(TII, TRI, RBI);
2366 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
2372 MIB.addUse(OpReg);
2373 return MIB.constrainAllUses(TII, TRI, RBI);
2433 void SPIRVInstructionSelector::renderFImm64(MachineInstrBuilder &MIB,
2439 addNumImm(FPImm->getValueAPF().bitcastToAPInt(), MIB);
2442 void SPIRVInstructionSelector::renderImm32(MachineInstrBuilder &MIB,
2447 addNumImm(I.getOperand(1).getCImm()->getValue(), MIB);
2701 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI))
2706 addNumImm(Imm, MIB);
2707 return MIB.constrainAllUses(TII, TRI, RBI);
2743 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeInsert))
2751 MIB.addImm(foldImm(I.getOperand(i), MRI));
2752 return MIB.constrainAllUses(TII, TRI, RBI);
2759 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract))
2764 MIB.addImm(foldImm(I.getOperand(i), MRI));
2765 return MIB.constrainAllUses(TII, TRI, RBI);
2900 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpUndef))
2903 return MIB.constrainAllUses(TII, TRI, RBI);
2917 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))
2923 MIB.addUse(OpReg);
2925 return MIB.constrainAllUses(TII, TRI, RBI);
2928 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpName));
2929 MIB.addUse(I.getOperand(I.getNumExplicitDefs() + 1).getReg());
2932 MIB.addImm(I.getOperand(i).getImm());
2934 return MIB.constrainAllUses(TII, TRI, RBI);
2937 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSwitch));
2940 MIB.addReg(I.getOperand(i).getReg());
2942 addNumImm(I.getOperand(i).getCImm()->getValue(), MIB);
2944 MIB.addMBB(I.getOperand(i).getMBB());
2948 return MIB.constrainAllUses(TII, TRI, RBI);
2951 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpLoopMerge));
2954 MIB.addMBB(I.getOperand(i).getMBB());
2956 MIB.addImm(SPIRV::SelectionControl::None);
2957 return MIB.constrainAllUses(TII, TRI, RBI);
2960 auto MIB =
2964 MIB.addMBB(I.getOperand(1).getMBB());
2965 MIB.addImm(getSelectionOperandForImm(I.getOperand(2).getImm()));
2966 return MIB.constrainAllUses(TII, TRI, RBI);
3285 MachineInstrBuilder MIB = BuildMI(*InsertionPoint.getParent(), InsertionPoint,
3292 MIB.addUse(ComponentReg);
3293 return MIB.constrainAllUses(TII, TRI, RBI);
3408 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
3417 if (!MIB.constrainAllUses(TII, TRI, RBI))
3508 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
3518 MIB.addImm(J);
3521 if (!MIB.constrainAllUses(TII, TRI, RBI))
3524 MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
3534 MIB.addImm(J);
3536 if (!MIB.constrainAllUses(TII, TRI, RBI))
3740 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpPhi))
3745 MIB.addUse(I.getOperand(i + 0).getReg());
3746 MIB.addMBB(I.getOperand(i + 1).getMBB());
3748 bool Res = MIB.constrainAllUses(TII, TRI, RBI);
3749 MIB->setDesc(TII.get(TargetOpcode::PHI));
3750 MIB->removeOperand(1);
3962 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract))
3967 return Result && MIB.constrainAllUses(TII, TRI, RBI);