Lines Matching defs:Exiting

244   MachineBasicBlock *Exiting = Dec->getParent();
245   assert((Preheader && Exiting) &&
270   BuildMI(*Exiting, Dec, Dec->getDebugLoc(), TII->get(ADDIOpcode), ADDIDef)
275   if (ML->isLoopLatch(Exiting)) {
277     // Preheader and the other one is loop latch Exiting. In hardware loop
282     PHIMIB.addReg(ADDIDef).addMBB(Exiting);
302       BuildMI(*Exiting, Dec, Dec->getDebugLoc(), TII->get(CMPOpcode), CMPDef)
306   BuildMI(*Exiting, Dec, Dec->getDebugLoc(), TII->get(TargetOpcode::COPY),
321   MachineBasicBlock *Exiting = Dec->getParent();
324   assert((Preheader && Exiting) &&
353   BuildMI(*Exiting, &*BrInstr, BrInstr->getDebugLoc(), TII->get(Opcode))