Lines Matching defs:SrcVT

181   unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
182   bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
185   bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
187   bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
188   bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
190   bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1003   EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
1006   if (SrcVT != MVT::f32 || DestVT != MVT::f64)
1082   EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
1085   if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1105   MVT DstVT, SrcVT;
1118   if (!isTypeLegal(SrcTy, SrcVT))
1121   if (SrcVT != MVT::f32 && SrcVT != MVT::f64)
1132   unsigned Opc = (SrcVT == MVT::f32) ? Mips::TRUNC_W_S : Mips::TRUNC_W_D32;
1216       MVT SrcVT = ArgVT;
1217       ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1224       MVT SrcVT = ArgVT;
1225       ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1788   EVT SrcVT, DestVT;
1789   SrcVT = TLI.getValueType(DL, Op->getType(), true);
1792   if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
1825   MVT SrcVT = SrcEVT.getSimpleVT();
1829   if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1835 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1838   switch (SrcVT.SimpleTy) {
1854 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1856   switch (SrcVT.SimpleTy) {
1869 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1874     return emitIntSExt32r2(SrcVT, SrcReg, DestVT, DestReg);
1875   return emitIntSExt32r1(SrcVT, SrcReg, DestVT, DestReg);
1878 bool MipsFastISel::emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1882   switch (SrcVT.SimpleTy) {
1900 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1902   // FastISel does not have plumbing to deal with extensions where the SrcVT or
1904   // handle (i1/i8/i16/i32 for SrcVT and i8/i16/i32/i64 for DestVT), otherwise
1907       ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && (SrcVT != MVT::i16)))
1910     return emitIntZExt(SrcVT, SrcReg, DestVT, DestReg);
1911   return emitIntSExt(SrcVT, SrcReg, DestVT, DestReg);
1914 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1917   bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);