Lines Matching defs:VA

300                                 const CCValAssign &VA) {
369 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) {
433 const CCValAssign &VA,
442 if (VA.getLocInfo() == CCValAssign::Indirect)
443 ValVT = VA.getLocVT();
445 ValVT = VA.getValVT();
449 int Offset = VA.getLocMemOffset();
450 if (VA.getValVT() == MVT::i8) {
452 } else if (VA.getValVT() == MVT::i16) {
481 if (VA.getLocInfo() == CCValAssign::ZExt) {
483 } else if (VA.getLocInfo() == CCValAssign::SExt) {
494 return VA.isExtInLoc() ? DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val)
502 const CCValAssign &VA,
504 unsigned LocMemOffset = VA.getLocMemOffset();
645 CCValAssign &VA = ArgLocs[i];
646 EVT RegVT = VA.getLocVT();
651 switch (VA.getLocInfo()) {
670 SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT());
680 if (VA.isRegLoc()) {
681 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
683 assert(VA.isMemLoc());
689 LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags));
724 CCValAssign &VA = ArgLocs[i];
725 if (VA.isRegLoc())
727 assert(VA.isMemLoc());
734 int32_t Offset = VA.getLocMemOffset() + FPDiff;
735 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8;
741 SDValue Source = DAG.getIntPtrConstant(VA.getLocMemOffset(), DL);
895 CCValAssign &VA = RVLocs[i];
896 EVT CopyVT = VA.getLocVT();
899 Chain = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), CopyVT, InGlue)
903 if (VA.isExtInLoc() && VA.getValVT().getScalarType() == MVT::i1)
904 Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val);
939 CCValAssign &VA = ArgLocs[i];
940 assert(VA.getValNo() != LastVal && "Same value in different locations");
943 LastVal = VA.getValNo();
945 if (VA.isRegLoc()) {
946 EVT RegVT = VA.getLocVT();
953 Register Reg = MF.addLiveIn(VA.getLocReg(), RC);
959 if (VA.getLocInfo() == CCValAssign::SExt) {
961 DAG.getValueType(VA.getValVT()));
962 } else if (VA.getLocInfo() == CCValAssign::ZExt) {
964 DAG.getValueType(VA.getValVT()));
965 } else if (VA.getLocInfo() == CCValAssign::BCvt) {
966 ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue);
969 if (VA.isExtInLoc()) {
970 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue);
973 assert(VA.isMemLoc());
974 ArgValue = LowerMemArgument(Chain, CCID, Ins, DL, DAG, VA, MFI, i);
979 if (VA.getLocInfo() == CCValAssign::Indirect)
981 DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, MachinePointerInfo());
1093 CCValAssign &VA = RVLocs[i];
1094 assert(VA.isRegLoc() && "Can only return in registers!");
1099 if (VA.getLocInfo() == CCValAssign::SExt)
1100 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy);
1101 else if (VA.getLocInfo() == CCValAssign::ZExt)
1102 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy);
1103 else if (VA.getLocInfo() == CCValAssign::AExt) {
1105 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy);
1107 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy);
1108 } else if (VA.getLocInfo() == CCValAssign::BCvt)
1109 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy);
1111 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), ValToCopy, Glue);
1113 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
1307 CCValAssign &VA = ArgLocs[i];
1310 if (VA.getLocInfo() == CCValAssign::Indirect)
1312 if (!VA.isRegLoc()) {
1313 if (!MatchingStackOffset(Arg, VA.getLocMemOffset(), Flags, MFI, MRI,
1314 TII, VA))
1335 CCValAssign &VA = ArgLocs[i];
1336 if (!VA.isRegLoc())
1338 Register Reg = VA.getLocReg();