Lines Matching defs:Insn

89 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address,
92 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address,
95 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address,
98 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Insn,
102 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address,
105 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address,
108 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn,
112 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn,
116 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address,
119 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn,
123 static DecodeStatus decodeMemri(MCInst &Inst, unsigned Insn, uint64_t Address,
126 static DecodeStatus decodeFBRk(MCInst &Inst, unsigned Insn, uint64_t Address,
129 static DecodeStatus decodeCondBranch(MCInst &Inst, unsigned Insn,
133 static DecodeStatus decodeLoadStore(MCInst &Inst, unsigned Insn,
139 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address,
142 addr |= fieldFromInstruction(Insn, 0, 4);
143 addr |= fieldFromInstruction(Insn, 9, 2) << 4;
144 unsigned reg = fieldFromInstruction(Insn, 4, 5);
152 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address,
155 addr |= fieldFromInstruction(Insn, 0, 4);
156 addr |= fieldFromInstruction(Insn, 9, 2) << 4;
157 unsigned reg = fieldFromInstruction(Insn, 4, 5);
165 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address,
167 unsigned addr = fieldFromInstruction(Insn, 3, 5);
168 unsigned b = fieldFromInstruction(Insn, 0, 3);
183 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address,
185 unsigned d = fieldFromInstruction(Insn, 4, 5);
192 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address,
194 if (decodeFRd(Inst, Insn, Address, Decoder) == MCDisassembler::Fail)
200 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn,
203 unsigned d = fieldFromInstruction(Insn, 4, 3) + 16;
204 unsigned r = fieldFromInstruction(Insn, 0, 3) + 16;
214 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn,
217 unsigned r = fieldFromInstruction(Insn, 4, 4) * 2;
218 unsigned d = fieldFromInstruction(Insn, 0, 4) * 2;
228 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address,
230 unsigned d = fieldFromInstruction(Insn, 4, 2) * 2 + 24; // starts at r24:r25
232 k |= fieldFromInstruction(Insn, 0, 4);
233 k |= fieldFromInstruction(Insn, 6, 2) << 4;
244 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn,
247 unsigned rd = fieldFromInstruction(Insn, 4, 4) + 16;
248 unsigned rr = fieldFromInstruction(Insn, 0, 4) + 16;
258 static DecodeStatus decodeMemri(MCInst &Inst, unsigned Insn, uint64_t Address,
263 if (Insn > 127)
268 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30));
270 Inst.addOperand(MCOperand::createImm(Insn & 0x3f));
275 static DecodeStatus decodeFBRk(MCInst &Inst, unsigned Insn, uint64_t Address,
278 switch (Insn & 0xf000) {
289 int16_t Offset = ((int16_t)((Insn & 0xfff) << 4)) >> 3;
294 static DecodeStatus decodeCondBranch(MCInst &Inst, unsigned Insn,
304 int16_t Offset = ((int16_t)((Insn & 0x3f8) << 6)) >> 8;
307 auto NotAlias = [&Insn](const std::pair<unsigned, unsigned> &I) {
308 return (Insn & 0x407) != I.first;
320 Inst.setOpcode(Insn & 0x400 ? AVR::BRBCsk : AVR::BRBSsk);
321 Inst.addOperand(MCOperand::createImm(Insn & 7));
328 static DecodeStatus decodeLoadStore(MCInst &Inst, unsigned Insn,
332 unsigned RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f];
335 if ((Insn & 0xf000) == 0x8000) {
336 unsigned RegBase = (Insn & 0x8) ? AVR::R29R28 : AVR::R31R30;
337 unsigned Offset = Insn & 7; // We need not consider offset > 7.
338 if ((Insn & 0x200) == 0) { // Decode LDD.
370 if ((Insn & 0xfc00) != 0x9000 || (Insn & 0xf) == 0)
375 switch (Insn & 0xc) {
390 switch (Insn & 0x203) {
418 if ((Insn & 0x200) == 0) { // This is a load instruction.
434 uint64_t &Size, uint32_t &Insn) {
441 Insn = (Bytes[0] << 0) | (Bytes[1] << 8);
447 uint64_t &Size, uint32_t &Insn) {
455 Insn =
477 uint32_t Insn;
483 Result = readInstruction16(Bytes, Address, Size, Insn);
490 Result = decodeInstruction(DecoderTableAVRTiny16, Instr, Insn, Address,
497 Result = decodeInstruction(getDecoderTable(Size), Instr, Insn, Address,
504 Result = decodeLoadStore(Instr, Insn, Address, this);
511 Result = readInstruction32(Bytes, Address, Size, Insn);
516 Result = decodeInstruction(getDecoderTable(Size), Instr, Insn, Address,