Lines Matching defs:Sel

92                          const MachineInstr &Sel, const MachineInstr &And) {
94   SlotIndex SelIdx = LIS->getInstructionIndex(Sel).getRegSlot();
165   auto *Sel = TRI->findReachingDef(SelReg, Op1->getSubReg(), *Cmp, *MRI, LIS);
166   if (!Sel || Sel->getOpcode() != AMDGPU::V_CNDMASK_B32_e64)
169   if (TII->hasModifiersSet(*Sel, AMDGPU::OpName::src0_modifiers) ||
170       TII->hasModifiersSet(*Sel, AMDGPU::OpName::src1_modifiers))
173   Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0);
174   Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1);
175   MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2);
184   if (isDefBetween(*TRI, LIS, CCReg, *Sel, *And))
189   SlotIndex SelIdx = LIS->getInstructionIndex(*Sel);
198   LLVM_DEBUG(dbgs() << "Folding sequence:\n\t" << *Sel << '\t' << *Cmp << '\t'
251       LLVM_DEBUG(dbgs() << "Erasing: " << *Sel << '\n');
254       LIS->RemoveMachineInstrFromMaps(*Sel);
255       bool ShrinkSel = Sel->getOperand(0).readsReg();
256       Sel->eraseFromParent();