Lines Matching defs:LIS
33 LiveIntervals *LIS;
91 LiveIntervals *LIS, Register Reg,
93 SlotIndex AndIdx = LIS->getInstructionIndex(And).getRegSlot();
94 SlotIndex SelIdx = LIS->getInstructionIndex(Sel).getRegSlot();
97 return isDefBetween(LIS->getInterval(Reg), AndIdx, SelIdx);
100 if (isDefBetween(LIS->getRegUnit(Unit), AndIdx, SelIdx))
132 TRI->findReachingDef(CondReg, AMDGPU::NoSubRegister, *I, *MRI, LIS);
148 auto *Cmp = TRI->findReachingDef(CmpReg, CmpSubReg, *And, *MRI, LIS);
165 auto *Sel = TRI->findReachingDef(SelReg, Op1->getSubReg(), *Cmp, *MRI, LIS);
184 if (isDefBetween(*TRI, LIS, CCReg, *Sel, *And))
189 SlotIndex SelIdx = LIS->getInstructionIndex(*Sel);
190 LiveInterval *SelLI = &LIS->getInterval(SelReg);
212 SlotIndex AndIdx = LIS->ReplaceMachineInstrInMaps(*And, *Andn2);
219 SlotIndex CmpIdx = LIS->getInstructionIndex(*Cmp);
221 LiveInterval &CCLI = LIS->getInterval(CCReg);
224 LIS->removeInterval(CCReg);
225 LIS->createAndComputeVirtRegInterval(CCReg);
228 LIS->removeAllRegUnitsForPhysReg(CCReg);
232 LiveInterval *CmpLI = CmpReg.isVirtual() ? &LIS->getInterval(CmpReg) : nullptr;
241 LIS->removeVRegDefAt(*CmpLI, CmpIdx.getRegSlot());
242 LIS->RemoveMachineInstrFromMaps(*Cmp);
248 LIS->shrinkToUses(SelLI);
253 LIS->removeVRegDefAt(*SelLI, SelIdx.getRegSlot());
254 LIS->RemoveMachineInstrFromMaps(*Sel);
260 LIS->shrinkToUses(SelLI);
321 SlotIndex StartIdx = LIS->getInstructionIndex(SaveExecMI);
322 SlotIndex EndIdx = LIS->getInstructionIndex(*AndExecMI);
324 LiveRange &RegUnit = LIS->getRegUnit(Unit);
330 LIS->removeInterval(SavedExecReg);
331 LIS->removeInterval(DstReg);
335 LIS->RemoveMachineInstrFromMaps(*AndExecMI);
338 LIS->createAndComputeVirtRegInterval(DstReg);
351 LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
423 LIS->RemoveMachineInstrFromMaps(*I);
466 LIS->RemoveMachineInstrFromMaps(*I);
469 LIS->removeInterval(SavedExec);
480 LIS->removeInterval(Reg);
482 LIS->createAndComputeVirtRegInterval(Reg);
484 LIS->removeAllRegUnitsForPhysReg(Reg);