Lines Matching defs:AddrReg

122     const MachineOperand *AddrReg[MaxAddressRegs];
134         if (AddrReg[i]->isImm() || AddrRegNext.isImm()) {
135           if (AddrReg[i]->isImm() != AddrRegNext.isImm() ||
136               AddrReg[i]->getImm() != AddrRegNext.getImm()) {
144         if (AddrReg[i]->getReg() != AddrRegNext.getReg() ||
145             AddrReg[i]->getSubReg() != AddrRegNext.getSubReg()) {
154         const MachineOperand *AddrOp = AddrReg[i];
885     AddrReg[J] = &I->getOperand(AddrIdx[J]);
1333   const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr);
1350   Register BaseReg = AddrReg->getReg();
1351   unsigned BaseSubReg = AddrReg->getSubReg();
1363         .addReg(AddrReg->getReg(), 0, BaseSubReg)
1408   const MachineOperand *AddrReg =
1432   Register BaseReg = AddrReg->getReg();
1433   unsigned BaseSubReg = AddrReg->getSubReg();
1445         .addReg(AddrReg->getReg(), 0, BaseSubReg)