Lines Matching defs:MVT

247   MVT VT = RealVT.getSimpleVT();
250     if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
279 Register FastISel::materializeConstant(const Value *V, MVT VT) {
331 Register FastISel::materializeRegForValue(const Value *V, MVT VT) {
383 Register FastISel::getRegForGEPIndex(MVT PtrVT, const Value *Idx) {
445   if (VT == MVT::Other || !VT.isSimple())
454     // MVT::i1 is special. Allow AND, OR, or XOR because they
456     if (VT == MVT::i1 && ISD::isBitwiseLogicOp(ISDOpcode))
545   MVT VT = TLI.getValueType(DL, I->getType()).getSimpleVT();
767   MVT ValueType;
770     if (ValueType == MVT::Other)
1011     MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT);
1489   if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other ||
1519   if (SrcEVT == MVT::Other || DstEVT == MVT::Other ||
1524   MVT SrcVT = SrcEVT.getSimpleVT();
1525   MVT DstVT = DstEVT.getSimpleVT();
1552   if (ETy == MVT::Other || !TLI.isTypeLegal(ETy))
1556   MVT Ty = ETy.getSimpleVT();
1764   MVT VT = RealVT.getSimpleVT();
1765   if (!TLI.isTypeLegal(VT) && VT != MVT::i1)
1863       return fastEmit_(MVT::Other, MVT::Other, ISD::TRAP) != 0;
1952 unsigned FastISel::fastEmit_(MVT, MVT, unsigned) { return 0; }
1954 unsigned FastISel::fastEmit_r(MVT, MVT, unsigned, unsigned /*Op0*/) {
1958 unsigned FastISel::fastEmit_rr(MVT, MVT, unsigned, unsigned /*Op0*/,
1963 unsigned FastISel::fastEmit_i(MVT, MVT, unsigned, uint64_t /*Imm*/) {
1967 unsigned FastISel::fastEmit_f(MVT, MVT, unsigned,
1972 unsigned FastISel::fastEmit_ri(MVT, MVT, unsigned, unsigned /*Op0*/,
1981 Register FastISel::fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0,
1982                                 uint64_t Imm, MVT ImmType) {
2229 Register FastISel::fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0,
2243 Register FastISel::fastEmitZExtFromI1(MVT VT, unsigned Op0) {
2286       if (VT == MVT::Other || !TLI.isTypeLegal(VT)) {
2288         if (!(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) {