Lines Matching defs:cycle
1552 /// for each cycle that is required. When adding a new instruction, we attempt
1787 // Add the artificial dependencies if it does not form a cycle.
2452 // When scheduling a Phi it is better to start at the late cycle and
2791 dbgs() << "\tinsert at cycle " << curCycle << " ";
2806 dbgs() << "\tfailed to insert at cycle " << curCycle << " ";
2813 // Return the cycle of the earliest scheduled instruction in the chain.
2837 // Return the cycle of the latest scheduled instruction in the chain.
2882 for (int cycle = getFirstCycle(); cycle <= LastCycle; ++cycle) {
2883 for (SUnit *I : getInstructions(cycle)) {
2892 int EarlyStart = cycle + IE.getLatency() - IE.getDistance() * II;
2905 int LateStart = cycle - OE.getLatency() + OE.getDistance() * II;
2916 *MinLateStart = std::min(*MinLateStart, cycle);
2922 /// Order the instructions within a cycle so that the definitions occur
3002 // so may have nodes in same cycle with Anti/Output dependent on HW regs.
3178 << ") is not pipelined; moving from cycle " << OldCycle
3192 // cycle, orderDependence does not guarantee def/use ordering, so that
3194 // earlier and same-cycle use to be more robust.)
3326 // same cycle but occurs later in the serialized order.
3386 for (int cycle = getFirstCycle(); cycle <= getFinalCycle(); ++cycle) {
3390 ScheduledInstrs[cycle + (stage * InitiationInterval)];
3392 ScheduledInstrs[cycle].push_front(SU);
3398 for (int cycle = getFinalCycle() + 1; cycle <= LastCycle; ++cycle)
3399 ScheduledInstrs.erase(cycle);
3406 // Reorder the instructions in each cycle to fix and improve the
3428 // Iterate over each cycle.
3429 for (int cycle = getFirstCycle(); cycle <= getFinalCycle(); ++cycle) {
3430 // Iterate over each instruction in the cycle.
3431 const_sched_iterator cycleInstrs = ScheduledInstrs.find(cycle);
3433 os << "cycle " << cycle << " (" << stageScheduled(CI) << ") ";
3626 // DFA is needed for each cycle.