Lines Matching defs:page_sz
48 size_t page_sz, int flags, int reserve_flags)
77 requested_addr = RTE_PTR_ALIGN(requested_addr, page_sz);
90 requested_addr == RTE_PTR_ALIGN(requested_addr, page_sz) &&
92 page_sz == system_page_sz;
95 map_sz = no_align ? *size : *size + page_sz;
105 *size -= page_sz;
110 next_baseaddr = RTE_PTR_ADD(next_baseaddr, page_sz);
125 RTE_PTR_ALIGN(mapped_addr, page_sz);
201 uint64_t page_sz, int n_segs, int socket_id, bool heap)
210 msl->page_sz = page_sz;
217 socket_id, page_sz >> 10);
223 eal_memseg_list_init(struct rte_memseg_list *msl, uint64_t page_sz,
228 snprintf(name, sizeof(name), MEMSEG_LIST_FMT, page_sz >> 10, socket_id,
232 msl, name, page_sz, n_segs, socket_id, heap);
238 size_t page_sz, mem_sz;
241 page_sz = msl->page_sz;
242 mem_sz = page_sz * msl->memseg_arr.len;
245 msl->base_va, &mem_sz, page_sz, 0, reserve_flags);
272 size_t page_sz = msl->page_sz;
284 ms->hugepage_sz = page_sz;
286 ms->len = page_sz;
290 addr = RTE_PTR_ADD(addr, page_sz);
313 ms_idx = RTE_PTR_DIFF(addr, msl->base_va) / msl->page_sz;
412 *total_len += msl->memseg_arr.count * msl->page_sz;
695 len = n_segs * msl->page_sz;
904 unsigned int n_pages, size_t page_sz)
910 if (va_addr == NULL || page_sz == 0 || len == 0 ||
911 !rte_is_power_of_2(page_sz) ||
912 RTE_ALIGN(len, page_sz) != len ||
913 ((len / page_sz) != n_pages && iova_addrs != NULL) ||
914 !rte_is_aligned(va_addr, page_sz)) {
937 n = len / page_sz;
939 page_sz, "extmem", socket_id) == NULL) {
1025 size_t page_sz = rte_mem_page_size();
1072 if (rte_mem_unmap(mcfg, RTE_ALIGN(sizeof(*mcfg), page_sz)) != 0)
1196 size_t page_sz;
1221 page_sz = (size_t)mz->hugepage_sz;
1222 cur_addr = RTE_PTR_ALIGN_FLOOR(mz->addr, page_sz);
1225 ms_idx = RTE_PTR_DIFF(mz->addr, msl->base_va) / page_sz;
1228 rte_tel_data_add_dict_uint(d, "Hugepage_size", page_sz);
1234 cur_addr = RTE_PTR_ADD(cur_addr, page_sz);