Some AMD Ryzen xHCI controllers need a bit more time to transition from D3
into D0. Fixes xhci(4) issues after resume.

ok deraadt@

Reduce dmesg spam and only print about resource conflicts for resources
that are actually enabled.

ok dlg@, deraadt@

Grammar fixes in comments.

Remove last queue(3) *_END() usage from tree

queue(3) NOTES says they're deprecated and expand to NULL; indeed.

No object change.
OK kettenis mvs

Only probe device 0 on PCI busses corresponding to a PCIe root port or a
PCIe switch/bridge downstream port. This fixes an issue where a device would
show up 32 times if the PCIe port does not termi

Only probe device 0 on PCI busses corresponding to a PCIe root port or a
PCIe switch/bridge downstream port. This fixes an issue where a device would
show up 32 times if the PCIe port does not terminate configuration requests
targeted at device numbers 1-31 as required by the spec and the PCIe device
does not filter requests based on its own device number. Linux, NetBSD and
FreeBSD (to some extent) already do this.

This should fix an issue seen on Ampere Altra where the BMC's PCI bridge
and USB controller would show up multiple times.

ok jsg@

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Constify struct cfattach.

Compensate for i386 pcitag_t union
ok jsg kettenis

Restrict the pci(4) ioctl interface to devices detected by the kernel.
This fixes issues on the M1 Macs where the PCI probe done by Xorg
breaks the WiFi chip.

ok patrick@

addres -> address

pci_intr_msix_count() is the function that drivers using multiple MSI-X
vectors use to decide whether to use MSI-X, so make it return 0 if MSI
is not enabled for the device.

fixes problems with ix(4

pci_intr_msix_count() is the function that drivers using multiple MSI-X
vectors use to decide whether to use MSI-X, so make it return 0 if MSI
is not enabled for the device.

fixes problems with ix(4) on older amd64 hardware and current riscv64
ok kettenis@ dlg@

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Add a function to scan for PCI Express extended capabilities.

From jordan@, with a few more tweaks by myself.

byteswap vpd data going out to userland.

makes pcidump output look more plausible on big endian boxes.

ok jmatthew@

let userland read vpd info from a pci device.

reading vpd stuff is useful when you're trying to get support
information about a pci device, eg, if you want a serial number,
or firmware versions, or

let userland read vpd info from a pci device.

reading vpd stuff is useful when you're trying to get support
information about a pci device, eg, if you want a serial number,
or firmware versions, or specific part name or number, it's likely
available via vpd. also, im sick of having the diff in my tree.

the vpd info is not accessed as bytes read from a capability, but
is read via a register in the capability. the same register also
supports updating or writing vpd info, which sounds like a bad idea
to let userland have raw access to.

this adds an ioctl so that userland can ask the kernel to read via
the vpd register on its behalf. this ensures that the only access
is read access, and it's sanity checked.

tested by hrvoje popovski on many devices.
ok jmatthew@

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add pci_intr_msix_count(), to get the msi-x table size for a device.

this basically tells us the number of interrupt vectors a pci device
is able to support. it relies on the arch having __HAVE_PCI_

add pci_intr_msix_count(), to get the msi-x table size for a device.

this basically tells us the number of interrupt vectors a pci device
is able to support. it relies on the arch having __HAVE_PCI_MSIX
defined. without that define it always returns 0.

i think this originally came from haesbart via patrick@ as amd64
md code in the middle of a diff from 2018(!), but i've tweaked it
to make it MI.

tested on sparc64 and amd64 with various drivers.

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pci(4): PCIOCSETVGA: tsleep(9) -> tsleep_nsec(9); ok mpi@

Implement suspend/resume support for MSI-X interrupts. Loosely based on
an earlier diff from sf@.

ok jmatthew@, also ok mlarkin@, sf@ for a slightly different earlier version

disambiguate memory extent conflicts for membars and rom addresses

there's some more work to do in this space, but this helps us start.

ok kettenis@

Add function to convert a PCI device "tag" into a PCIe requester ID.

ok patrick@, mlarkin@, deraadt@

Don't report a bus conflict for bridges that are left (partly) unconfigured by
the system firmware.

simple size for free()

Previous change wasn't quite right and broke "classic' PCI sparc64 machines.
Undo the code rearrangement in rev. 1.108 but keep the sparc64-specific code
dealing with non-prefetchable 64-bit BARs.

F

Previous change wasn't quite right and broke "classic' PCI sparc64 machines.
Undo the code rearrangement in rev. 1.108 but keep the sparc64-specific code
dealing with non-prefetchable 64-bit BARs.

Found out the hard way by stsp@

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Seems Sun^H^H^HOracle is doing something naughty and (deliberately) puts
non-prefetchable BARs of the onboard mpii(4) behind a prefetchable memory
range on the bridge it sists behind. Since we rely

Seems Sun^H^H^HOracle is doing something naughty and (deliberately) puts
non-prefetchable BARs of the onboard mpii(4) behind a prefetchable memory
range on the bridge it sists behind. Since we rely on the formware to program
BARs for us on sparc64, add a workaround to avoid whacking these BARs and
make the machine panic later when it tries to access the registers.

ok miod@, deraadt@

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Fix some issues with 64-bit BARs behind PCI-PCI bridges.
Actual BARs that have the upper 32-bits set seen in the wild now on a
SPARC T5-2 system.

Tested by many.

Add resource tracking for PCI ROMs.

ok deraadt@

remove uneeded proc.h includes
ok mpi@ kspillner@