History log of /onnv-gate/usr/src/uts/common/sys/cmt.h (Results 1 – 6 of 6)
Revision Date Author Comments
# 11389:dd00b884e84f 23-Dec-2009 Alexander Kolbasov <Alexander.Kolbasov@Sun.COM>

6764832 Provide user-level processor groups observability
6831680 cputrack(1) leaves its victim with unneeded cpc context
6901343 cpc context flag updates are not always atomic
6908152 Dormant thread

6764832 Provide user-level processor groups observability
6831680 cputrack(1) leaves its victim with unneeded cpc context
6901343 cpc context flag updates are not always atomic
6908152 Dormant thread CPC context affects cpu CPC consumers

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# 9892:59a0cc07a7b3 17-Jun-2009 Rafael Vanoni <rafael.vanoni@sun.com>

6847706 ::pg uses cmt class name before reading class, cmt_hint obsolete


# 8906:e559381f1e2b 26-Feb-2009 Eric Saxe <Eric.Saxe@Sun.COM>

PSARC 2008/777 cpupm keyword mode extensions
PSARC 2008/663 CPU Deep Idle Keyword
6567156 bring CPU power awareness to the dispatcher
6700904 deeper C-State support required on follow-ons to Intel Pe

PSARC 2008/777 cpupm keyword mode extensions
PSARC 2008/663 CPU Deep Idle Keyword
6567156 bring CPU power awareness to the dispatcher
6700904 deeper C-State support required on follow-ons to Intel Penryn processor generation microarchitecture
6805661 cmt_root may contain duplicates on UMA systems

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# 8408:7b4e48a75d0c 18-Dec-2008 Eric Saxe <Eric.Saxe@Sun.COM>

6724307 CPU selection bias observed on NUMA/CMT systems
6724296 trips though setfrontdq() can make threads homesick
6724256 root homed threads should participate in cross leaf lgrp CMT load balancing

6724307 CPU selection bias observed on NUMA/CMT systems
6724296 trips though setfrontdq() can make threads homesick
6724256 root homed threads should participate in cross leaf lgrp CMT load balancing
6771377 idle() can get caught up in disp_anywork() on larger systems
6420092 dispatcher can be blinded by idle cpus on large systems

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# 4606:ffcd05844ec5 06-Jul-2007 esaxe

6495401 cpuid based cache hierarchy awareness


# 3434:5142e1d7d0bc 18-Jan-2007 esaxe

6461311 multi-level CMT scheduling optimizations
6509639 cpu0 is not in the right chip_t if its chipid is not zero