#
fe0bf7d4 |
| 10-Feb-2022 |
Matthias Springer <springerm@google.com> |
[mlir][vector][NFC] Use CombiningKindAttr instead of StringAttr
This makes the op consistent with other ops in vector dialect.
Differential Revision: https://reviews.llvm.org/D119343
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#
3c69bc4d |
| 06-Feb-2022 |
River Riddle <riddleriver@gmail.com> |
[mlir][NFC] Remove a few op builders that simply swap parameter order
Differential Revision: https://reviews.llvm.org/D119093
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#
6a8ba318 |
| 25-Jan-2022 |
River Riddle <riddleriver@gmail.com> |
[mlir] Split std.splat into tensor.splat and vector.splat
This is part of the larger effort to split the standard dialect. This will also allow for pruning some additional dependencies on Standard (
[mlir] Split std.splat into tensor.splat and vector.splat
This is part of the larger effort to split the standard dialect. This will also allow for pruning some additional dependencies on Standard (done in a followup).
Differential Revision: https://reviews.llvm.org/D118202
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#
99ef9eeb |
| 31-Jan-2022 |
Matthias Springer <springerm@google.com> |
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://r
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://reviews.llvm.org/D118533
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Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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#
e4853be2 |
| 02-Jan-2022 |
Mehdi Amini <joker.eph@gmail.com> |
Apply clang-tidy fixes for performance-for-range-copy to MLIR (NFC)
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Revision tags: llvmorg-13.0.1-rc1 |
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#
a4830d14 |
| 12-Oct-2021 |
Javier Setoain <javier.setoain@gmail.com> |
[mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of the operations currently present in ArmSVE, like mask generation and basic ari
[mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of the operations currently present in ArmSVE, like mask generation and basic arithmetic instructions. Therefore, this patch also gets rid of those.
Having built-in scalable vector support also simplifies the lowering of scalable vector dialects down to LLVMIR.
Scalable dimensions are indicated with the scalable dimensions between square brackets:
vector<[4]xf32>
Is a scalable vector of 4 single precission floating point elements.
More generally, a VectorType can have a set of fixed-length dimensions followed by a set of scalable dimensions:
vector<2x[4x4]xf32>
Is a vector with 2 scalable 4x4 vectors of single precission floating point elements.
The scale of the scalable dimensions can be obtained with the Vector operation:
%vs = vector.vscale
This change is being discussed in the discourse RFC:
https://llvm.discourse.group/t/rfc-add-built-in-support-for-scalable-vector-types/4484
Differential Revision: https://reviews.llvm.org/D111819
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#
1423e8bf |
| 03-Dec-2021 |
Michal Terepeta <michalt@google.com> |
[mlir][Vector] Support 0-D vectors in `BitCastOp`
The implementation only allows to bit-cast between two 0-D vectors. We could probably support casting from/to vectors like `vector<1xf32>`, but I wa
[mlir][Vector] Support 0-D vectors in `BitCastOp`
The implementation only allows to bit-cast between two 0-D vectors. We could probably support casting from/to vectors like `vector<1xf32>`, but I wasn't convinced that this would be important and it would require breaking the invariant that `BitCastOp` works only on vectors with equal rank.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D114854
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#
73863648 |
| 30-Nov-2021 |
Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> |
Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment"
This reverts commit 29a50c5864ddab283c1ff38694fb5926ce37b39a.
After LLVM lowering, the original patch incorrectly mo
Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment"
This reverts commit 29a50c5864ddab283c1ff38694fb5926ce37b39a.
After LLVM lowering, the original patch incorrectly moved alignment information across an unconstrained GEP operation. This is only correct for some index offsets in the GEP. It seems that the best approach is, in fact, to rely on LLVM to propagate information from the llvm.assume() to users.
Thanks to Thomas Raoux for catching this.
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#
cc311a15 |
| 25-Nov-2021 |
Michal Terepeta <michalt@google.com> |
[mlir][Vector] Support 0-D vectors in `VectorPrintOpConversion`
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D114549
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#
3ff4e5f2 |
| 23-Nov-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][Vector] Thread 0-d vectors through InsertElementOp.
This revision makes concrete use of 0-d vectors to extend the semantics of InsertElementOp.
Reviewed By: dcaballe, pifon2a
Differential R
[mlir][Vector] Thread 0-d vectors through InsertElementOp.
This revision makes concrete use of 0-d vectors to extend the semantics of InsertElementOp.
Reviewed By: dcaballe, pifon2a
Differential Revision: https://reviews.llvm.org/D114388
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#
e7026aba |
| 23-Nov-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][Vector] Thread 0-d vectors through ExtractElementOp.
This revision starts making concrete use of 0-d vectors to extend the semantics of ExtractElementOp. In the process a new VectorOfAnyRank
[mlir][Vector] Thread 0-d vectors through ExtractElementOp.
This revision starts making concrete use of 0-d vectors to extend the semantics of ExtractElementOp. In the process a new VectorOfAnyRank Tablegen OpBase.td is added to allow progressive transition to supporting 0-d vectors by gradually opting in.
Differential Revision: https://reviews.llvm.org/D114387
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#
ee80ffbf |
| 15-Nov-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion.
FMAOp -> LLVM conversion is done progressively by peeling off 1 dimension from FMAOp at each pattern iteration. Add the
[mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion.
FMAOp -> LLVM conversion is done progressively by peeling off 1 dimension from FMAOp at each pattern iteration. Add the recursively bounded property declaration to the pattern so that the rewriter can apply it multiple times.
Without this, FMAOps with 3+D do not lower to LLVM.
Differential Revision: https://reviews.llvm.org/D113886
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#
015192c6 |
| 27-Oct-2021 |
River Riddle <riddleriver@gmail.com> |
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
The current implementation invokes materializations whenever an input operand does not have a mapping for the de
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
The current implementation invokes materializations whenever an input operand does not have a mapping for the desired type, i.e. it requires materialization at the earliest possible point. This conflicts with goal of dialect conversion (and also the current documentation) which states that a materialization is only required if the materialization is supposed to persist after the conversion process has finished.
This revision refactors this such that whenever a target materialization "might" be necessary, we insert an unrealized_conversion_cast to act as a temporary materialization. This allows for deferring the invocation of the user materialization hooks until the end of the conversion process, where we actually have a better sense if it's actually necessary. This has several benefits:
* In some cases a target materialization hook is no longer necessary When performing a full conversion, there are some situations where a temporary materialization is necessary. Moving forward, these users won't need to provide any target materializations, as the temporary materializations do not require the user to provide materialization hooks.
* getRemappedValue can now handle values that haven't been converted yet Before this commit, it wasn't well supported to get the remapped value of a value that hadn't been converted yet (making it difficult/impossible to convert multiple operations in many situations). This commit updates getRemappedValue to properly handle this case by inserting temporary materializations when necessary.
Another code-health related benefit is that with this change we can move a majority of the complexity related to materializations to the end of the conversion process, instead of handling adhoc while conversion is happening.
Differential Revision: https://reviews.llvm.org/D111620
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#
d054b80b |
| 25-Oct-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies.
This revision also moves some code around to improve overall structure.
Differential Revision: https://reviews.llvm.
[mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies.
This revision also moves some code around to improve overall structure.
Differential Revision: https://reviews.llvm.org/D112437
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#
eda2ebd7 |
| 22-Oct-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][Vector] NFC - Extract rewrites related to insert/extract strided slice in a separate file.
Differential Revision: https://reviews.llvm.org/D112301
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#
e41ebbec |
| 11-Oct-2021 |
Vladislav Vinogradov <vlad.vinogradov@intel.com> |
[mlir][RFC] Refactor layout representation in MemRefType
The change is based on the proposal from the following discussion: https://llvm.discourse.group/t/rfc-memreftype-affine-maps-list-vs-single-i
[mlir][RFC] Refactor layout representation in MemRefType
The change is based on the proposal from the following discussion: https://llvm.discourse.group/t/rfc-memreftype-affine-maps-list-vs-single-item/3968
* Introduce `MemRefLayoutAttr` interface to get `AffineMap` from an `Attribute` (`AffineMapAttr` implements this interface). * Store layout as a single generic `MemRefLayoutAttr`.
This change removes the affine map composition feature and related API. Actually, while the `MemRefType` itself supported it, almost none of the upstream can work with more than 1 affine map in `MemRefType`.
The introduced `MemRefLayoutAttr` allows to re-implement this feature in a more stable way - via separate attribute class.
Also the interface allows to use different layout representations rather than affine maps. For example, the described "stride + offset" form, which is currently supported in ASM parser only, can now be expressed as separate attribute.
Reviewed By: ftynse, bondhugula
Differential Revision: https://reviews.llvm.org/D111553
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#
a54f4eae |
| 12-Oct-2021 |
Mogball <jeffniu22@gmail.com> |
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed all instances of operations in the codebase and in tests.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D110797
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#
eaf2588a |
| 05-Oct-2021 |
Diego Caballero <diegocaballero@google.com> |
[mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic
This patch extends Linalg core vectorization with support for min/max reductions in linalg.generic ops. It enables th
[mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic
This patch extends Linalg core vectorization with support for min/max reductions in linalg.generic ops. It enables the reduction detection for min/max combiner ops. It also renames MIN/MAX combining kinds to MINS/MAXS to make the sign explicit for floating point and signed integer types. MINU/MAXU should be introduce din the future for unsigned integer types.
Reviewed By: pifon2a, ThomasRaoux
Differential Revision: https://reviews.llvm.org/D110854
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#
ef976337 |
| 24-Sep-2021 |
River Riddle <riddleriver@gmail.com> |
[mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewrite methods
This commits updates the remaining usages of the ArrayRef<Value> based matchAndRewrite/rewrite methods in favo
[mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewrite methods
This commits updates the remaining usages of the ArrayRef<Value> based matchAndRewrite/rewrite methods in favor of the new OpAdaptor overload.
Differential Revision: https://reviews.llvm.org/D110360
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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#
faf1c224 |
| 30-Aug-2021 |
Chris Lattner <clattner@nondot.org> |
[Builder] Eliminate the StringRef/StringAttr forms of getSymbolRefAttr.
The StringAttr version doesn't need a context, so we can just use the existing `SymbolRefAttr::get` form. The StringRef versi
[Builder] Eliminate the StringRef/StringAttr forms of getSymbolRefAttr.
The StringAttr version doesn't need a context, so we can just use the existing `SymbolRefAttr::get` form. The StringRef version isn't preferred so we want to encourage people to use StringAttr.
There is an additional form of getSymbolRefAttr that takes a (SymbolTrait implementing) operation. This should also be moved, but I'll do that as a separate patch.
Differential Revision: https://reviews.llvm.org/D108922
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init |
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#
5a8a159b |
| 21-Jul-2021 |
Mehdi Amini <joker.eph@gmail.com> |
Add verifier for insert/extract element/value on type match between container and inserted/extracted value, and fix vector.shuffle lowering
Reviewed By: nicolasvasilache
Differential Revision: http
Add verifier for insert/extract element/value on type match between container and inserted/extracted value, and fix vector.shuffle lowering
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D106398
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#
d1a9e9a7 |
| 17-Jul-2021 |
Matthias Springer <springerm@google.com> |
[mlir][vector] Remove vector.transfer_read/write to LLVM lowering
This simplifies the vector to LLVM lowering. Previously, both vector.load/store and vector.transfer_read/write lowered directly to L
[mlir][vector] Remove vector.transfer_read/write to LLVM lowering
This simplifies the vector to LLVM lowering. Previously, both vector.load/store and vector.transfer_read/write lowered directly to LLVM. With this commit, there is a single path to LLVM vector load/store instructions and vector.transfer_read/write ops must first be lowered to vector.load/store ops.
* Remove vector.transfer_read/write to LLVM lowering. * Allow non-unit memref strides on all but the most minor dimension for vector.load/store ops. * Add maxTransferRank option to populateVectorTransferLoweringPatterns. * vector.transfer_reads with changing element type can no longer be lowered to LLVM. (This functionality is needed only for SPIRV.)
Differential Revision: https://reviews.llvm.org/D106118
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#
75e5f0aa |
| 08-Jul-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] factor memref-to-llvm lowering out of std-to-llvm
After the MemRef has been split out of the Standard dialect, the conversion to the LLVM dialect remained as a huge monolithic pass. This is u
[mlir] factor memref-to-llvm lowering out of std-to-llvm
After the MemRef has been split out of the Standard dialect, the conversion to the LLVM dialect remained as a huge monolithic pass. This is undesirable for the same complexity management reasons as having a huge Standard dialect itself, and is even more confusing given the existence of a separate dialect. Extract the conversion of the MemRef dialect operations to LLVM into a separate library and a separate conversion pass.
Reviewed By: herhut, silvas
Differential Revision: https://reviews.llvm.org/D105625
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Revision tags: llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3 |
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#
929189a4 |
| 22-Jun-2021 |
William S. Moses <gh@wsmoses.com> |
[MLIR][LLVM] Expose type translator from LLVM to MLIR Type
This commit moves the type translator from LLVM to MLIR to a public header for use by external projects or other code.
Unlike a previous a
[MLIR][LLVM] Expose type translator from LLVM to MLIR Type
This commit moves the type translator from LLVM to MLIR to a public header for use by external projects or other code.
Unlike a previous attempt (https://reviews.llvm.org/D104726), this patch moves the type conversion into separate files which remedies the linker error which was only caught by CI.
Differential Revision: https://reviews.llvm.org/D104834
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Revision tags: llvmorg-12.0.1-rc2 |
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#
5017b0f8 |
| 25-May-2021 |
Matthias Springer <springerm@google.com> |
[mlir] Check only last dim stride in transfer op lowering
Lower a 1D vector transfer op to LLVM if the last dim stride is 1. Also fixes a bug in the original unit stride computation.
Differential R
[mlir] Check only last dim stride in transfer op lowering
Lower a 1D vector transfer op to LLVM if the last dim stride is 1. Also fixes a bug in the original unit stride computation.
Differential Revision: https://reviews.llvm.org/D102897
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