Revision tags: llvmorg-21-init |
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#
011b6186 |
| 22-Jan-2025 |
Finn Plummer <50529406+inbelic@users.noreply.github.com> |
[DXIL] Define and generate `DXILAttribute` and `DXILProperty` (#117072)
- Redefines `DXILAttribute` to denote a function attribute, compatible
to how it was define in DXC/LLVM 3.7
- Fix how `DXILA
[DXIL] Define and generate `DXILAttribute` and `DXILProperty` (#117072)
- Redefines `DXILAttribute` to denote a function attribute, compatible
to how it was define in DXC/LLVM 3.7
- Fix how `DXILAttribute` is emitted to be a struct of set attributes
instead of an "or" of the enums
- Implement the lowering of `DXILAttribute` to LLVM function attributes
in `DXILOpBuilder.cpp`. A custom mapping is defined.
- Audit all current ops to specify the correct attributes consistent
with DXC. This is done here to allow for testing.
- Update testcases in `llvm/test/CodeGen/DirectX` of all ops with
attributes to match that attributes are set
- Update testcases of ops that had previously incorrectly set attributes
to check there is no attributes set
- Defines `DXILProperty` to denote the other type of attributes from DXC
used to query properties.
- Emit `DXILProperty` as a struct of set attributes.
- Updates `DXIL.td` to specify applicable `DXILProperty`s on ops
Note: `DXILProperty` was referred to as 'queryable attributes' in design
discussion. Changed to property to allow for better expression in
`DXIL.td`
Resolves #114461
Resolves #115912
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Revision tags: llvmorg-19.1.7 |
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#
cba9bd5c |
| 09-Jan-2025 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Implement the resource.load.rawbuffer intrinsic (#121012)
This introduces `@llvm.dx.resource.load.rawbuffer` and generalizes the
buffer load docs under DirectX/DXILResources.
This reso
[DirectX] Implement the resource.load.rawbuffer intrinsic (#121012)
This introduces `@llvm.dx.resource.load.rawbuffer` and generalizes the
buffer load docs under DirectX/DXILResources.
This resolves the "load" parts of #106188
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5 |
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#
0a44b24d |
| 02-Dec-2024 |
Adam Yang <hanbyang@microsoft.com> |
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#114349)
fixes #112974
partially fixes #70103
An earlier version of this change was reverted so some issues could be fixed.
### Changes
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#114349)
fixes #112974
partially fixes #70103
An earlier version of this change was reverted so some issues could be fixed.
### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added int_dx_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsDirectX.td
- Added expansion for int_dx_group_memory_barrier_with_group_sync in
DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case
### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic
#111888](https://github.com/llvm/llvm-project/pull/111888)
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Revision tags: llvmorg-19.1.4 |
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#
948249d8 |
| 31-Oct-2024 |
Adam Yang <hanbyang@microsoft.com> |
Revert "[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic" (#114322)
Reverts llvm/llvm-project#111884
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#
cdacc9b5 |
| 29-Oct-2024 |
Jerry Sun <105613447+jerryyiransun@users.noreply.github.com> |
[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks (#113318)
Code cleanups for TableGen files, changes includes function names,
variable names and unused imports.
---------
[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks (#113318)
Code cleanups for TableGen files, changes includes function names,
variable names and unused imports.
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
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#
9a5b3a1b |
| 29-Oct-2024 |
Adam Yang <hanbyang@microsoft.com> |
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#111884)
fixes #112974
partially fixes #70103
### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added in
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#111884)
fixes #112974
partially fixes #70103
### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added int_dx_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsDirectX.td
- Added expansion for int_dx_group_memory_barrier_with_group_sync in
DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case
### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic
#111888](https://github.com/llvm/llvm-project/pull/111888)
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Revision tags: llvmorg-19.1.3 |
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#
00ca2071 |
| 29-Oct-2024 |
Jerry Sun <105613447+jerryyiransun@users.noreply.github.com> |
[TableGen] [NFC] Remove unused includes in TableGen BE (#113725)
split PR as requested from
https://github.com/llvm/llvm-project/pull/113318.
Removes unused imports in TableGen BE
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#
62e2c7fb |
| 18-Oct-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[LLVM][TableGen] Change all `Init` pointers to const (#112705)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-
[LLVM][TableGen] Change all `Init` pointers to const (#112705)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
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Revision tags: llvmorg-19.1.2 |
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#
a140931b |
| 01-Oct-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[TableGen] Change `getValueAsListOfDefs` to return const pointer vector (#110713)
Change `getValueAsListOfDefs` to return a vector of const Record
pointer, and remove `getValueAsListOfConstDefs` th
[TableGen] Change `getValueAsListOfDefs` to return const pointer vector (#110713)
Change `getValueAsListOfDefs` to return a vector of const Record
pointer, and remove `getValueAsListOfConstDefs` that was added as a
transition aid.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
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Revision tags: llvmorg-19.1.1 |
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#
0950078b |
| 26-Sep-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[LLVM][TableGen] Change DXILEmitter to use const Record pointers (#110111)
Change DXILEmitter to use const Record pointers.
This is a part of effort to have better const correctness in TableGen
[LLVM][TableGen] Change DXILEmitter to use const Record pointers (#110111)
Change DXILEmitter to use const Record pointers.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
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#
4fbac528 |
| 18-Sep-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[LLVM][TableGen] Change DXILEmitter to use const RecordKeeper (#109045)
Change DXILEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backen
[LLVM][TableGen] Change DXILEmitter to use const RecordKeeper (#109045)
Change DXILEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
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Revision tags: llvmorg-19.1.0 |
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#
3f22756f |
| 09-Sep-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops
The `@llvm.dx.typedBufferLoad` intrinsic is lowered to `@dx.op.bufferLoad`. There's some complexity here in translating to scalarized IR, which
[DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops
The `@llvm.dx.typedBufferLoad` intrinsic is lowered to `@dx.op.bufferLoad`. There's some complexity here in translating to scalarized IR, which I've abstracted out into a function that should be useful for samples, gathers, and CBuffer loads.
I've also updated the DXILResources.rst docs to match what I'm doing here and the proposal in llvm/wg-hlsl#59. I've removed the content about stores and raw buffers for now with the expectation that it will be added along with the work.
Note that this change includes a bit of a hack in how it deals with `getOverloadKind` for the `dx.ResRet` types - we need to adjust how we deal with operation overloads to generate a table directly rather than proxy through the OverloadKind enum, but that's left for a later change here.
Part of #91367
Pull Request: https://github.com/llvm/llvm-project/pull/104252
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#
a0c43be0 |
| 07-Sep-2024 |
Kazu Hirata <kazu@google.com> |
[TableGen] Avoid repeated hash lookups (NFC) (#107710)
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Revision tags: llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3 |
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#
f357fe37 |
| 19-Aug-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Disentangle DXIL.td's op types from LLVMType. NFC
LLVMType is both too broad and too narrow for defining DXIL operations, in different ways. It's too broad in the sense that we don't need
[DirectX] Disentangle DXIL.td's op types from LLVMType. NFC
LLVMType is both too broad and too narrow for defining DXIL operations, in different ways. It's too broad in the sense that we don't need the full set of MVTs - the set of types DXIL operations work on is much smaller. It's too narrow in the sense that it's difficult to use it for the various fixed structure types in DXIL, like `%dx.types.Handle` or `%dx.Types.ResRet.f32`.
Replace the usage of LLVMType in DXIL.td with DXILOpParamType, a simple class that we can define an enum of types from. Further, use this to replace the "ParameterKind" enum in DXILABI.h that has nothing to do with DXIL's ABI.
Pull Request: https://github.com/llvm/llvm-project/pull/104247
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Revision tags: llvmorg-19.1.0-rc2 |
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#
8cf85653 |
| 02-Aug-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Make DXILOpBuilder's API more useable
This adjusts the DXILOpBuilder API in a couple of ways: 1. Remove the need to call `getOverloadTy` before creating Ops 2. Introduce `tryCreateOp` to p
[DirectX] Make DXILOpBuilder's API more useable
This adjusts the DXILOpBuilder API in a couple of ways: 1. Remove the need to call `getOverloadTy` before creating Ops 2. Introduce `tryCreateOp` to parallel `createOp` but propagate errors 3. Introduce specialized createOp methods for each DXIL Op
This will simplify usage of the builder in upcoming changes, and also allows us to propagate errors via DiagnosticInfo rather than using fatal errors.
Pull Request: https://github.com/llvm/llvm-project/pull/101250
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#
40940980 |
| 31-Jul-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Simplify tablegen'd OpCode and OpClass enums
Pull Request: https://github.com/llvm/llvm-project/pull/101249
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#
94da6bfb |
| 31-Jul-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code
Rather than generate a map with a known name, just define the mapping so the code that uses it can do what it needs.
Pull Request: https://
[DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code
Rather than generate a map with a known name, just define the mapping so the code that uses it can do what it needs.
Pull Request: https://github.com/llvm/llvm-project/pull/101248
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#
6c7557d4 |
| 30-Jul-2024 |
Fangrui Song <i@maskray.me> |
[DXIL] Fix -Wunused-but-set-variable after #97593
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#
cdfd884b |
| 30-Jul-2024 |
S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli@microsoft.com> |
[DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (#97593)
Update TableGen specification of DXIL Op records in DXIL.td per the
current design document.
- Fac
[DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (#97593)
Update TableGen specification of DXIL Op records in DXIL.td per the
current design document.
- Facilitate specification of overloads, shader stage and attributes
predicated on DXIL Ops predicated DXIL version.
Implement functionality to consume in TableGen backend, DXILEmitter, the
above specification enhancements, and generate C++ code (in
(DXILOperations.inc) that represents properties of DXIL Ops, associated
type declarations and corresponding accessor functions.
Changes to DXIL Op Lowering pass to consume the DXIL Op representation
generated by the TableGen back end.
Add mtriple with the required shader model version to commandline of
tests.
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Revision tags: llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
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#
5a12f286 |
| 26-Apr-2024 |
Fangrui Song <i@maskray.me> |
LLVM_FALLTHROUGH => [[fallthrough]]. NFC
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3 |
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#
a83ed042 |
| 25-Mar-2024 |
Justin Bogner <mail@justinbogner.com> |
[DirectX] Follow naming conventions for enumerators in DXILABI.h. NFC (#86237)
These all-caps names differ from the llvm naming conventions for no good
reason, and `VOID` in all caps can cause prob
[DirectX] Follow naming conventions for enumerators in DXILABI.h. NFC (#86237)
These all-caps names differ from the llvm naming conventions for no good
reason, and `VOID` in all caps can cause problems in windows
environments (see [1]). Rename them to UpperCamelCase.
[1]: https://github.com/clangd/clangd/issues/1983
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#
fa3d789d |
| 25-Mar-2024 |
Pierre van Houtryve <pierre.vanhoutryve@amd.com> |
[RFC][TableGen] Restructure TableGen Source (#80847)
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Comm
[RFC][TableGen] Restructure TableGen Source (#80847)
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Common" library which contains all of the helpers for TableGen
backends. Such helpers can be shared by more than one backend, and even
unit tested (e.g. CodeExpander is, maybe we can add more over time)
Fixes #80647
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#
3f395712 |
| 20-Mar-2024 |
S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli@microsoft.com> |
[DirectX][DXIL] Distinguish return type for overload type resolution. (#85646)
Return type of DXIL Ops may be different from valid overload type of the
parameters, if any. Such DXIL Ops are correct
[DirectX][DXIL] Distinguish return type for overload type resolution. (#85646)
Return type of DXIL Ops may be different from valid overload type of the
parameters, if any. Such DXIL Ops are correctly represented in DXIL.td.
However, DXILEmitter assumes the return type to be the same as parameter
overload type, if one exists. This results in generation in incorrect
overload index value in DXILOperation.inc for the DXIL Op and incorrect
DXIL operation function call in DXILOpLowering pass.
This change distinguishes return types correctly from parameter overload
types in DXILEmitter backend to handle such DXIL ops.
Add specification for DXIL Op `isinf` and corresponding tests to verify
the above change.
Fixes issue #85125
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Revision tags: llvmorg-18.1.2 |
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#
54f631d1 |
| 12-Mar-2024 |
S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli@microsoft.com> |
[DirectX][NFC] Model precise overload type specification of DXIL Ops (#83917)
Implement an abstraction to specify precise overload types supported by
DXIL ops. These overload types are typically a
[DirectX][NFC] Model precise overload type specification of DXIL Ops (#83917)
Implement an abstraction to specify precise overload types supported by
DXIL ops. These overload types are typically a subset of LLVM
intrinsics.
Implement the corresponding changes in DXILEmitter backend.
Add tests to verify expected errors for unsupported overload types at
code generation time.
Add tests to check for correct overload error output.
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Revision tags: llvmorg-18.1.1 |
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#
b1c8b9f8 |
| 29-Feb-2024 |
S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli@microsoft.com> |
[DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (#83193)
* Leverage TableGen record descriptions of LLVM or DirectX intrinsics
that can be directly mapped in DXIL
[DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (#83193)
* Leverage TableGen record descriptions of LLVM or DirectX intrinsics
that can be directly mapped in DXIL Ops TableGen description. As a
result, such DXIL Ops can be succinctly described without duplication.
DXILEmitter backend can derive the properties of DXIL Ops accordingly.
* Ensured that corresponding lit tests pass.
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