Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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42067f26 |
| 20-Aug-2024 |
Robert Barinov <165884206+rbintel@users.noreply.github.com> |
[LLVM-Reduce] - Distinct Metadata Reduction (#104624)
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2 |
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5ff67204 |
| 11-Mar-2024 |
Stephen Tozer <stephen.tozer@sony.com> |
[RemoveDIs][NFC] Rename DPValues->DbgRecords in llvm-reduce's ReduceDPValues (#84506)
llvm-reduce currently has a file `ReduceDPValues`, which really is
concerned with DbgRecords. Therefore, we ren
[RemoveDIs][NFC] Rename DPValues->DbgRecords in llvm-reduce's ReduceDPValues (#84506)
llvm-reduce currently has a file `ReduceDPValues`, which really is
concerned with DbgRecords. Therefore, we rename the file and its
function accordingly.
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Revision tags: llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3 |
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ababa964 |
| 20-Feb-2024 |
Orlando Cazalet-Hyams <orlando.hyams@sony.com> |
[RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (#78252)
Patch 1 of 3 to add llvm.dbg.label support to the RemoveDIs project. The
patch stack adds a new base class
-> 1. Add DbgRecord
[RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (#78252)
Patch 1 of 3 to add llvm.dbg.label support to the RemoveDIs project. The
patch stack adds a new base class
-> 1. Add DbgRecord base class for DPValue and the not-yet-added
DPLabel class.
2. Add the DPLabel class.
3. Enable dbg.label conversion and add support to passes.
Patches 1 and 2 are NFC.
In the near future we also will rename DPValue to DbgVariableRecord and
DPLabel to DbgLabelRecord, at which point we'll overhaul the function
names too. The name DPLabel keeps things consistent for now.
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Revision tags: llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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40bdfd39 |
| 23-Jan-2024 |
Jeremy Morse <jeremy.morse@sony.com> |
[llvm-reduce][DebugInfo] Support reducing non-instruction debug-info (#78995)
LLVM will shortly be able to represent variable locations without
encoding information into intrinsics -- they'll be st
[llvm-reduce][DebugInfo] Support reducing non-instruction debug-info (#78995)
LLVM will shortly be able to represent variable locations without
encoding information into intrinsics -- they'll be stored as DPValue
objects instead. We'll still need to be able to llvm-reduce these
variable location assignments just like we can with intrinsics today,
thus, here's an llvm-reduce pass that enumerates and reduces the DPValue
objects.
The test for this is paradoxically written with dbg.value intrinsics:
this is because we're changing all the core parts of LLVM to support
this first, with the textual IR format coming last. Until that arrives,
testing the llvm-reduce'ing of DPValues needs the added test using
intrinsics. We should be able to drop the variable assignment using
%alsoloaded using this method. As with the other llvm-reduce tests, I've
got one set of check lines for making the reduction happen as desired,
and the other set to check the final output.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3 |
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853a46cf |
| 14-Feb-2023 |
Florian Mayer <fmayer@google.com> |
Revert "llvm-reduce: Run instruction reduction last"
This reverts commit 463ab1e07a0a15a9aa129639048e29e0f8ec4dc8.
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463ab1e0 |
| 10-Feb-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Run instruction reduction last
With the current state of mir support, this is going to generate a large number of verifier errors. Running the use and def reductions first helps to miti
llvm-reduce: Run instruction reduction last
With the current state of mir support, this is going to generate a large number of verifier errors. Running the use and def reductions first helps to mitigate the impact of this.
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Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init |
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333ffafb |
| 14-Jan-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Trim includes and avoid using namespace in a header
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Revision tags: llvmorg-15.0.7, llvmorg-15.0.6 |
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bc3e4923 |
| 22-Nov-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Reduce ifuncs
Reduce by calling the resolver function at the use site, and inserting an indirect call. Try to delete if there are no uses left over.
We should also probably try to do s
llvm-reduce: Reduce ifuncs
Reduce by calling the resolver function at the use site, and inserting an indirect call. Try to delete if there are no uses left over.
We should also probably try to do something about constantexpr uses; perhaps treat them like aliases.
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a455c916 |
| 02-Jan-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add reduction for invokes
Main thing I was unsure about was to whether try to delete the now dead landing blocks, or leave that for the unreachable block reduction.
Personality functio
llvm-reduce: Add reduction for invokes
Main thing I was unsure about was to whether try to delete the now dead landing blocks, or leave that for the unreachable block reduction.
Personality function is not reduced, but that should be a separate reduction on the function.
Fixes #58815
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5f6bf752 |
| 01-Jan-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Reduce individual operands of named metadata
The current reduction tries all or nothing elimination of named metadata. I noticed in one case where one of the module flags was necessary,
llvm-reduce: Reduce individual operands of named metadata
The current reduction tries all or nothing elimination of named metadata. I noticed in one case where one of the module flags was necessary, but it left the rest. Reduce the individual operands of named metadata nodes that are known to behave like lists. Be conservative since some named metadata may have more specific verifier requirements for the operands.
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47e44c0c |
| 02-Jan-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add reduction for function personalities
Fixes second piece of #58815
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Revision tags: llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
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45a91c15 |
| 04-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Fix block reduction with unreachable blocks
Previously this would produce many invalid reductions with "Instruction does not dominate uses" verifier errors.
This fixes issues in cases
llvm-reduce: Fix block reduction with unreachable blocks
Previously this would produce many invalid reductions with "Instruction does not dominate uses" verifier errors.
This fixes issues in cases where the incoming IR has unreachable blocks, and the resulting reduction introduced new reachable blocks.
Have basic-blocks skip functions that have unreachable blocks, Introduce a separate reduction which only deletes unreachable blocks. Cleanup any newly unreachable blocks after trimming out the requested deletions.
Includes a variety of meta-reduced tests for llvm-reduce itself with -abort-on-invalid-reduction that were failing on different iterations of this patch.
Bugpoint's implementation is much simpler (but currently I don't understand how it avoids disconnecting interesting blocks from the CFG).
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08d1c43c |
| 13-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add conditional reduction passes
Copy this technique from bugpoint. Before trying to blindly delete blocks, try to fold branch conditions. This intuitively makes more sense for a faster
llvm-reduce: Add conditional reduction passes
Copy this technique from bugpoint. Before trying to blindly delete blocks, try to fold branch conditions. This intuitively makes more sense for a faster reduction, since you can find dead paths in the function to prune out before trying to bisect blocks in source order.
Seems to provide some speedup on my multi-hour reduction samples.
This does have the potential to produce testcases with unreachable blocks. This is already a problem with the existing block reduction pass. I'm struggling dealing with invalid reductions in these cases, so in the future this should probably start deleting those. However, I do sometimes try to reduce failures in code that becomes unreachable, so I'm not totally sure what to do here.
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83da1a6a |
| 21-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add a reduction to replace atomics with non-atomics
Make load and store non-atomic. Make the others monotonic.
We could probably try to incrementally relax the orderings; not sure how
llvm-reduce: Add a reduction to replace atomics with non-atomics
Make load and store non-atomic. Make the others monotonic.
We could probably try to incrementally relax the orderings; not sure how useful that would be.
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b1e17199 |
| 21-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add atomic syncscope reduction
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596fdf75 |
| 21-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add volatile reduction pass
Removing volatile may help optimization passes do more to the IR. However, this will increase scheduler freedom.
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27902eea |
| 21-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add flag reduction pass
Try to remove each flag from instructions. It may make more sense to introduce these flags instead.
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0fbb2615 |
| 18-Oct-2022 |
Arthur Eubanks <aeubanks@google.com> |
[llvm-reduce] Attempt to strip debug info
I often run llvm-reduce on IR that contains debug info, this prevents an extra step of `opt -passes=strip` I do every time and will result in a lot less inv
[llvm-reduce] Attempt to strip debug info
I often run llvm-reduce on IR that contains debug info, this prevents an extra step of `opt -passes=strip` I do every time and will result in a lot less invalid reductions around debug metadata.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D136208
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573a5de7 |
| 11-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add opcode reduction pass
Try some dumb strength reductions to "simpler" opcodes. Make some opcode substitutions I typically try to get smaller MIR out of codegen. This is a bit target
llvm-reduce: Add opcode reduction pass
Try some dumb strength reductions to "simpler" opcodes. Make some opcode substitutions I typically try to get smaller MIR out of codegen. This is a bit target specific and I have a lot of increasingly target specific modifications I try during manual reduction.
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c3bc72cc |
| 10-Oct-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Improve delta pass flag handling
Verify all the requested passes exist before trying to run any. For long reductions, it was really annoying for it to get halfway through and then I com
llvm-reduce: Improve delta pass flag handling
Verify all the requested passes exist before trying to run any. For long reductions, it was really annoying for it to get halfway through and then I come back later to an incomplete reduction.
Also add a new skip-delta-passes flag. Most of the time I want to opt out of specific reductions, rather than run a select few.
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2c799b77 |
| 06-Oct-2022 |
Matthew Voss <matthew.voss@sony.com> |
[llvm-reduce] Add pass that reduces DebugInfo metadata
This new pass for llvm-reduce attempts to reduce DebugInfo metadata. The process used is: 1. Scan every MD node, keeping track of nodes alrea
[llvm-reduce] Add pass that reduces DebugInfo metadata
This new pass for llvm-reduce attempts to reduce DebugInfo metadata. The process used is: 1. Scan every MD node, keeping track of nodes already visited. 2. Look for DebugInfo nodes, then record any operands that are lists. 3. Bisect though all the elements of the collected lists.
Differential Revision: https://reviews.llvm.org/D132077
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Revision tags: llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3 |
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2f1fa624 |
| 15-Aug-2022 |
John Regehr <regehr@cs.utah.edu> |
this pass calls simplifyCFG on individual basic blocks; we want this so that we can reduce away incidental parts of the CFG in cases where the full simplifyCFG pass makes the test case uninteresting
this pass calls simplifyCFG on individual basic blocks; we want this so that we can reduce away incidental parts of the CFG in cases where the full simplifyCFG pass makes the test case uninteresting
Differential Revision: https://reviews.llvm.org/D131920
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2 |
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bd1f80f5 |
| 14-Apr-2022 |
Arthur Eubanks <aeubanks@google.com> |
[llvm-reduce] Add delta pass to run IR passes
The exact IR passes run is customizable via `-ir-passes`.
Reviewed By: regehr
Differential Revision: https://reviews.llvm.org/D123749
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71d1bd14 |
| 02-Aug-2022 |
John Regehr <regehr@cs.utah.edu> |
llvm-reduce: reorder passes to run the ones first that delete function bodies; this makes reductions go faster
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e24b390d |
| 27-Jun-2022 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
llvm-reduce: Add reduction for instruction defs
Try to insert an implicit_def to replace the instruction's value, replacing the original instruction's def with a dead register. If all defs are delet
llvm-reduce: Add reduction for instruction defs
Try to insert an implicit_def to replace the instruction's value, replacing the original instruction's def with a dead register. If all defs are delete the instruction entirely.
This is pretty similar to the instruction reduction, but leaves the new defs in the same place as the original instruction. This could possibly replace it. I'm not sure if we should directly delete the instructions here, or leave dead ones behind.
This could also further work to replace physical register defs.
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