Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6 |
|
#
19220110 |
| 08-May-2024 |
Felix (Ting Wang) <Ting.Wang.SH@ibm.com> |
[PowerPC][AIX] Refactor existing logic to handle non-zero offsets for aix-small-local-dynamic-tls (#89182)
To enable optimized small local-dynamic access sequence for non-zero
offsets, this patch r
[PowerPC][AIX] Refactor existing logic to handle non-zero offsets for aix-small-local-dynamic-tls (#89182)
To enable optimized small local-dynamic access sequence for non-zero
offsets, this patch refactors existing
2a50921553798d2db52ca6330c89f0f8a5bc2215.
show more ...
|
Revision tags: llvmorg-18.1.5, llvmorg-18.1.4 |
|
#
09d51a84 |
| 12-Apr-2024 |
Felix (Ting Wang) <Ting.Wang.SH@ibm.com> |
[PowerPC][AIX] Enable aix-small-local-dynamic-tls target attribute (#86641)
Following the aix-small-local-exec-tls target attribute, this patch adds
a target attribute for an AIX-specific option in
[PowerPC][AIX] Enable aix-small-local-dynamic-tls target attribute (#86641)
Following the aix-small-local-exec-tls target attribute, this patch adds
a target attribute for an AIX-specific option in llc that informs the
compiler that it can use a faster access sequence for the local-dynamic
TLS model (formally named aix-small-local-dynamic-tls) when TLS
variables are less than ~32KB in size.
The patch either produces an addi/la with a displacement off of module
handle (return value from .__tls_get_mod) when the address is
calculated, or it produces an addi/la followed by a load/store when the
address is calculated and used for further accesses.
---------
Co-authored-by: Amy Kwan <amy.kwan1@ibm.com>
show more ...
|
Revision tags: llvmorg-18.1.3 |
|
#
90a7fc36 |
| 24-Mar-2024 |
Felix (Ting Wang) <Ting.Wang.SH@ibm.com> |
[PowerPC][NFC] Add base test case for small-local-dynamic-tls on AIX (#84711)
|