Revision tags: llvmorg-16.0.1 |
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443825c5 |
| 04-Apr-2023 |
Noah Goldstein <goldstein.w.n@gmail.com> |
Recommit "[X86] Simplify some `pternlog` intrinsics" (2nd Try)
Original location of the unittests was Transforms/InstCombine/X86 which caused an issue as non-x86 targets ended up with a dependency o
Recommit "[X86] Simplify some `pternlog` intrinsics" (2nd Try)
Original location of the unittests was Transforms/InstCombine/X86 which caused an issue as non-x86 targets ended up with a dependency on X86 which isn't right.
Moved the unit tests to Target/X86 so should be good now.
Differential Revision: https://reviews.llvm.org/D145220
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92d854e2 |
| 03-Apr-2023 |
Noah Goldstein <goldstein.w.n@gmail.com> |
Revert "[X86] Simplify some `pternlog` intrinsics"
This reverts commit cacc0033b12b2e6400eedd6e449644e87ec3099b.
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cacc0033 |
| 03-Apr-2023 |
Noah Goldstein <goldstein.w.n@gmail.com> |
[X86] Simplify some `pternlog` intrinsics
Currently `pternlog` intrinsics stay as a function call and are unable to merge with other bin-ops / constant-fold.
This commit adds support for reducing a
[X86] Simplify some `pternlog` intrinsics
Currently `pternlog` intrinsics stay as a function call and are unable to merge with other bin-ops / constant-fold.
This commit adds support for reducing all `pternlog` intrinsics to their base logic-ops so that they can be further reduced in other passes.
Since the x86 backend doesn't do a great job creating `vpternlog` instructions from stray logic ops, the current logic only simplifies in the cases were we obviously will be able to do as good or better. As the x86 backend improves, more cases can be simplified.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D145220
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Revision tags: llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
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38818b60 |
| 04-Jan-2023 |
serge-sans-paille <sguelton@mozilla.com> |
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.
The only non-automatic changes have been:
1. ArrayRef(some_uint8_pointer, 0
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.
The only non-automatic changes have been:
1. ArrayRef(some_uint8_pointer, 0) needs to be changed into ArrayRef(some_uint8_pointer, (size_t)0) to avoid an ambiguous call with ArrayRef((uint8_t*), (uint8_t*)) 2. CVSymbol sym(makeArrayRef(symStorage)); needed to be rewritten as CVSymbol sym{ArrayRef(symStorage)}; otherwise the compiler is confused and thinks we have a (bad) function prototype. There was a few similar situation across the codebase. 3. ADL doesn't seem to work the same for deduction-guides and functions, so at some point the llvm namespace must be explicitly stated. 4. The "reference mode" of makeArrayRef(ArrayRef<T> &) that acts as no-op is not supported (a constructor cannot achieve that).
Per reviewers' comment, some useless makeArrayRef have been removed in the process.
This is a follow-up to https://reviews.llvm.org/D140896 that introduced the deduction guides.
Differential Revision: https://reviews.llvm.org/D140955
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86fe4dfd |
| 02-Dec-2022 |
Krzysztof Parzyszek <kparzysz@quicinc.com> |
TargetTransformInfo: convert Optional to std::optional
Recommit: added missing "#include <cstdint>".
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4e12d183 |
| 02-Dec-2022 |
Krzysztof Parzyszek <kparzysz@quicinc.com> |
Revert "TargetTransformInfo: convert Optional to std::optional"
This reverts commit b83711248cb12639e7ef7303cfbb4452b4067e85.
Some buildbots are failing.
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b8371124 |
| 02-Dec-2022 |
Krzysztof Parzyszek <kparzysz@quicinc.com> |
TargetTransformInfo: convert Optional to std::optional
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Revision tags: llvmorg-15.0.6 |
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1e55d5b1 |
| 21-Nov-2022 |
Manuel Brito <manuel.brito@tecnico.ulisboa.pt> |
Use poison instead of undef as placeholder for vector construction [NFC]
Differential Revision: https://reviews.llvm.org/D138450
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Revision tags: llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2 |
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de9d80c1 |
| 08-Aug-2022 |
Fangrui Song <i@maskray.me> |
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
With C++17 there is no Clang pedantic warning or MSVC C5051.
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Revision tags: llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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be7f09f7 |
| 16-May-2022 |
Sanjay Patel <spatel@rotateright.com> |
[IR] create and use helper functions that test the signbit; NFCI
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Revision tags: llvmorg-14.0.3 |
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a9215ed9 |
| 28-Apr-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine][X86] simplifyDemandedVectorEltsIntrinsic - handle avx2 per-element vector shifts
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Revision tags: llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
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fd2bb51f |
| 08-Feb-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[ADT] Add APInt/MathExtras isShiftedMask variant returning mask offset/length
In many cases, calls to isShiftedMask are immediately followed with checks to determine the size and position of the bit
[ADT] Add APInt/MathExtras isShiftedMask variant returning mask offset/length
In many cases, calls to isShiftedMask are immediately followed with checks to determine the size and position of the bitmask.
This patch adds variants of APInt::isShiftedMask, isShiftedMask_32 and isShiftedMask_64 that return these values as additional arguments.
I've updated a number of cases that were either performing seperate size/position calculations or had created their own local wrapper versions of these.
Differential Revision: https://reviews.llvm.org/D119019
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ea7a3e6a |
| 03-Feb-2022 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[X86] simplifyX86varShift - use KnownBits.getMaxValue().ult() to check for out of bounds shift amounts
This is easier to grok than MaskedValueIsZero for high bits.
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Revision tags: llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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a9bceb2b |
| 30-Sep-2021 |
Jay Foad <jay.foad@amd.com> |
[APInt] Stop using soft-deprecated constructors and methods in llvm. NFC.
Stop using APInt constructors and methods that were soft-deprecated in D109483. This fixes all the uses I found in llvm, exc
[APInt] Stop using soft-deprecated constructors and methods in llvm. NFC.
Stop using APInt constructors and methods that were soft-deprecated in D109483. This fixes all the uses I found in llvm, except for the APInt unit tests which should still test the deprecated methods.
Differential Revision: https://reviews.llvm.org/D110807
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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735f4671 |
| 09-Sep-2021 |
Chris Lattner <clattner@nondot.org> |
[APInt] Normalize naming on keep constructors / predicate methods.
This renames the primary methods for creating a zero value to `getZero` instead of `getNullValue` and renames predicates like `isAl
[APInt] Normalize naming on keep constructors / predicate methods.
This renames the primary methods for creating a zero value to `getZero` instead of `getNullValue` and renames predicates like `isAllOnesValue` to simply `isAllOnes`. This achieves two things:
1) This starts standardizing predicates across the LLVM codebase, following (in this case) ConstantInt. The word "Value" doesn't convey anything of merit, and is missing in some of the other things.
2) Calling an integer "null" doesn't make any sense. The original sin here is mine and I've regretted it for years. This moves us to calling it "zero" instead, which is correct!
APInt is widely used and I don't think anyone is keen to take massive source breakage on anything so core, at least not all in one go. As such, this doesn't actually delete any entrypoints, it "soft deprecates" them with a comment.
Included in this patch are changes to a bunch of the codebase, but there are more. We should normalize SelectionDAG and other APIs as well, which would make the API change more mechanical.
Differential Revision: https://reviews.llvm.org/D109483
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init |
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c188f0b8 |
| 20-Jul-2021 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[X86] X86InstCombineIntrinsic.cpp - silence clang-tidy warnings about incorrect uses of auto. NFCI.
We were using auto instead of auto* in a number of places which failed the llvm-qualified-auto che
[X86] X86InstCombineIntrinsic.cpp - silence clang-tidy warnings about incorrect uses of auto. NFCI.
We were using auto instead of auto* in a number of places which failed the llvm-qualified-auto check.
Additionally we were using auto in some places where the type wasn't immediately obvious - the style guide rule of thumb is only to use auto from casts etc. where the type is already explicitly stated.
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fabc1719 |
| 03-Jul-2021 |
Nikita Popov <nikita.ppv@gmail.com> |
[IRBuilder] Add type argument to CreateMaskedLoad/Gather
Same as other CreateLoad-style APIs, these need an explicit type argument to support opaque pointers.
Differential Revision: https://reviews
[IRBuilder] Add type argument to CreateMaskedLoad/Gather
Same as other CreateLoad-style APIs, these need an explicit type argument to support opaque pointers.
Differential Revision: https://reviews.llvm.org/D105395
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Revision tags: llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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8444a249 |
| 05-Jan-2021 |
Juneyoung Lee <aqjune@gmail.com> |
[X86] Update X86InstCombineIntrinsic to use CreateShuffleVector with one vector
This patch updates X86InstCombineIntrinsic.cpp to use the newly updated CreateShuffleVector.
The tests are updated be
[X86] Update X86InstCombineIntrinsic to use CreateShuffleVector with one vector
This patch updates X86InstCombineIntrinsic.cpp to use the newly updated CreateShuffleVector.
The tests are updated because the updated CreateShuffleVector uses poison value for the second vector. If I didn't miss something, the masks in the tests are choosing elements from the first vector only; therefore the tests are having equivalent behavior.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D94059
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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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204bdc53 |
| 11-Dec-2020 |
Sanjay Patel <spatel@rotateright.com> |
[InstCombine][x86] fix insertion point bug in vector demanded elts fold (PR48476)
This transform was added at: c63799fc52ff
From what I see, it's the first demanded elements transform that adds a n
[InstCombine][x86] fix insertion point bug in vector demanded elts fold (PR48476)
This transform was added at: c63799fc52ff
From what I see, it's the first demanded elements transform that adds a new instruction using the IRBuilder. There are similar folds in the generic demanded bits chunk of instcombine that also use the InsertPointGuard code pattern.
The tests here would assert/crash because the new instruction was being added at the start of the demanded elements analysis rather than at the instruction that is being replaced.
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c63799fc |
| 01-Dec-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine][X86] Fold addsub intrinsic to fadd/fsub depending on demanded elts (PR46277)
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e425d0b9 |
| 30-Nov-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine][X86] Add basic addsub intrinsic SimplifyDemandedVectorElts support (PR46277)
Pass through the demanded elts mask to the source operands.
The next step will be to add support for foldi
[InstCombine][X86] Add basic addsub intrinsic SimplifyDemandedVectorElts support (PR46277)
Pass through the demanded elts mask to the source operands.
The next step will be to add support for folding to add/sub if we only demand odd/even elements.
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Revision tags: llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3 |
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06f136f6 |
| 18-Sep-2020 |
Philip Reames <listmail@philipreames.com> |
[instcombine][x86] Converted pdep/pext with shifted mask to simple arithmetic
If the mask of a pdep or pext instruction is a shift masked (i.e. one contiguous block of ones) we need at most one and
[instcombine][x86] Converted pdep/pext with shifted mask to simple arithmetic
If the mask of a pdep or pext instruction is a shift masked (i.e. one contiguous block of ones) we need at most one and and one shift to represent the operation without the intrinsic. One all platforms I know of, this is faster than the pdep/pext.
The cost modelling for multiple contiguous blocks might be worth exploring in a follow up, but it's not relevant for my current use case. It would almost certainly be a win on AMDs where these are really really slow though.
Differential Revision: https://reviews.llvm.org/D87861
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f0268121 |
| 17-Sep-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
InstCombiner.h - remove unnecessary KnownBits.h include. NFCI.
Move the include down to cpp files with an implicit dependency.
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3170d548 |
| 12-Sep-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine][X86] Covert masked load/stores with (sign extended) bool vector masks to generic intrinsics.
As detailed on PR11210, if the mask is known to come from a (sign extended) bool vector (e.
[InstCombine][X86] Covert masked load/stores with (sign extended) bool vector masks to generic intrinsics.
As detailed on PR11210, if the mask is known to come from a (sign extended) bool vector (e.g. comparisons) then we can represent with a generic masked load/store without losing anything.
We already do something similar for BLENDV -> SELECT conversion.
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50ee0b99 |
| 12-Sep-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantExpr evaluators. NFCI.
Don't do this manually, we can just use the ConstantExpr evaluators to do it more tidily for us.
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