Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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#
ed8019d9 |
| 18-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[Target] Remove unused includes (NFC) (#116577)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3 |
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ad4a582f |
| 18-Oct-2024 |
Alex Rønne Petersen <alex@alexrp.com> |
[llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (#106014)
Some targets (e.g. PPC and Hexagon) already did this. I think it's best
to do this consistently so that
[llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (#106014)
Some targets (e.g. PPC and Hexagon) already did this. I think it's best
to do this consistently so that frontend authors don't run into
inconsistent results when they emit `naked` functions. For example, in
Zig, we had to change our emit code to also set `frame-pointer=none` to
get reliable results across targets.
Note: I don't have commit access.
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Revision tags: llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
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20cde154 |
| 03-Dec-2022 |
Kazu Hirata <kazu@google.com> |
[Target] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the compiler would warn if None were deprecated. The intent is to reduce the amount of
[Target] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the compiler would warn if None were deprecated. The intent is to reduce the amount of manual work required in migrating from Optional to std::optional.
This is part of an effort to migrate from llvm::Optional to std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
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#
a9968c0a |
| 15-Mar-2021 |
Tomas Matheson <tomas.matheson@arm.com> |
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false. This means that the behavior of needsStackRealig
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false. This means that the behavior of needsStackRealignment does not correspond to it's name and description; a function might need stack realignment, but if it is not possible then this function returns false. Furthermore, needsStackRealignment is not virtual and therefore some backends have made use of canRealignStack to indicate whether a function needs stack realignment.
This patch attempts to clarify the situation by separating them and introducing new names:
- shouldRealignStack - true if there is any reason the stack should be realigned
- canRealignStack - true if we are still able to realign the stack (e.g. we can still reserve/have reserved a frame pointer)
- hasStackRealignment = shouldRealignStack && canRealignStack (not target customisable)
Targets can now override shouldRealignStack to indicate that stack realignment is required.
This change will make it easier in a future change to handle the case where we need to realign the stack but can't do so (for example when the register allocator creates an aligned spill after the frame pointer has been eliminated).
Differential Revision: https://reviews.llvm.org/D98716
Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
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Revision tags: llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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3d872cbc |
| 30-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE][NFC] Update comments
Update comments. I forgot to update it previously when I modified code.
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686988a5 |
| 26-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Optimize prologue/epilogue instructions
Optimize eliminate FP mechanism. This time optimize a function which has no call but fixed stack objects. LLVM eliminates FP on such functions now. Als
[VE] Optimize prologue/epilogue instructions
Optimize eliminate FP mechanism. This time optimize a function which has no call but fixed stack objects. LLVM eliminates FP on such functions now. Also, optimize GOT/PLT registers save/restore instructions if a given function doesn't uses them. In addition, remove generating mechanism of `.cfi` instructions since those are taken from other architectures and not inspected yet. Update regression tests, also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D92251
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3bd78b7c |
| 26-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Optimize emitSPAdjustment function
Optimize emitSPAdjustment function to generate as small as possible instructions to adjust SP.
Reviewed By: simoll
Differential Revision: https://reviews.ll
[VE] Optimize emitSPAdjustment function
Optimize emitSPAdjustment function to generate as small as possible instructions to adjust SP.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D92174
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Revision tags: llvmorg-11.0.1-rc1 |
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590aaa50 |
| 22-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Remove magic numbers 176
Remove magic numbers 176 from VE source codes and update comments.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D91958
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3a302349 |
| 22-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE][NFC] Clean stack frame description
Move stack frame description from VESubtarget.cpp to VEFrameLowering.cpp and add detail.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org
[VE][NFC] Clean stack frame description
Move stack frame description from VESubtarget.cpp to VEFrameLowering.cpp and add detail.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D91946
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f4517bbd |
| 17-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Implement JumpTable
Implement JumpTable to make BRIND work on VE. Update an existing br_jt regression test also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D91582
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44a4f939 |
| 15-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Optimize leaf functions
Optimize leaf functions by not generating save/restore for callee saved registers. Update regression tests also.
Reviewed By: simoll
Differential Revision: https://re
[VE] Optimize leaf functions
Optimize leaf functions by not generating save/restore for callee saved registers. Update regression tests also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D91539
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15a2baca |
| 16-Nov-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Change variable capitalization
Change dl to DL in VEFrameLowering.cpp. And clean some comments.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D91490
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d57bba7c |
| 04-Nov-2020 |
Sander de Smalen <sander.desmalen@arm.com> |
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
To accommodate frame layouts that have both fixed and scalable objects on the stack, describing a stack location or offset u
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
To accommodate frame layouts that have both fixed and scalable objects on the stack, describing a stack location or offset using a pointer + uint64_t is not sufficient. For this reason, we've introduced the StackOffset class, which models both the fixed- and scalable sized offsets.
The TargetFrameLowering::getFrameIndexReference is made to return a StackOffset, so that this can be used in other interfaces, such as to eliminate frame indices in PEI or to emit Debug locations for variables on the stack.
This patch is purely mechanical and doesn't change the behaviour of how the result of this function is used for fixed-sized offsets. The patch adds various checks to assert that the offset has no scalable component, as frame offsets with a scalable component are not yet supported in various places.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D90018
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
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dedaf3a2 |
| 27-May-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Dynamic stack allocation
Summary: This patch implements dynamic stack allocation for the VE target. Changes: * compiler-rt: `__ve_grow_stack` to request stack allocation on the VE. * VE: base p
[VE] Dynamic stack allocation
Summary: This patch implements dynamic stack allocation for the VE target. Changes: * compiler-rt: `__ve_grow_stack` to request stack allocation on the VE. * VE: base pointer support, dynamic stack allocation.
Differential Revision: https://reviews.llvm.org/D79084
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Revision tags: llvmorg-10.0.1-rc1 |
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7a7f2230 |
| 15-Apr-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Update integer arithmetic instructions
Summary: Changing all mnemonic to match assembly instructions to simplify mnemonic naming rules. This time update all fixed-point arithmetic instructions
[VE] Update integer arithmetic instructions
Summary: Changing all mnemonic to match assembly instructions to simplify mnemonic naming rules. This time update all fixed-point arithmetic instructions. This also corrects smax/smin code generations.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D77856
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#
015dee1a |
| 09-Apr-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Support (m)0 and (m)1 operands
Summary: VE has special operands to represent 0b000...000111...111 (`(m)0`) and 0b111...111000...000 (`(m)1`) bit sequences. This patch supports those operands n
[VE] Support (m)0 and (m)1 operands
Summary: VE has special operands to represent 0b000...000111...111 (`(m)0`) and 0b111...111000...000 (`(m)1`) bit sequences. This patch supports those operands not only in machine instructions but also in DAG lowering.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D77769
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2f8fb4d1 |
| 07-Apr-2020 |
Fangrui Song <maskray@google.com> |
[VE] Adapt aa26dd985848364df01d3f8f0f3eaccfd5ee80dc and 2481f26ac3f228cc085d4d68ee72dadc07afa48f
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e981a46a |
| 06-Apr-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Update lea/load/store instructions
Summary: Modify lea/load/store instructions to accept `disp(index, base)` style addressing mode (called ASX format). Also, uniform the number of DAG nodes to
[VE] Update lea/load/store instructions
Summary: Modify lea/load/store instructions to accept `disp(index, base)` style addressing mode (called ASX format). Also, uniform the number of DAG nodes to have 3 operands for this ASX format instructions, and update selectADDR functions to lower appropriate MI.
Reviewers: arsenm, simoll, k-ishizaka
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D76822
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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6 |
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df4cc35e |
| 20-Mar-2020 |
Fangrui Song <maskray@google.com> |
[VE] Fix -Wunused-private-field after D72598 and -Wdeprecated-declarations after D76348
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Revision tags: llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1 |
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92600c2e |
| 28-Jan-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] call isel with stack passing
Summary: Function calls and stack-passing of function arguments. Custom lowering, isel patterns and tests.
Reviewed By: arsenm
Differential Revision: https://revi
[VE] call isel with stack passing
Summary: Function calls and stack-passing of function arguments. Custom lowering, isel patterns and tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73461
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773ae62f |
| 16-Jan-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] i64 arguments, return values and constants
Summary: Support for i64 arguments (in register), return values and constants along with tests.
Reviewed By: arsenm
Differential Revision: https://r
[VE] i64 arguments, return values and constants
Summary: Support for i64 arguments (in register), return values and constants along with tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72776
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Revision tags: llvmorg-11-init |
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#
064859bd |
| 14-Jan-2020 |
Kazushi (Jam) Marukawa <marukawa@nec.com> |
[VE] Minimal codegen for empty functions
Summary: This patch implements minimal VE code generation for empty function bodies (no args, no value return).
Contents
* empty function code generation t
[VE] Minimal codegen for empty functions
Summary: This patch implements minimal VE code generation for empty function bodies (no args, no value return).
Contents
* empty function code generation test. * Minimal function prologue & epilogue emission * Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue. * I64 register class definitions.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72598
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