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Revision tags: llvmorg-21-init |
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| #
814b34f3 |
| 20-Jan-2025 |
Patryk Wychowaniec <pwychowaniec@pm.me> |
[AVR] Force relocations for non-encodable jumps (#121498)
This commit changes the branch emission logic so that instead of
throwing the "branch target out of range" error, we emit a relocation
ins
[AVR] Force relocations for non-encodable jumps (#121498)
This commit changes the branch emission logic so that instead of
throwing the "branch target out of range" error, we emit a relocation
instead.
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Revision tags: llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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| #
057f28be |
| 02-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove unused MCAsmLayout declarations and includes
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| #
7c83b7ef |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove two unused parameters from MCAsmBackend::fixupNeedsRelaxation
fixupNeedsRelaxation is a simple implementation for
fixupNeedsRelaxationAdvanced. Its users do not utilize MCAsmLayout or
MC
[MC] Remove two unused parameters from MCAsmBackend::fixupNeedsRelaxation
fixupNeedsRelaxation is a simple implementation for
fixupNeedsRelaxationAdvanced. Its users do not utilize MCAsmLayout or
MCRelaxableFragment.
Follow-up to 22c7317f1e954b34a46640db5d509bae1c633348
("[MC] Remove the MCAsmLayout parameter from relocation related functions").
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| #
22c7317f |
| 01-Jul-2024 |
Fangrui Song <i@maskray.me> |
[MC] Remove the MCAsmLayout parameter from relocation related functions
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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| #
f5699525 |
| 08-Dec-2023 |
Fangrui Song <i@maskray.me> |
[CSKY] Update shouldForceRelocation after #73721
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3 |
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4a0ccfa8 |
| 13-Oct-2023 |
Kazu Hirata <kazu@google.com> |
Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class as opposed to an
enum. This patch replaces suppo
Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class as opposed to an
enum. This patch replaces support::{big,little,native} with
llvm::endianness::{big,little,native}.
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Revision tags: llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3 |
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| #
432caca3 |
| 18-Feb-2023 |
Fangrui Song <i@maskray.me> |
Simplify with hasFeature. NFC
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Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4 |
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| #
76fc5fe6 |
| 31-Oct-2022 |
Zi Xuan Wu (Zeson) <zixuan.wu@linux.alibaba.com> |
[CSKY] Fix the adjustFixupValue of fixup_csky_pcrel_uimm7_scale4
The logic to calculate the offset of lrw16 is complex and the Value
before adjustFixupValue should in range of 0 <= (Value >> 2) <= 0
[CSKY] Fix the adjustFixupValue of fixup_csky_pcrel_uimm7_scale4
The logic to calculate the offset of lrw16 is complex and the Value
before adjustFixupValue should in range of 0 <= (Value >> 2) <= 0xfe.
It also influences the relax condition.
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Revision tags: llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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| #
481e2dde |
| 01-Apr-2022 |
Kees Cook <keescook@chromium.org> |
[CSKY] AsmBackend: Wrap Inst.dump() in LLVM_DEBUG
-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=CSKY -DLLVM_ENABLE_ASSERTIONS=OFF
builds will fail to link due to undefined `llvm::MCInst::dump() const`
```
l
[CSKY] AsmBackend: Wrap Inst.dump() in LLVM_DEBUG
-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=CSKY -DLLVM_ENABLE_ASSERTIONS=OFF
builds will fail to link due to undefined `llvm::MCInst::dump() const`
```
ld.lld: error: undefined symbol: llvm::MCInst::dump() const
>>> referenced by CSKYAsmBackend.cpp
>>> /home/kees/src/built-compilers/llvm/stage2-prof-gen/lto.cache/llvmcache-0656FC38C728A7FE0F767D10CD84C7F820114C46:(llvm::CSKYAsmBackend::relaxInstruction(llvm::MCInst&, llvm::MCSubtargetInfo const&) const)
```
Wrap it in LLVM_DEBUG().
Fixes https://github.com/llvm/llvm-project/issues/54684
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D122854
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| #
0365c54c |
| 29-Mar-2022 |
Zi Xuan Wu <zixuan.wu@linux.alibaba.com> |
[CSKY] Add CSKYTargetObjectFile to support exception handling
Initialize TargetLoweringObjectFileELF and EH header.
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| #
582836fa |
| 18-Mar-2022 |
Zi Xuan Wu <zixuan.wu@linux.alibaba.com> |
[CSKY] Enhance asm parser and relocation fixup for some special symbol address instruction
Add processing of parsing and emiting lrw/jsri/jmpi instruction, including related fixup and relocation.
Ad
[CSKY] Enhance asm parser and relocation fixup for some special symbol address instruction
Add processing of parsing and emiting lrw/jsri/jmpi instruction, including related fixup and relocation.
Add relax support about pseudo instructions such as jbr/jbsr.
Add objdump format support like arm in llvm-objdump.
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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| #
de10a02f |
| 20-Oct-2021 |
Zi Xuan Wu <zixuan.wu@linux.alibaba.com> |
[CSKY] Complete to add basic integer instruction set
Complete the basic integer instruction set and add related predictor in CSKY.td.
And it includes the instruction definition and asm parser suppor
[CSKY] Complete to add basic integer instruction set
Complete the basic integer instruction set and add related predictor in CSKY.td.
And it includes the instruction definition and asm parser support.
Differential Revision: https://reviews.llvm.org/D111701
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2 |
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| #
e63455d5 |
| 09-Aug-2021 |
Peter Smith <peter.smith@arm.com> |
[MC] Use local MCSubtargetInfo in writeNops
On some architectures such as Arm and X86 the encoding for a nop may
change depending on the subtarget in operation at the time of
encoding. This change r
[MC] Use local MCSubtargetInfo in writeNops
On some architectures such as Arm and X86 the encoding for a nop may
change depending on the subtarget in operation at the time of
encoding. This change replaces the per module MCSubtargetInfo retained
by the targets AsmBackend in favour of passing through the local
MCSubtargetInfo in operation at the time.
On Arm using the architectural NOP instruction can have a performance
benefit on some implementations.
For Arm I've deleted the copy of the AsmBackend's MCSubtargetInfo to
limit the chances of this causing problems in the future. I've not
done this for other targets such as X86 as there is more frequent use
of the MCSubtargetInfo and it looks to be for stable properties that
we would not expect to vary per function.
This change required threading STI through MCNopsFragment and
MCBoundaryAlignFragment.
I've attempted to take into account the in tree experimental backends.
Differential Revision: https://reviews.llvm.org/D45962
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Revision tags: llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
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| #
4bb60c28 |
| 20-Apr-2021 |
Zi Xuan Wu <zixuan.wu@linux.alibaba.com> |
[CSKY 6/n] Add support branch and symbol series instruction
This patch adds basic CSKY branch instructions and symbol address series instructions.
Those two kinds of instruction have relationship be
[CSKY 6/n] Add support branch and symbol series instruction
This patch adds basic CSKY branch instructions and symbol address series instructions.
Those two kinds of instruction have relationship between each other, and it involves much work about Fixups.
For now, basic instructions are enabled except for disassembler support.
We would support to generate basic codegen asm firstly and delay disassembler work later.
Differential Revision: https://reviews.llvm.org/D95029
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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| #
ec17c4f0 |
| 22-Dec-2020 |
Zi Xuan Wu <zixuan.wu@linux.alibaba.com> |
[CSKY 3/n] Add bare-bones C-SKY MCTargetDesc
Add basis of CSKY MCTargetDesc and it's enough to compile and link but doesn't yet do anything particularly useful.
Once an ASM parser and printer are ad
[CSKY 3/n] Add bare-bones C-SKY MCTargetDesc
Add basis of CSKY MCTargetDesc and it's enough to compile and link but doesn't yet do anything particularly useful.
Once an ASM parser and printer are added in the next two patches, the whole thing can be usefully tested.
Differential Revision: https://reviews.llvm.org/D93372
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