[PEI][ARM] Switch to backwards frame index elimination

This adds better support for call frame pseudos that adjust SP in
PEI::replaceFrameIndicesBackward.

Running frame index elimination backwards

[PEI][ARM] Switch to backwards frame index elimination

This adds better support for call frame pseudos that adjust SP in
PEI::replaceFrameIndicesBackward.

Running frame index elimination backwards is preferred because it can
do backwards register scavenging (on targets that require scavenging)
which does not rely on accurate kill flags.

Differential Revision: https://reviews.llvm.org/D156434

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[CodeGen] Store call frame size in MachineBasicBlock

Record the call frame size on entry to each basic block. This is usually
zero except when a basic block has been split in the middle of a call
se

[CodeGen] Store call frame size in MachineBasicBlock

Record the call frame size on entry to each basic block. This is usually
zero except when a basic block has been split in the middle of a call
sequence.

This simplifies PEI::replaceFrameIndices which previously had to visit
basic blocks in a specific order and had special handling for
unreachable blocks. More importantly it paves the way for an equally
simple implementation of a backwards version of replaceFrameIndices,
which is required to fully convert PrologEpilogInserter to backwards
register scavenging, which is preferred because it does not rely on
accurate kill flags.

Differential Revision: https://reviews.llvm.org/D156113

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Revert "[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI."

This reverts commit 58d1eaa3b6ce4f7285c51f83faff7a3ac374c746.

[CodeGen] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D154281

[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.

Record the SP adjustment on entry to each basic block. This is almost
always zero except on targets like ARM which can split a basic block i

[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.

Record the SP adjustment on entry to each basic block. This is almost
always zero except on targets like ARM which can split a basic block in
the middle of a call sequence.

This simplifies PEI::replaceFrameIndices which previously had to visit
basic blocks in a specific order and had special handling for
unreachable blocks. More importantly it paves the way for an equally
simple implementation of a backwards version of replaceFrameIndices,
which is required to fully convert PrologEpilogInserter to backwards
register scavenging, which is preferred because it does not rely on
accurate kill flags.

Differential Revision: https://reviews.llvm.org/D154281

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[PEI][Mips] Switch to backwards frame index elimination

This adds support for running PEI::replaceFrameIndicesBackward with no
RegisterScavenger, and basic support for eliminating call frame pseudo

[PEI][Mips] Switch to backwards frame index elimination

This adds support for running PEI::replaceFrameIndicesBackward with no
RegisterScavenger, and basic support for eliminating call frame pseudo
instructions.

Differential Revision: https://reviews.llvm.org/D154347

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[PEI] Simplify iterator handling in replaceFrameIndicesBackward. NFCI.

Differential Revision: https://reviews.llvm.org/D154346

Weaken MFI Max Call Frame Size Assertion

A year ago when I was not invested at all into compilers, I found an assertion error when building an AArch64 debug build with LTO + CFI, among other combina

Weaken MFI Max Call Frame Size Assertion

A year ago when I was not invested at all into compilers, I found an assertion error when building an AArch64 debug build with LTO + CFI, among other combinations.

It was posted as a github issue here: https://github.com/llvm/llvm-project/issues/54088

I took it upon myself to revisit the issue now that I have spent some more time working on LLVM.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D151276

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[MC] Add MCRegisterInfo::regunits for iteration over register units

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098

PrologEpilogInserter: Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds

Wrap debug code with the LLVM_DEBUG macro; NFC

While investigating a bug in Clang, I noticed that -Wframe-larger-than
was emitting extra debug information along with the diagnostic. It
turns out tha

Wrap debug code with the LLVM_DEBUG macro; NFC

While investigating a bug in Clang, I noticed that -Wframe-larger-than
was emitting extra debug information along with the diagnostic. It
turns out that 2e1e2f52f357768186ecfcc5ac53d5fa53d1b094 fixed an issue
with the diagnostic, but accidentally left in some debug code that was
exposed in all builds.

So now we no longer emit things like:
8/4294967304 (0.00%) spills, 4294967296/4294967304 (100.00%) variables
along with the diagnostic

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Fix uninitialized class members

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148692

Fix uninitialized pointer members in CodeGen

This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differentia

Fix uninitialized pointer members in CodeGen

This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148303

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Revert "HHVM calling conventions."

This reverts commit cce239c45d6ef3865a017b5b3f935964e0348734.

HHVM calling conventions are unused. Remove them by partially reverting the commit.

Reviewed By: Ma

Revert "HHVM calling conventions."

This reverts commit cce239c45d6ef3865a017b5b3f935964e0348734.

HHVM calling conventions are unused. Remove them by partially reverting the commit.

Reviewed By: MaskRay, MatzeB

Differential Revision: https://reviews.llvm.org/D124330

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[zero-call-used-regs] Mark only non-debug instruction's register as used

zero-call-used-regs pass generate an xor instruction to help mitigate
return-oriented programming exploits via zeroing out us

[zero-call-used-regs] Mark only non-debug instruction's register as used

zero-call-used-regs pass generate an xor instruction to help mitigate
return-oriented programming exploits via zeroing out used registers. But
in this below test case with -g option there is dbg.value instruction
associating the register with the debug-info description of the formal
parameter d, which makes the register appear used, therefore it zero the
register edi in -g case and makes binary different from without -g option.

The pass should be looking only at the non-debug uses.

$ cat test.c
char a[];
int b;
__attribute__((zero_call_used_regs("used"))) char c(int d) {
*a = ({
int e = d;
b;
});
}

This fixes https://github.com/llvm/llvm-project/issues/57962.

Differential Revision: https://reviews.llvm.org/D138757

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[CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStackSlot

With D134950, targets get notified when a virtual register is created and/or
cloned. Targets can do the needful wit

[CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStackSlot

With D134950, targets get notified when a virtual register is created and/or
cloned. Targets can do the needful with the delegate callback. AMDGPU propagates
the virtual register flags maintained in the target file itself. They are useful
to identify a certain type of machine operands while inserting spill stores and
reloads. Since RegAllocFast spills the physical register itself, there is no way
its virtual register can be mapped back to retrieve the flags. It can be solved
by passing the virtual register as an additional argument. This argument has no
use when the spill interfaces are called during the greedy allocator or even the
PrologEpilogInserter and can pass a null register in such cases.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D138656

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[X86] Don't zero out %eax if both %al and %ah are used

The iterator over super and sub registers doesn't include both 8-bit
registers in its list. So if both registers are used and only one of
them

[X86] Don't zero out %eax if both %al and %ah are used

The iterator over super and sub registers doesn't include both 8-bit
registers in its list. So if both registers are used and only one of
them is live on return, then we need to make sure that the other 8-bit
register is also marked as live and not zeroed out.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D139679

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PEI should be able to use backward walk in replaceFrameIndicesBackward.

The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger

PEI should be able to use backward walk in replaceFrameIndicesBackward.

The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D137574

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Revert D137574 "PEI should be able to use backward walk in replaceFrameIndicesBackward."

This reverts commit e05ce03cfa0b36e9b99149e21afcb1fc039df813.

Caused asan use-after-poison to 4 DebugInfo/AM

Revert D137574 "PEI should be able to use backward walk in replaceFrameIndicesBackward."

This reverts commit e05ce03cfa0b36e9b99149e21afcb1fc039df813.

Caused asan use-after-poison to 4 DebugInfo/AMDGPU/ tests.
Triggered in PEI::replaceFrameIndicesBackward called llvm::MachineInstr::getNumOperands

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PEI should be able to use backward walk in replaceFrameIndicesBackward.

The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger

PEI should be able to use backward walk in replaceFrameIndicesBackward.

The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D137574

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[PEI][NFC] Refactoring of the debug instructions frame index replacement

This is required for the upcoming backward PEI::replaceFrameIndices version.
Both forward and backward versions will use same

[PEI][NFC] Refactoring of the debug instructions frame index replacement

This is required for the upcoming backward PEI::replaceFrameIndices version.
Both forward and backward versions will use same code for debug instruction processing.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D137741

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[CodeGen] Improve large stack frame diagnostic

Add statistics about how much memory is used, in variables, spills, and
unsafestack.

Issue #58168 describes some of the difficulty diagnosing stack si

[CodeGen] Improve large stack frame diagnostic

Add statistics about how much memory is used, in variables, spills, and
unsafestack.

Issue #58168 describes some of the difficulty diagnosing stack size issues
identified by -Wframe-larger-than. D135488 addresses some of those issues by
giving developers a method to view the stack layout and thereby understand
where and how stack memory is used.

However, that solution requires an additional pass, when a short summary about
how the compiler has allocated stack memory can inform developers about where
they should investigate. When they need the complete context, D135488 can
provide them with a more comprehensive set of diagnostics.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D136484

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[CodeGen] Don't zero callee-save registers with zero-call-used-regs (PR57692)

Callee save registers must be preserved, so -fzero-call-used-regs
should not be zeroing them. The previous implementatio

[CodeGen] Don't zero callee-save registers with zero-call-used-regs (PR57692)

Callee save registers must be preserved, so -fzero-call-used-regs
should not be zeroing them. The previous implementation only did
not zero callee save registers that were saved&restored inside the
function, but we need preserve all of them.

Fixes https://github.com/llvm/llvm-project/issues/57692.

Differential Revision: https://reviews.llvm.org/D133946

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[X86][AArch64][NFC] Simplify querying used argument registers

Registers used for arguments are listed as "live-ins" into the starting
basic block. This means we don't have to go through a potentiall

[X86][AArch64][NFC] Simplify querying used argument registers

Registers used for arguments are listed as "live-ins" into the starting
basic block. This means we don't have to go through a potentially
expensive search through all possible argument registers when we only
care about used argument registers.

Differential Revision: https://reviews.llvm.org/D132181

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[NFC] Fix wrong comment.