Revision tags: llvmorg-21-init, llvmorg-19.1.7 |
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67efbd0b |
| 08-Jan-2025 |
Ryan Mansfield <ryan_mansfield@apple.com> |
[LLVM] Fix various cl::desc typos and whitespace issues (NFC) (#121955)
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3 |
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d871b2e0 |
| 06-Aug-2024 |
Alexis Engelke <engelke@in.tum.de> |
[CodeGen] Use optimized domtree for MachineFunction (#102107)
The dominator tree gained an optimization to use block numbers instead
of a DenseMap to store blocks. Given that machine basic blocks a
[CodeGen] Use optimized domtree for MachineFunction (#102107)
The dominator tree gained an optimization to use block numbers instead
of a DenseMap to store blocks. Given that machine basic blocks already
have numbers, expose these via appropriate GraphTraits. For debugging,
block number epochs are added to MachineFunction -- this greatly helps
in finding uses of block numbers after RenumberBlocks().
In a few cases where dominator trees are preserved across renumberings,
the dominator tree is updated to use the new numbers.
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4c23c1b9 |
| 06-Aug-2024 |
Alexis Engelke <engelke@in.tum.de> |
[CodeGen] Use SmallVector for MBB preds/succs (#101948)
Avoid extra heap allocations for typical predecessor/successor counts.
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Revision tags: llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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09989996 |
| 12-Jul-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)
- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass
[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)
- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
- `LazyMachineBlockFrequencyInfo::print` is empty, drop it due to new
pass manager migration.
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79d0de2a |
| 09-Jul-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
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Revision tags: llvmorg-18.1.8 |
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4b24c2df |
| 12-Jun-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen][NewPM] Split `MachinePostDominators` into a concrete analysis result (#95113)
`MachinePostDominators` version of #94571.
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837dc542 |
| 11-Jun-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree v
[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.
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Revision tags: llvmorg-18.1.7, llvmorg-18.1.6 |
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026a29e8 |
| 07-May-2024 |
Kazu Hirata <kazu@google.com> |
[Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (#91304)
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.
- StringRef::oper
[Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (#91304)
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.
- StringRef::operator==/!= outnumber StringRef::equals by a factor of
53 under llvm/ in terms of their usage.
- The elimination of StringRef::equals brings StringRef closer to
std::string_view, which has operator== but not equals.
- S == "foo" is more readable than S.equals("foo"), especially for
!Long.Expression.equals("str") vs Long.Expression != "str".
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Revision tags: llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3 |
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2d854dd3 |
| 11-Oct-2023 |
Fangrui Song <i@maskray.me> |
Move global namespace cl::opt inside llvm:: or internalize them
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Revision tags: llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6 |
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b244a4c4 |
| 06-Jun-2023 |
Amir Ayupov <aaupov@fb.com> |
[profi][NFC] Get rid of afdo_detail::TypeMap
Parametrize SampleProfileInference and SampleProfileLoaderBaseImpl by function type (Function/MachineFunction) instead of block type (BasicBlock/MachineB
[profi][NFC] Get rid of afdo_detail::TypeMap
Parametrize SampleProfileInference and SampleProfileLoaderBaseImpl by function type (Function/MachineFunction) instead of block type (BasicBlock/MachineBasicBlock). Move out specializations to appropriate locations.
This change makes it possible to use GraphTraits instead of a custom TypeMap and make SampleProfileInference not dependent on LLVM types, paving the way for generalizing SampleProfileInference interfaces to BOLT IR types (BinaryFunction/BinaryBasicBlock) in stale profile matching (D144500).
Reviewed By: hoy
Differential Revision: https://reviews.llvm.org/D152187
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Revision tags: llvmorg-16.0.5, llvmorg-16.0.4 |
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958a3d8e |
| 10-May-2023 |
Hongtao Yu <hoy@fb.com> |
[FS-AFDO] Do not load non-FS profile in MIR loader.
I was seeing a regression when enabling FS discriminators on an non-FS CSSPGO build. This is because a probe can get a zero-valued discriminator a
[FS-AFDO] Do not load non-FS profile in MIR loader.
I was seeing a regression when enabling FS discriminators on an non-FS CSSPGO build. This is because a probe can get a zero-valued discriminator at a specific pass and that could lead to accidentally loading the corresponding base counter in the non-FS profile, while a non-zeo discriminator would end up getting zero samples. This could in turn undo the sample distribution effort done by previous BFI maintenance work and the probe distribution factor work for pseudo probes specifically. To mitigate that I'm disabling loading a non-FS profile against FS discriminators. The problem should also exist with non-CS AutoFDO, so I'm doing this for it too.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D149597
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b7d9322b |
| 10-May-2023 |
Hongtao Yu <hoy@fb.com> |
[FS-AFDO] Load pseudo probe profile on MIR
This change enables loading pseudo-probe based profile on MIR. Different from the IR profile loader, callsites are excluded from MIR profile loading since
[FS-AFDO] Load pseudo probe profile on MIR
This change enables loading pseudo-probe based profile on MIR. Different from the IR profile loader, callsites are excluded from MIR profile loading since they are not assinged a FS discriminator. Using zero as the discriminator is not accurate and would undo the distribution work done by the IR loader based on pseudo probe distribution factor. We reply on block probes only for FS profile loading.
Some refactoring is done to the IR profile loader so that `getProbeWeight` can be shared by both loaders.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D148584
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Revision tags: llvmorg-16.0.3, llvmorg-16.0.2 |
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#
9fa721c7 |
| 17-Apr-2023 |
Wang, Xin10 <xin10.wang@intel.com> |
remove useless call in MIRSampleProfile.cpp
This call getSummary returns a value but nobody take it.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D148305
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Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
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#
ebe09e2a |
| 10-Mar-2023 |
Rong Xu <xur@google.com> |
[FSAFDO] Improve FS discriminator encoding
This change improves FS discriminators in the following ways: (1) use call-stack debug information in the the to generate discriminators: the same (src/lin
[FSAFDO] Improve FS discriminator encoding
This change improves FS discriminators in the following ways: (1) use call-stack debug information in the the to generate discriminators: the same (src/line) DILs can now have same discriminator value if they come from different call-stacks. This effectively increases the usable discriminator values for each round of FS discriminator pass. (2) don't generate the FS discriminator for meta instructions (i.e. instructions not emitted). This reduces the number discriminators conflicts (for the case we run out of discriminator bits for that pass). (3) use less expensive hashing of xxHash64.
These improvements should bring better performance for FSAFDO and they should be used by default. But this change creates incompatible FS discriminators. For the iterative profile users, they might see a performance drop in the first release with this change (due to the fact that the profiles have the old discriminators and the compiler uses the new discriminator). We have measured that this is not more than 1.5% on several benchmarks. Note the degradation should be gone in the second release and one should expect a performance gain over the binary without this change.
One possible solution to the iterative profile issue would be separating discriminators for profile-use and the ones emitted to the binary. This would require a mechanism to allow two sets of discriminators to be maintained and then phasing out the first approach. This is too much churn in the compiler and the performance implications do not seem to be worth the effort.
Instead, we put the changes under an option so iterative profile users can do a gradual rollout of this change. We will make the option default value to true in a later patch and eventually purge this option from the code base.
Differential Revision: https://reviews.llvm.org/D145171
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Revision tags: llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2 |
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#
516e3017 |
| 01-Feb-2023 |
Steven Wu <stevenwu@apple.com> |
[NFC][Profile] Access profile through VirtualFileSystem
Make the access to profile data going through virtual file system so the inputs can be remapped. In the context of the caching, it can make su
[NFC][Profile] Access profile through VirtualFileSystem
Make the access to profile data going through virtual file system so the inputs can be remapped. In the context of the caching, it can make sure we capture the inputs and provided an immutable input as profile data.
Reviewed By: akyrtzi, benlangmuir
Differential Revision: https://reviews.llvm.org/D139052
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Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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#
989f1c72 |
| 15-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-in
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3 |
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#
a278250b |
| 10-Mar-2022 |
Nico Weber <thakis@chromium.org> |
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https:/
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
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7f230fee |
| 07-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
after: 1061034926 before: 1063332844
Differential Revision: https://reviews.llvm.org/D121169
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Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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#
bf113849 |
| 22-Nov-2021 |
Rong Xu <xur@google.com> |
[SampleFDO] Recompute BFI if the sample loader changes BPI
The MIR sample loader changes the branch probability but not BFI. Here we force a recompute of BFI if the branch probabilities are changed.
[SampleFDO] Recompute BFI if the sample loader changes BPI
The MIR sample loader changes the branch probability but not BFI. Here we force a recompute of BFI if the branch probabilities are changed.
Also register the MIR FSAFDO passes properly.
Differential Revision: https://reviews.llvm.org/D114400
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#
cba40c4e |
| 09-Nov-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use MachineBasicBlock::{successors,predecessors} (NFC)
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2 |
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#
1e586bcc |
| 19-Aug-2021 |
Adrian Prantl <aprantl@apple.com> |
Move function definition out-of-line to fix the modularized build (NFC)
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5fdaaf7f |
| 18-Aug-2021 |
Rong Xu <xur@google.com> |
[SampleFDO] Flow Sensitive Sample FDO (FSAFDO) profile loader
This patch implements Flow Sensitive Sample FDO (FSAFDO) profile loader. We have two profile loaders for FS profile, one before RegAlloc
[SampleFDO] Flow Sensitive Sample FDO (FSAFDO) profile loader
This patch implements Flow Sensitive Sample FDO (FSAFDO) profile loader. We have two profile loaders for FS profile, one before RegAlloc and one before BlockPlacement.
To enable it, when -fprofile-sample-use=<profile> is specified, add "-enable-fs-discriminator=true \ -disable-ra-fsprofile-loader=false \ -disable-layout-fsprofile-loader=false" to turn on the FS profile loaders.
Differential Revision: https://reviews.llvm.org/D107878
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