Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6 |
|
#
1562b70e |
| 13-Dec-2024 |
paperchalice <liujunchang97@outlook.com> |
Reapply "[DomTreeUpdater] Move critical edge splitting code to updater" (#119547)
This relands commit #115111.
Use traditional way to update post dominator tree, i.e. break critical
edge splitting
Reapply "[DomTreeUpdater] Move critical edge splitting code to updater" (#119547)
This relands commit #115111.
Use traditional way to update post dominator tree, i.e. break critical
edge splitting into insert, insert, delete sequence.
When splitting critical edges, the post dominator tree may change its
root node, and `setNewRoot` only works in normal dominator tree...
See
https://github.com/llvm/llvm-project/blob/6c7e5827eda26990e872eb7c3f0d7866ee3c3171/llvm/include/llvm/Support/GenericDomTree.h#L684-L687
show more ...
|
#
553058f8 |
| 11-Dec-2024 |
paperchalice <liujunchang97@outlook.com> |
Revert "[DomTreeUpdater] Move critical edge splitting code to updater" (#119512)
Reverts llvm/llvm-project#115111 Causes #119511
|
#
79047fac |
| 11-Dec-2024 |
paperchalice <liujunchang97@outlook.com> |
[DomTreeUpdater] Move critical edge splitting code to updater (#115111)
Support critical edge splitting in dominator tree updater. Continue the
work in #100856.
Compile time check:
https://llvm
[DomTreeUpdater] Move critical edge splitting code to updater (#115111)
Support critical edge splitting in dominator tree updater. Continue the
work in #100856.
Compile time check:
https://llvm-compile-time-tracker.com/compare.php?from=87c35d782795b54911b3e3a91a5b738d4d870e55&to=42b3e5623a9ab4c3648564dc0926b36f3b438a3a&stat=instructions%3Au
show more ...
|
Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2 |
|
#
18184045 |
| 09-Oct-2024 |
William G Hatch <william@hatch.uno> |
[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)
This patch handles virtual registers in the VarLocBasedImpl of the
LiveDebugVariables pass, allowing it to be used o
[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)
This patch handles virtual registers in the VarLocBasedImpl of the
LiveDebugVariables pass, allowing it to be used on architectures that
depend on virtual registers in debugging, like NVPTX. It enables the
pass for NVPTX.
show more ...
|
Revision tags: llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
|
#
6a907699 |
| 11-Jul-2024 |
Nikita Popov <npopov@redhat.com> |
Revert "[CodeGen] Remove `applySplitCriticalEdges` in `MachineDominatorTree` (#97055)"
This reverts commit c5e5088033fed170068d818c54af6862e449b545.
Causes large compile-time regressions.
|
#
c5e50880 |
| 11-Jul-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen] Remove `applySplitCriticalEdges` in `MachineDominatorTree` (#97055)
Summary:
- Remove wrappers in `MachineDominatorTree`.
- Remove `MachineDominatorTree` update code in
`MachineBasicBlo
[CodeGen] Remove `applySplitCriticalEdges` in `MachineDominatorTree` (#97055)
Summary:
- Remove wrappers in `MachineDominatorTree`.
- Remove `MachineDominatorTree` update code in
`MachineBasicBlock::SplitCriticalEdge`.
- Use `MachineDomTreeUpdater` in passes which call
`MachineBasicBlock::SplitCriticalEdge` and preserve
`MachineDominatorTreeWrapperPass` or CFG analyses.
Commit abea99f65a97248974c02a5544eaf25fc4240056 introduced related
methods in 2014. Now we have SemiNCA based dominator tree in 2017 and
dominator tree updater, the solution adopted here seems a bit outdated.
show more ...
|
Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2 |
|
#
8bf7f86d |
| 17-Apr-2023 |
Akshay Khadse <akshayskhadse@gmail.com> |
Fix uninitialized pointer members in CodeGen
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.
Reviewed By: LuoYuanke
Differentia
Fix uninitialized pointer members in CodeGen
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D148303
show more ...
|
Revision tags: llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2 |
|
#
62c7f035 |
| 07-Feb-2023 |
Archibald Elliott <archibald.elliott@arm.com> |
[NFC][TargetParser] Remove llvm/ADT/Triple.h
I also ran `git clang-format` to get the headers in the right order for the new location, which has changed the order of other headers in two files.
|
Revision tags: llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
|
#
e9ea7a0e |
| 21-Sep-2022 |
Heejin Ahn <aheejin@gmail.com> |
[WebAssembly] Use LiveDebugValues analysis
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at the end of a BB, and this is the analysis extends their lifetime when possible, gr
[WebAssembly] Use LiveDebugValues analysis
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at the end of a BB, and this is the analysis extends their lifetime when possible, greatly increasing the coverage of variable debug info.
Specifically, this removes the current constraint that this analysis is only used with physical registers, which was first introduced in D18421, because Wasm uses only virtual registers. I don't think there's anything inherent in this analysis that only applies to physical registers; it was just because all targets using this analysis ran this at the end of their compiliation pipeline, at which point all their vregs had been allocated, and Wasm's debug info infrastructure was not really set up yet, so it was not using it.
This adds supports to Wasm-specific target-index operands, defined in https://github.com/llvm/llvm-project/blob/2166d9529a60d1cdedb733d2e4134c971f0969ec/llvm/lib/Target/WebAssembly/WebAssembly.h#L87-L100. Among these, `TI_LOCAL`, `TI_LOCAL_INDIRECT`, and `TI_OPERAND_STACK` are used by Wasm `DBG_VALUE` instructions.
This does not yet handle mutable target indices, i.e., this does not terminate a `DBG_VALUE` for a local index when we encounter a new `local.set` or `local.tee`. It will be implemented as a follow-up.
Reviewed By: dschuff, jmorse
Differential Revision: https://reviews.llvm.org/D138943
show more ...
|
Revision tags: llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
|
#
989f1c72 |
| 15-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-in
Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169
after: 1061034926 before: 1063332844
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
show more ...
|
Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3 |
|
#
a278250b |
| 10-Mar-2022 |
Nico Weber <thakis@chromium.org> |
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https:/
Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
show more ...
|
#
7f230fee |
| 07-Mar-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup codegen includes
after: 1061034926 before: 1063332844
Differential Revision: https://reviews.llvm.org/D121169
|
Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
|
#
3a8c5148 |
| 06-Feb-2022 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use = default (NFC)
Identified with modernize-use-equals-default
|
#
6e03a68b |
| 02-Feb-2022 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo] Re-enable instruction referencing for x86_64
After discussion in D116821 this was turned off in 74db5c8c95e, 14aaaa12366f7 applied to limit the maximum memory consumption in rare conditi
[DebugInfo] Re-enable instruction referencing for x86_64
After discussion in D116821 this was turned off in 74db5c8c95e, 14aaaa12366f7 applied to limit the maximum memory consumption in rare conditions, plus some performance patches.
show more ...
|
Revision tags: llvmorg-15-init |
|
#
d27f0226 |
| 24-Jan-2022 |
Jeremy Morse <jeremy.morse@sony.com> |
[NFC][DebugInfo] Strip out an undesired #if 0 block
As mentioned in discussion of D116821, it's better to just delete this block than keep it hanging around.
|
#
74db5c8c |
| 24-Jan-2022 |
Jeremy Morse <jeremy.morse@sony.com> |
Revert rG6a605b97a200 due to excessive memory use
Over in the comments for D116821, some use-cases have cropped up where there's a substantial increase in memory usage. A quick inspection shows that
Revert rG6a605b97a200 due to excessive memory use
Over in the comments for D116821, some use-cases have cropped up where there's a substantial increase in memory usage. A quick inspection shows that a) it's a lot of memory and b) there are several things to be done to reduce it. Reverting (via disabling this feature by default) to avoid bothering people in the meantime.
show more ...
|
Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
#
6a605b97 |
| 12-Jan-2022 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo] Move flag for instr-ref to LLVM option, from TargetOptions
This feature was previously controlled by a TargetOptions flag, and I figured that codegen::InitTargetOptionsFromCodeGenFlags w
[DebugInfo] Move flag for instr-ref to LLVM option, from TargetOptions
This feature was previously controlled by a TargetOptions flag, and I figured that codegen::InitTargetOptionsFromCodeGenFlags would default it to "on" for all frontends. Enabling by default was discussed here:
https://lists.llvm.org/pipermail/llvm-dev/2021-November/153653.html
and originally supposed to happen in 3c045070882f3, but it didn't actually take effect, as it turns out frontends initialize TargetOptions themselves. This patch moves the flag from a TargetOptions flag to a global flag to CodeGen, where it isn't immediately affected by the frontend being used. Hopefully this will actually cause instr-ref to be on by default on x86_64 now!
This patch is easily reverted, and chances of turbulence are moderately high. If you need to revert, please consider instead commenting out the 'return true' part of llvm::debuginfoShouldUseDebugInstrRef to turn the feature off, and dropping me an email.
Differential Revision: https://reviews.llvm.org/D116821
show more ...
|
Revision tags: llvmorg-13.0.1-rc1 |
|
#
9b8b1645 |
| 07-Nov-2021 |
Benjamin Kramer <benny.kra@googlemail.com> |
Put implementation details into anonymous namespaces. NFCI.
|
#
e3e1da20 |
| 14-Oct-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
Follow up to a3936a6c19c, correctly select LiveDebugValues implementation
Some functions get opted out of instruction referencing if they're being compiled with no optimisations, however the LiveDeb
Follow up to a3936a6c19c, correctly select LiveDebugValues implementation
Some functions get opted out of instruction referencing if they're being compiled with no optimisations, however the LiveDebugValues pass picks one implementation and then sticks with it through the rest of compilation. This leads to a segfault if we encounter a function that doesn't use instr-ref (because it's optnone, for example), but we've already decided to use InstrRefBasedLDV which expects to be passed a DomTree.
Solution: keep both implementations around in the pass, and pick whichever one is appropriate to the current function.
show more ...
|
#
a3936a6c |
| 13-Oct-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo][InstrRef] Use PHI placement utilities for machine locations
InstrRefBasedLDV used to try and determine which values are in which registers using a lattice approach; however this is hard
[DebugInfo][InstrRef] Use PHI placement utilities for machine locations
InstrRefBasedLDV used to try and determine which values are in which registers using a lattice approach; however this is hard to understand, and broken in various ways. This patch replaces that approach with a standard SSA approach using existing LLVM utilities. PHIs are placed at dominance frontiers; value propagation then eliminates un-necessary PHIs.
This patch also adds a bunch of unit tests that should cover many of the weirder forms of control flow.
Differential Revision: https://reviews.llvm.org/D110173
show more ...
|
Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2 |
|
#
0116ed00 |
| 25-Aug-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo][InstrRef] Don't use instr-ref for unoptimised functions
InstrRefBasedLDV is marginally slower than VarlocBasedLDV when analysing optimised code -- however, it's much slower when analysin
[DebugInfo][InstrRef] Don't use instr-ref for unoptimised functions
InstrRefBasedLDV is marginally slower than VarlocBasedLDV when analysing optimised code -- however, it's much slower when analysing code compiled -O0.
To avoid this: don't use instruction referencing for -O0 functions. In the "pure" case of unoptimised code, this won't really harm the debugging experience because most variables won't have been promoted off the stack, so can't go missing. It becomes more complicated when optimised code is inlined into functions marked optnone; however these are rare, and as -O0 doesn't run many optimisations there should be little damage to the debug experience as a result.
I've taken the opportunity to refactor testing for instruction-referencing into a MachineFunction method, which seems the most appropriate place to put it.
Differential Revision: https://reviews.llvm.org/D108585
show more ...
|
#
708cbda5 |
| 17-Aug-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo][InstrRef] Honour too-much-debug-info cutouts
This reapplies 54a61c94f93, its follow up in 547b712500e, which were reverted 95fe61e63954. Original commit message:
VarLoc based LiveDebugV
[DebugInfo][InstrRef] Honour too-much-debug-info cutouts
This reapplies 54a61c94f93, its follow up in 547b712500e, which were reverted 95fe61e63954. Original commit message:
VarLoc based LiveDebugValues will abandon variable location propagation if there are too many blocks and variable assignments in the function. If it didn't, and we had (say) 1000 blocks and 1000 variables in scope, we'd end up with 1 million DBG_VALUEs just at the start of blocks.
Instruction-referencing LiveDebugValues should honour this limitation too (because the same limitation applies to it). Hoist the relevant command line options into LiveDebugValues.cpp and pass it down into the implementation classes as an argument to ExtendRanges. I've duplicated all the run-lines in live-debug-values-cutoffs.mir to have an instruction-referencing flavour.
Differential Revision: https://reviews.llvm.org/D107823
show more ...
|
#
95fe61e6 |
| 16-Aug-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
Revert 54a61c94f93 and its follow up in 547b712500e
These were part of D107823, however asan has found something excitingly wrong happening:
https://lab.llvm.org/buildbot/#/builders/5/builds/10543
Revert 54a61c94f93 and its follow up in 547b712500e
These were part of D107823, however asan has found something excitingly wrong happening:
https://lab.llvm.org/buildbot/#/builders/5/builds/10543/steps/13/logs/stdio
show more ...
|
#
54a61c94 |
| 16-Aug-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
[DebugInfo][InstrRef] Honour too-much-debug-info cutouts
VarLoc based LiveDebugValues will abandon variable location propagation if there are too many blocks and variable assignments in the function
[DebugInfo][InstrRef] Honour too-much-debug-info cutouts
VarLoc based LiveDebugValues will abandon variable location propagation if there are too many blocks and variable assignments in the function. If it didn't, and we had (say) 1000 blocks and 1000 variables in scope, we'd end up with 1 million DBG_VALUEs just at the start of blocks.
Instruction-referencing LiveDebugValues should honour this limitation too (because the same limitation applies to it). Hoist the relevant command line options into LiveDebugValues.cpp and pass it down into the implementation classes as an argument to ExtendRanges. I've duplicated all the run-lines in live-debug-values-cutoffs.mir to have an instruction-referencing flavour.
Differential Revision: https://reviews.llvm.org/D107823
show more ...
|
Revision tags: llvmorg-13.0.0-rc1, llvmorg-14-init |
|
#
49555441 |
| 29-Jun-2021 |
Jeremy Morse <jeremy.morse@sony.com> |
[LiveDebugValues][InstrRef][1/2] Recover more clobbered variable locations
In various circumstances, when we clobber a register there may be alternative locations that the value is live in. The clas
[LiveDebugValues][InstrRef][1/2] Recover more clobbered variable locations
In various circumstances, when we clobber a register there may be alternative locations that the value is live in. The classic example would be a value loaded from the stack, and then clobbered: the value is still available on the stack. InstrRefBasedLDV was coping with this at block starts where it's forced to pick a location, however it wasn't searching for alternative locations when values were clobbered.
This patch notifies the "Transfer Tracker" object when clobbers occur, and it's able to find alternatives and issue DBG_VALUEs for that location. See: the added test.
Differential Revision: https://reviews.llvm.org/D88405
show more ...
|