History log of /llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp (Results 76 – 100 of 172)
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# bc5dbb0b 26-Nov-2021 Abinav Puthan Purayil <abinav.puthanpurayil@amd.com>

[GlobalISel] Add matchers for constant splat.

This change exposes isBuildVectorConstantSplat() to the llvm namespace
and uses it to implement the constant splat versions of
m_SpecificICst().

Combin

[GlobalISel] Add matchers for constant splat.

This change exposes isBuildVectorConstantSplat() to the llvm namespace
and uses it to implement the constant splat versions of
m_SpecificICst().

CombinerHelper::matchOrShiftToFunnelShift() can now work with vector
types and CombinerHelper::matchMulOBy2()'s match for a constant splat is
simplified.

Differential Revision: https://reviews.llvm.org/D114625

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# bfd5dd15 25-Nov-2021 Kazu Hirata <kazu@google.com>

[llvm] Use range-based for loops (NFC)


# aa2d3b59 22-Oct-2021 Christudasan Devadasan <Christudasan.Devadasan@amd.com>

GlobalISel/Utils: Use incoming regbank while constraining the superclasses

Register operands with superclasses can possibly have multiple regBanks
if they have different register types. The regBank

GlobalISel/Utils: Use incoming regbank while constraining the superclasses

Register operands with superclasses can possibly have multiple regBanks
if they have different register types. The regBank ambiguity resolved
during regbankselect should be used to constrain the operand regclass
instead of obtaining one from the MCInstrDesc.

This is a prerequisite patch for D109300 that introduces allocatable AV_*
Superclasses for AMDGPU by combining both VGPRs and AGPRs and we want to
restrain the regclass to either A or V based on the incoming regbank.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D112323

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# 5abce56e 11-Oct-2021 Amara Emerson <amara@apple.com>

[GlobalISel] Add support for constant vector folding of binops in CSEMIRBuilder.

Differential Revision: https://reviews.llvm.org/D111524


# 08b3c0d9 04-Oct-2021 Amara Emerson <amara@apple.com>

[GlobalISel] Combine G_UMULH x, (1 << c)) -> x >> (bitwidth - c)

In order to not generate an unnecessary G_CTLZ, I extended the constant folder
in the CSEMIRBuilder to handle G_CTLZ. I also added so

[GlobalISel] Combine G_UMULH x, (1 << c)) -> x >> (bitwidth - c)

In order to not generate an unnecessary G_CTLZ, I extended the constant folder
in the CSEMIRBuilder to handle G_CTLZ. I also added some extra handing of
vector constants too. It seems we don't have any support for doing constant
folding of vector constants, so the tests show some other useless G_SUB
instructions too.

Differential Revision: https://reviews.llvm.org/D111036

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# 8bfc0e06 29-Sep-2021 Amara Emerson <amara@apple.com>

[GlobalISel] Port the udiv -> mul by constant combine.

This is a straight port from the equivalent DAG combine.

Differential Revision: https://reviews.llvm.org/D110890


# 21661607 06-Oct-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[llvm] Replace report_fatal_error(std::string) uses with report_fatal_error(Twine)

As described on D111049, we're trying to remove the <string> dependency from error handling and replace uses of rep

[llvm] Replace report_fatal_error(std::string) uses with report_fatal_error(Twine)

As described on D111049, we're trying to remove the <string> dependency from error handling and replace uses of report_fatal_error(const std::string&) with the Twine() variant which can be forward declared.

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# 80f4bb5c 29-Sep-2021 Amara Emerson <amara@apple.com>

[GlobalISel] Extend G_SELECT of known condition combine to vectors.

Adds a new utility function: isConstantOrConstantSplatVector().

Differential Revision: https://reviews.llvm.org/D110786


# 8bc71856 21-Sep-2021 Petar Avramovic <Petar.Avramovic@amd.com>

GlobalISel/Utils: Refactor constant splat match functions

Add generic helper function that matches constant splat. It has option to
match constant splat with undef (some elements can be undef but no

GlobalISel/Utils: Refactor constant splat match functions

Add generic helper function that matches constant splat. It has option to
match constant splat with undef (some elements can be undef but not all).
Add util function and matcher for G_FCONSTANT splat.

Differential Revision: https://reviews.llvm.org/D104410

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# 7091a7f7 14-Sep-2021 Amara Emerson <amara@apple.com>

[GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts.

For artifacts excluding G_TRUNC/G_SEXT, which have IR counterparts, we don't
seem to have debug user

[GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts.

For artifacts excluding G_TRUNC/G_SEXT, which have IR counterparts, we don't
seem to have debug users of defs. However, in the legalizer we're always calling
MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval() which is expensive.
In some rare cases, this contributes significantly to unreasonably long compile
times when we have lots of artifact combiner activity.

To verify this, I added asserts to that function when it actually replaced a debug
use operand with undef for these artifacts. On CTMark with both -O0 and -Os and
debug info enabled, I didn't see a single case where it triggered.

In my measurements I saw around a 0.5% geomean compile-time improvement on -g -O0
for AArch64 with this change.

Differential Revision: https://reviews.llvm.org/D109750

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# e4c46ddd 20-Sep-2021 Petar Avramovic <Petar.Avramovic@amd.com>

[GlobalISel] Improve elimination of dead instructions in legalizer

Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instr

[GlobalISel] Improve elimination of dead instructions in legalizer

Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instructions
that became trivially dead.
This patch clears all dead instructions in existing legalizer mir tests.

Differential Revision: https://reviews.llvm.org/D109154

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# d477a7c2 17-Sep-2021 Petar Avramovic <Petar.Avramovic@amd.com>

GlobalISel/Utils: Refactor integer/float constant match functions

Rework getConstantstVRegValWithLookThrough in order to make it clear if we
are matching integer/float constant only or any constant(

GlobalISel/Utils: Refactor integer/float constant match functions

Rework getConstantstVRegValWithLookThrough in order to make it clear if we
are matching integer/float constant only or any constant(default).
Add helper functions that get DefVReg and APInt/APFloat from constant instr
getIConstantVRegValWithLookThrough: integer constant, only G_CONSTANT
getFConstantVRegValWithLookThrough: float constant, only G_FCONSTANT
getAnyConstantVRegValWithLookThrough: either G_CONSTANT or G_FCONSTANT

Rename getConstantVRegVal and getConstantVRegSExtVal to getIConstantVRegVal
and getIConstantVRegSExtVal. These now only match G_CONSTANT as described
in comment.

Relevant matchers now return both DefVReg and APInt/APFloat.

Replace existing uses of getConstantstVRegValWithLookThrough and
getConstantVRegVal with new helper functions. Any constant match is
only required in:
ConstantFoldBinOp: for constant argument that was bit-cast of float to int
getAArch64VectorSplat: AArch64::G_DUP operands can be any constant
amdgpu select for G_BUILD_VECTOR_TRUNC: operands can be any constant

In other places use integer only constant match.

Differential Revision: https://reviews.llvm.org/D104409

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# dc4ca0db 18-Jun-2021 Jay Foad <jay.foad@amd.com>

[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder

Differential Revision: https://reviews.llvm.org/D104528


# 77a608d9 11-Jul-2021 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Remove getIntrinsicID utility function

This is redundant with a method directly on MachineInstr


# 968980ef 25-Jun-2021 Sander de Smalen <sander.desmalen@arm.com>

[GlobalISel] NFC: Change LLT::scalarOrVector to take ElementCount.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D104452


# d5e14ba8 24-Jun-2021 Sander de Smalen <sander.desmalen@arm.com>

[GlobalISel] NFC: Change LLT::vector to take ElementCount.

This also adds new interfaces for the fixed- and scalable case:
* LLT::fixed_vector
* LLT::scalable_vector

The strategy for migrating to t

[GlobalISel] NFC: Change LLT::vector to take ElementCount.

This also adds new interfaces for the fixed- and scalable case:
* LLT::fixed_vector
* LLT::scalable_vector

The strategy for migrating to the new interfaces was as follows:
* If the new LLT is a (modified) clone of another LLT, taking the
same number of elements, then use LLT::vector(OtherTy.getElementCount())
or if the number of elements is halfed/doubled, it uses .divideCoefficientBy(2)
or operator*. That is because there is no reason to specifically restrict
the types to 'fixed_vector'.
* If the algorithm works on the number of elements (as unsigned), then
just use fixed_vector. This will need to be fixed up in the future when
modifying the algorithm to also work for scalable vectors, and will need
then need additional tests to confirm the behaviour works the same for
scalable vectors.
* If the test used the '/*Scalable=*/true` flag of LLT::vector, then
this is replaced by LLT::scalable_vector.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D104451

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# 0713c82b 27-Apr-2021 Petar Avramovic <Petar.Avramovic@amd.com>

[GlobalISel]: Add a getConstantIntVRegVal utility

Returns ConstantInt from G_CONSTANT instruction given its def register.

Differential Revision: https://reviews.llvm.org/D99733


# 91bbb914 13-Apr-2021 Jessica Paquette <jpaquette@apple.com>

[AArch64][GlobalISel] Regbankselect + select @llvm.aarch64.neon.uaddlv

It turns out we actually import a bunch of selection code for intrinsics. The
imported code checks that the register banks on t

[AArch64][GlobalISel] Regbankselect + select @llvm.aarch64.neon.uaddlv

It turns out we actually import a bunch of selection code for intrinsics. The
imported code checks that the register banks on the G_INTRINSIC instruction
are correct. If so, it goes ahead and selects it.

This adds code to AArch64RegisterBankInfo to allow us to correctly determine
register banks on intrinsics which have known register bank constraints.

For now, this only handles @llvm.aarch64.neon.uaddlv. This is necessary for
porting AArch64TargetLowering::LowerCTPOP.

Also add a utility for getting the intrinsic ID from a G_INTRINSIC instruction.
This seems a little nicer than having to know about how intrinsic instructions
are structured.

Differential Revision: https://reviews.llvm.org/D100398

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Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6
# b24436ac 20-Mar-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Lower funnel shifts


# 9fdfd8dd 20-Mar-2021 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Add utility function to constant fold FP ops


# c34819af 07-Jan-2021 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Handle G_BUILD_VECTOR in isKnownToBeAPowerOfTwo


# b9a03849 14-Mar-2021 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Preserve source value information for outgoing byval args

Pass through the original argument IR value in order to preserve the
aliasing information in the memcpy memory operands.


# 28963d89 17-Mar-2021 Amara Emerson <amara@apple.com>

[GlobalISel] Don't DCE LIFETIME_START/LIFETIME_END markers.

These are pseudos without any users, so DCE was killing them in the combiner.

Marking them as having side effects doesn't seem quite righ

[GlobalISel] Don't DCE LIFETIME_START/LIFETIME_END markers.

These are pseudos without any users, so DCE was killing them in the combiner.

Marking them as having side effects doesn't seem quite right since they don't.

Gives a nice 0.3% geomean size win on CTMark -Os.

Differential Revision: https://reviews.llvm.org/D98811

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# 5c26be21 01-Mar-2021 Jessica Paquette <jpaquette@apple.com>

[AArch64][GlobalISel] Lower G_BUILD_VECTOR -> G_DUP

If we have

```
%vec = G_BUILD_VECTOR %reg, %reg, ..., %reg
```

Then lower it to

```
%vec = G_DUP %reg
```

Also update the selector to handle c

[AArch64][GlobalISel] Lower G_BUILD_VECTOR -> G_DUP

If we have

```
%vec = G_BUILD_VECTOR %reg, %reg, ..., %reg
```

Then lower it to

```
%vec = G_DUP %reg
```

Also update the selector to handle constant splats on G_DUP.

This will not combine when the splat is all zeros or ones. Tablegen-imported
patterns rely on these being G_BUILD_VECTOR.

Minor code size improvements on CTMark at -Os.

Also adds some utility functions to make it a bit easier to recognize splats,
and an AArch64-specific splat helper.

Differential Revision: https://reviews.llvm.org/D97731

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# 8a316045 25-Feb-2021 Amara Emerson <amara@apple.com>

[AArch64][GlobalISel] Enable use of the optsize predicate in the selector.

To do this while supporting the existing functionality in SelectionDAG of using
PGO info, we add the ProfileSummaryInfo and

[AArch64][GlobalISel] Enable use of the optsize predicate in the selector.

To do this while supporting the existing functionality in SelectionDAG of using
PGO info, we add the ProfileSummaryInfo and LazyBlockFrequencyInfo analysis
dependencies to the instruction selector pass.

Then, use the predicate to generate constant pool loads for f32 materialization,
if we're targeting optsize/minsize.

Differential Revision: https://reviews.llvm.org/D97732

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