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f263a66b |
| 10-Mar-2022 |
Maksim Panchenko <maks@fb.com> |
[BOLT] Split functions with exceptions in shared objects and PIEs
Add functionality to allow splitting code with C++ exceptions in shared libraries and PIEs. To overcome a limitation in exception ra
[BOLT] Split functions with exceptions in shared objects and PIEs
Add functionality to allow splitting code with C++ exceptions in shared libraries and PIEs. To overcome a limitation in exception ranges format, for functions with fragments spanning multiple sections, add trampoline landing pads in the same section as the corresponding throwing range.
Reviewed By: Amir
Differential Revision: https://reviews.llvm.org/D127936
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adf4142f |
| 11-Jun-2022 |
Fangrui Song <i@maskray.me> |
[MC] De-capitalize SwitchSection. NFC
Add SwitchSection to return switchSection. The API will be removed soon.
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b92436ef |
| 05-Jun-2022 |
Fangrui Song <i@maskray.me> |
[bolt] Remove unneeded cl::ZeroOrMore for cl::opt options
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986e5ded |
| 02-Jun-2022 |
Maksim Panchenko <maks@fb.com> |
[BOLT][NFC] Fix braces in BinaryEmitter
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D126844
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fed958c6 |
| 20-Mar-2022 |
Vladislav Khmelevsky <och95@yandex.ru> |
[BOLT] AArch64: Emit text objects
BOLT treats aarch64 objects located in text as empty functions with contant islands. Emit them with at least 8-byte alignment to the new text section.
Vladislav Kh
[BOLT] AArch64: Emit text objects
BOLT treats aarch64 objects located in text as empty functions with contant islands. Emit them with at least 8-byte alignment to the new text section.
Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei
Differential Revision: https://reviews.llvm.org/D122097
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af9bdcfc |
| 19-Mar-2022 |
Vladislav Khmelevsky <och95@yandex.ru> |
[BOLT] Align constant islands to 8 bytes
AArch64 requires CI to be aligned to 8 bytes due to access instructions restrictions. E.g. the ldr with imm, where imm must be aligned to 8 bytes.
Different
[BOLT] Align constant islands to 8 bytes
AArch64 requires CI to be aligned to 8 bytes due to access instructions restrictions. E.g. the ldr with imm, where imm must be aligned to 8 bytes.
Differential Revision: https://reviews.llvm.org/D122065
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8ab69baa |
| 10-Mar-2022 |
Vladislav Khmelevsky <och95@yandex.ru> |
[BOLT] Set cold sections alignment explicitly
The cold text section alignment is set using the maximum alignment value passed to the emitCodeAlignment. In order to calculate tentetive layout right w
[BOLT] Set cold sections alignment explicitly
The cold text section alignment is set using the maximum alignment value passed to the emitCodeAlignment. In order to calculate tentetive layout right we will set the minimum alignment of such sections to the maximum possible function alignment explicitly.
Differential Revision: https://reviews.llvm.org/D121392
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290e4823 |
| 14-Feb-2022 |
serge-sans-paille <sguelton@redhat.com> |
Cleanup LLVMDWARFDebugInfo
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/DebugInfo/DWARF/DWARFContext.h no longer includes: - "llvm/DebugInfo/DW
Cleanup LLVMDWARFDebugInfo
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/DebugInfo/DWARF/DWARFContext.h no longer includes: - "llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h" - "llvm/DebugInfo/DWARF/DWARFCompileUnit.h" - "llvm/DebugInfo/DWARF/DWARFDebugAbbrev.h" - "llvm/DebugInfo/DWARF/DWARFDebugAranges.h" - "llvm/DebugInfo/DWARF/DWARFDebugFrame.h" - "llvm/DebugInfo/DWARF/DWARFDebugLoc.h" - "llvm/DebugInfo/DWARF/DWARFDebugMacro.h" - "llvm/DebugInfo/DWARF/DWARFGdbIndex.h" - "llvm/DebugInfo/DWARF/DWARFSection.h" - "llvm/DebugInfo/DWARF/DWARFTypeUnit.h" - "llvm/DebugInfo/DWARF/DWARFUnitIndex.h"
Plus llvm/Support/Errc.h not included by a bunch of llvm/DebugInfo/DWARF/DWARF*.h files
Preprocessed lines to build llvm on my setup: after: 1065629059 before: 1066621848
Which is a great diff!
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D119723
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#
a9cd49d5 |
| 04-Aug-2021 |
Amir Ayupov <aaupov@fb.com> |
[BOLT][NFC] Move Offset annotation to Group 1
Summary: Move the annotation to avoid dynamic memory allocations. Improves the CPU time of instrumenting a large binary by 1% (+-0.8%, p-value 0.01)
Te
[BOLT][NFC] Move Offset annotation to Group 1
Summary: Move the annotation to avoid dynamic memory allocations. Improves the CPU time of instrumenting a large binary by 1% (+-0.8%, p-value 0.01)
Test Plan: NFC
Reviewers: maksfb
FBD30091656
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3652483c |
| 20-Dec-2021 |
Rafael Auler <rafaelauler@fb.com> |
[BOLTCore] [NFC] Fix braces usages according to LLVM
Summary: Fix according to Coding Standards doc, section Don't Use Braces on Simple Single-Statement Bodies of if/else/loop Statements. This set o
[BOLTCore] [NFC] Fix braces usages according to LLVM
Summary: Fix according to Coding Standards doc, section Don't Use Braces on Simple Single-Statement Bodies of if/else/loop Statements. This set of changes applies to lib Core only.
(cherry picked from FBD33240028)
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2f09f445 |
| 21-Dec-2021 |
Maksim Panchenko <maks@fb.com> |
[BOLT][NFC] Fix file-description comments
Summary: Fix comments at the start of source files.
(cherry picked from FBD33274597)
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40c2e0fa |
| 15-Dec-2021 |
Maksim Panchenko <maks@fb.com> |
[BOLT][NFC] Reformat with clang-format
Summary: Selectively apply clang-format to BOLT code base.
(cherry picked from FBD33119052)
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ebe51c4d |
| 09-Dec-2021 |
Maksim Panchenko <maks@fb.com> |
[BOLT] Use more ADT data structures for BinaryFunction
Summary: Switched members of BinaryFunction to ADT where it was possible and made sense. As a result, the size of BinaryFunction on x86-64 Linu
[BOLT] Use more ADT data structures for BinaryFunction
Summary: Switched members of BinaryFunction to ADT where it was possible and made sense. As a result, the size of BinaryFunction on x86-64 Linux reduced from 1624 bytes to 1448.
(cherry picked from FBD32981555)
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a34c753f |
| 08-Oct-2021 |
Rafael Auler <rafaelauler@fb.com> |
Rebase: [NFC] Refactor sources to be buildable in shared mode
Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows h
Rebase: [NFC] Refactor sources to be buildable in shared mode
Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows how to build BOLT in BUILD_SHARED_LIBS=ON.
Please use the -c merge.renamelimit=230 git option when rebasing your work on top of this change.
To achieve this, we create a new library to hold core IR files (most classes beginning with Binary in their names), a new library to hold Utils, some command line options shared across both RewriteInstance and core IR files, a new library called Rewrite to hold most classes concerned with running top-level functions coordinating the binary rewriting process, and a new library called Profile to hold classes dealing with profile reading and writing.
To remove the dependency from BinaryContext into X86-specific classes, we do some refactoring on the BinaryContext constructor to receive a reference to the specific backend directly from RewriteInstance. Then, the dependency on X86 or AArch64-specific classes is transfered to the Rewrite library. We can't have the Core library depend on targets because targets depend on Core (which would create a cycle).
Files implementing the entry point of a tool are transferred to the tools/ folder. All header files are transferred to the include/ folder. The src/ folder was renamed to lib/.
(cherry picked from FBD32746834)
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