History log of /isa-l_crypto/md5_mb/aarch64/md5_ctx_aarch64_sve.c (Results 1 – 5 of 5)
Revision Date Author Comments
# cca1040d 10-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

md5_mb: add ISAL_ prefix to MD5 structure and macro definitions

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>


# 8469e54a 10-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

md5_mb: move some macros to internal header

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>


# 8cb7fe78 08-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

multibuffer: add ISAL_ prefix to hash multibuffer enums

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>


# eb385f58 15-Apr-2024 Marcel Cornu <marcel.d.cornu@intel.com>

md5_mb: reformat with new coding style

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>


# e471e67f 21-Apr-2022 Daniel Hu <Daniel.Hu@arm.com>

Acceleration of md5-mb for aarch64 by SVE

SVE (Scalable Vector Extension), if supported by CPU, will improve
the performance of md5-mb over existing Neon implementation by up
to +230% according to t

Acceleration of md5-mb for aarch64 by SVE

SVE (Scalable Vector Extension), if supported by CPU, will improve
the performance of md5-mb over existing Neon implementation by up
to +230% according to test on latest V1
micro-architecture

Change-Id: Ib00de5cdc2d970675fea0c37e12f28ba7fe8950c
Signed-off-by: Daniel Hu <Daniel.Hu@arm.com>

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