History log of /isa-l_crypto/include/ (Results 1 – 25 of 141)
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3aa2266b23-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

build: Bump revision to 2.25

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

38b5be9027-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

aes: fix comment

AES-GCM-192 is not supported.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

9118dad827-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

include: add missing comments for error types

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

fa03c36624-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

fips: return fips disabled error code in self tests when not enabled

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

2d00dcb624-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

md5_mb: document MD5 endianness output

MD5 algorithm outputs digest in a different endianness (little endian)
compared to SHAs. To avoid breaking the API, this is documented.

Signed-off-by: Pablo d

md5_mb: document MD5 endianness output

MD5 algorithm outputs digest in a different endianness (little endian)
compared to SHAs. To avoid breaking the API, this is documented.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

show more ...


/isa-l_crypto/Makefile.am
/isa-l_crypto/Makefile.nmake
/isa-l_crypto/README.md
/isa-l_crypto/Release_notes.txt
/isa-l_crypto/aes/XTS_AES_128_dec_expanded_key_vaes.asm
/isa-l_crypto/aes/XTS_AES_128_dec_vaes.asm
/isa-l_crypto/aes/XTS_AES_128_enc_expanded_key_vaes.asm
/isa-l_crypto/aes/XTS_AES_128_enc_vaes.asm
/isa-l_crypto/aes/XTS_AES_256_dec_expanded_key_vaes.asm
/isa-l_crypto/aes/XTS_AES_256_dec_vaes.asm
/isa-l_crypto/aes/XTS_AES_256_enc_expanded_key_vaes.asm
/isa-l_crypto/aes/XTS_AES_256_enc_vaes.asm
/isa-l_crypto/aes/cbc_dec_vaes_avx512.asm
/isa-l_crypto/aes/gcm_vaes_avx512.asm
/isa-l_crypto/configure.ac
md5_mb.h
/isa-l_crypto/make.inc
/isa-l_crypto/md5_mb/md5_ctx_avx512.c
/isa-l_crypto/md5_mb/md5_mb_mgr_flush_avx512.asm
/isa-l_crypto/md5_mb/md5_mb_mgr_submit_avx512.asm
/isa-l_crypto/md5_mb/md5_mb_test.c
/isa-l_crypto/md5_mb/md5_mb_x16x2_avx512.asm
/isa-l_crypto/md5_mb/md5_multibinary.asm
/isa-l_crypto/mh_sha1/mh_sha1_avx512.c
/isa-l_crypto/mh_sha1/mh_sha1_block_avx512.asm
/isa-l_crypto/mh_sha1/mh_sha1_multibinary.asm
/isa-l_crypto/mh_sha1_murmur3_x64_128/mh_sha1_murmur3_x64_128_avx512.c
/isa-l_crypto/mh_sha1_murmur3_x64_128/mh_sha1_murmur3_x64_128_block_avx512.asm
/isa-l_crypto/mh_sha1_murmur3_x64_128/mh_sha1_murmur3_x64_128_multibinary.asm
/isa-l_crypto/mh_sha256/mh_sha256_avx512.c
/isa-l_crypto/mh_sha256/mh_sha256_block_avx512.asm
/isa-l_crypto/mh_sha256/mh_sha256_multibinary.asm
/isa-l_crypto/sha1_mb/sha1_ctx_avx512.c
/isa-l_crypto/sha1_mb/sha1_ctx_avx512_ni.c
/isa-l_crypto/sha1_mb/sha1_ctx_sse_ni.c
/isa-l_crypto/sha1_mb/sha1_mb_mgr_flush_avx512.asm
/isa-l_crypto/sha1_mb/sha1_mb_mgr_flush_avx512_ni.asm
/isa-l_crypto/sha1_mb/sha1_mb_mgr_flush_sse_ni.asm
/isa-l_crypto/sha1_mb/sha1_mb_mgr_submit_avx512.asm
/isa-l_crypto/sha1_mb/sha1_mb_mgr_submit_sse_ni.asm
/isa-l_crypto/sha1_mb/sha1_mb_x16_avx512.asm
/isa-l_crypto/sha1_mb/sha1_multibinary.asm
/isa-l_crypto/sha1_mb/sha1_ni_x1.asm
/isa-l_crypto/sha1_mb/sha1_ni_x2.asm
/isa-l_crypto/sha256_mb/sha256_ctx_avx512.c
/isa-l_crypto/sha256_mb/sha256_ctx_avx512_ni.c
/isa-l_crypto/sha256_mb/sha256_ctx_sse_ni.c
/isa-l_crypto/sha256_mb/sha256_mb_mgr_flush_avx512.asm
/isa-l_crypto/sha256_mb/sha256_mb_mgr_flush_avx512_ni.asm
/isa-l_crypto/sha256_mb/sha256_mb_mgr_flush_sse_ni.asm
/isa-l_crypto/sha256_mb/sha256_mb_mgr_submit_avx512.asm
/isa-l_crypto/sha256_mb/sha256_mb_mgr_submit_sse_ni.asm
/isa-l_crypto/sha256_mb/sha256_mb_x16_avx512.asm
/isa-l_crypto/sha256_mb/sha256_multibinary.asm
/isa-l_crypto/sha256_mb/sha256_ni_x1.asm
/isa-l_crypto/sha256_mb/sha256_ni_x2.asm
/isa-l_crypto/sha512_mb/sha512_ctx_avx512.c
/isa-l_crypto/sha512_mb/sha512_mb_mgr_flush_avx512.asm
/isa-l_crypto/sha512_mb/sha512_mb_mgr_submit_avx512.asm
/isa-l_crypto/sha512_mb/sha512_mb_x8_avx512.asm
/isa-l_crypto/sha512_mb/sha512_multibinary.asm
/isa-l_crypto/sm3_mb/sm3_ctx_avx512.c
/isa-l_crypto/sm3_mb/sm3_mb_mgr_flush_avx512.asm
/isa-l_crypto/sm3_mb/sm3_mb_mgr_submit_avx512.asm
/isa-l_crypto/sm3_mb/sm3_mb_x16_avx512.asm
/isa-l_crypto/tests/acvp/acvp_app.c
/isa-l_crypto/tests/extended/Makefile.nmake
/isa-l_crypto/tests/extended/md5_mb_over_4GB_test.c
/isa-l_crypto/tests/extended/sha1_mb_over_4GB_test.c
/isa-l_crypto/tests/extended/sha256_mb_over_4GB_test.c
/isa-l_crypto/tests/extended/sha512_mb_over_4GB_test.c
/isa-l_crypto/tests/extended/sm3_mb_over_4GB_test.c
/isa-l_crypto/tools/gen_nmake.mk
fea2d86a22-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

add API to get library version and version test app

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

5e6526ee21-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

aes: [GCM] add isal prefix to context and key structs

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

9300704921-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

mh_sha1_murmur3_x64_128: add isal prefix to data types

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

46bddbb721-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

mh_sha1: add isal prefix to context struct

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

f6da0bf421-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

mh_sha256: add isal prefix to context struct

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

1e0b122e21-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

rolling_hash: add isal prefix to state struct

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

cbb0140421-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

include: [SHA512] add ISAL prefix to args struct

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

21f671bb21-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

docs: fix minor formatting issue

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

9bfed19e21-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

include: [SHA512] add missing API param to documentation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

672a042c21-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

include: [SHA256] add missing API param to documentation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

e4a8493317-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

aes: [CBC] add ISAL_ prefix to definitions

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

42a5133517-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

include: [AES-XTS] add compatibility mapping for old definitions

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

b1952c6317-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

include: [MD5] add compatibility mapping for old definitions

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

7a78040617-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

aes: [GCM] remove unneeded definitions

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

7ba877e617-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

aes: add ISAL_ prefix to AES-GCM definitions

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

3080abda16-May-2024 Tomasz Kantecki <tomasz.kantecki@intel.com>

sm3: add v2.24 API compatibility compilation mode and
move some defines from public to internal header file

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

6801b27b08-May-2024 Tomasz Kantecki <tomasz.kantecki@intel.com>

sm3: deprecate old SM3 multi-buffer API

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>


/isa-l_crypto/aes/cbc_dec_vaes_avx512.asm
sm3_mb.h
sm3_mb_internal.h
/isa-l_crypto/md5_mb/md5_mb_rand_ssl_test.c
/isa-l_crypto/md5_mb/md5_mb_vs_ossl_perf.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_aarch64_dispatcher.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_ctx_asimd_aarch64.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_ctx_sm_aarch64.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_ctx_sve.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_ctx_sve2.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_mgr_asimd_aarch64.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_mgr_sm_aarch64.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_mgr_sve.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_mgr_sve2.c
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_multibinary_aarch64.S
/isa-l_crypto/sm3_mb/aarch64/sm3_mb_sve.S
/isa-l_crypto/sm3_mb/sm3_ctx_avx2.c
/isa-l_crypto/sm3_mb/sm3_ctx_avx512.c
/isa-l_crypto/sm3_mb/sm3_ctx_base.c
/isa-l_crypto/sm3_mb/sm3_ctx_base_aliases.c
/isa-l_crypto/sm3_mb/sm3_job.asm
/isa-l_crypto/sm3_mb/sm3_mb.c
/isa-l_crypto/sm3_mb/sm3_mb_flush_test.c
/isa-l_crypto/sm3_mb/sm3_mb_mgr_flush_avx2.asm
/isa-l_crypto/sm3_mb/sm3_mb_mgr_flush_avx512.asm
/isa-l_crypto/sm3_mb/sm3_mb_mgr_submit_avx2.asm
/isa-l_crypto/sm3_mb/sm3_mb_mgr_submit_avx512.asm
/isa-l_crypto/sm3_mb/sm3_mb_param_test.c
/isa-l_crypto/sm3_mb/sm3_mb_rand_ssl_test.c
/isa-l_crypto/sm3_mb/sm3_mb_rand_test.c
/isa-l_crypto/sm3_mb/sm3_mb_rand_update_test.c
/isa-l_crypto/sm3_mb/sm3_mb_test.c
/isa-l_crypto/sm3_mb/sm3_mb_vs_ossl_perf.c
/isa-l_crypto/sm3_mb/sm3_mb_vs_ossl_shortage_perf.c
/isa-l_crypto/sm3_mb/sm3_mb_x16_avx512.asm
/isa-l_crypto/sm3_mb/sm3_multibinary.asm
/isa-l_crypto/sm3_mb/sm3_ref_test.c
/isa-l_crypto/tests/extended/sm3_mb_over_4GB_test.c
c38e347513-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

include: rename enum to more explicit name

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

40590d0213-May-2024 Pablo de Lara <pablo.de.lara.guarch@intel.com>

include: remove unused error enums

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

283b312913-May-2024 Marcel Cornu <marcel.d.cornu@intel.com>

rolling_hash: deprecate old API

Use new API in perf app

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

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