lpm6: use IPv6 address structure and utils

Replace ad-hoc uint8_t[16] array types in the API of rte_lpm6 with
rte_ipv6_addr structures. Replace duplicate functions and macros with
common ones from r

lpm6: use IPv6 address structure and utils

Replace ad-hoc uint8_t[16] array types in the API of rte_lpm6 with
rte_ipv6_addr structures. Replace duplicate functions and macros with
common ones from rte_ip6.h. Update all code accordingly.

NB: the conversion between 16 bytes arrays and RTE_IPV6() literals was
done automatically with the following python script and adjusted
manually afterwards:

import argparse
import re
import struct

ip = re.compile(
r"""
\{
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*,
[\s\t\r\n]*([\da-fA-Fx]+)[\s\t\r\n]*
\}
""",
re.VERBOSE,
)

def repl(match):
u8 = bytes(int(g, 0) for g in match.groups("0"))
nums = []
for u16 in struct.unpack("!HHHHHHHH", u8):
if u16:
nums.append(f"0x{u16:04x}")
else:
nums.append("0")
return f"RTE_IPV6({', '.join(nums)})"

p = argparse.ArgumentParser()
p.add_argument("args", nargs="+")
args = p.parse_args()

for a in args.args:

with open(a) as f:
buf = f.read()

buf = ip.sub(repl, buf)
with open(a, "w") as f:
f.write(buf)

Signed-off-by: Robin Jarry <rjarry@redhat.com>

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examples/ipsec-secgw: free the actual mbuf pointer

In case of crypto event vector, the vector points to crypto op structure
in priv area and not actual mbuf.
Extract the mbuf pointer and pass these

examples/ipsec-secgw: free the actual mbuf pointer

In case of crypto event vector, the vector points to crypto op structure
in priv area and not actual mbuf.
Extract the mbuf pointer and pass these to rte_mbuf_free to free the
mbufs.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

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examples: fix queue ID restriction

Currently application supports Rx queue IDs up to 255
and max queues of 256 irrespective of device support.
This limits the number of active lcores to 256.

The pa

examples: fix queue ID restriction

Currently application supports Rx queue IDs up to 255
and max queues of 256 irrespective of device support.
This limits the number of active lcores to 256.

The patch fixes these constraints by increasing
the Rx queue IDs to support up to 65535.

Fixes: af75078fece3 ("first public release")
Fixes: f88e7c175a68 ("examples/l3fwd-power: add high/regular perf cores options")
Fixes: 08bd1a174461 ("examples/l3fwd-graph: add graph-based l3fwd skeleton")
Cc: stable@dpdk.org

Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Ferruh Yigit <ferruh.yigit@amd.com>

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security: hide security context

rte_security_ctx is used by all security APIs to identify
which device security_op it need to call and hence it should
be opaque to the application.
Hence, it is now

security: hide security context

rte_security_ctx is used by all security APIs to identify
which device security_op it need to call and hence it should
be opaque to the application.
Hence, it is now moved to internal header file and all
APIs will now take an opaque pointer for it.
The fast path inline APIs like set metadata need to get flags
from security_ctx. The flags are now retrieved using inline APIs
which use macros to get the offset of flags in security_ctx.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

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examples/ipsec-secgw: avoid error logs in fast path

Avoid printing errors due to bad packets in fast path as it
effects performance. Make them RTE_LOG_DP() instead.
Also print the actual ptype that

examples/ipsec-secgw: avoid error logs in fast path

Avoid printing errors due to bad packets in fast path as it
effects performance. Make them RTE_LOG_DP() instead.
Also print the actual ptype that is used to classify the pkt.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: fix Tx offloads initialization

Fix uninitialized variable access of outbound offloads flags.

Coverity issue: 381669
Fixes: 6938fc92c404 ("examples/ipsec-secgw: add lookaside e

examples/ipsec-secgw: fix Tx offloads initialization

Fix uninitialized variable access of outbound offloads flags.

Coverity issue: 381669
Fixes: 6938fc92c404 ("examples/ipsec-secgw: add lookaside event mode")

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>

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examples/ipsec-secgw: support per SA HW reassembly

This add the support of hardware reassembly per SA basis.
In SA rule, new parameter reassembly_en is added to enable
HW reassembly per SA.
For exam

examples/ipsec-secgw: support per SA HW reassembly

This add the support of hardware reassembly per SA basis.
In SA rule, new parameter reassembly_en is added to enable
HW reassembly per SA.
For example:
sa in <idx> aead_algo <algo> aead_key <key> mode ipv4-tunnel src <ip>
dst <ip> type inline-protocol-offload port_id <id> reassembly_en

Stats counter frag_dropped will represent the number of fragment
drop in case of reassembly failures.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: support event vector in lookaside mode

Added vector support for event crypto adapter in lookaside mode.
Once --event-vector is enabled, event crypto adapter will group
processe

examples/ipsec-secgw: support event vector in lookaside mode

Added vector support for event crypto adapter in lookaside mode.
Once --event-vector is enabled, event crypto adapter will group
processed crypto operation into rte_event_vector event with type
RTE_EVENT_TYPE_CRYPTODEV_VECTOR.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: add event mode statistics

Added per core statistic (Rx/Tx) counters for event mode worker.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@

examples/ipsec-secgw: add event mode statistics

Added per core statistic (Rx/Tx) counters for event mode worker.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: add lookaside event mode

Added base support for lookaside event mode.
Events that are coming from ethdev will be enqueued
to the event crypto adapter, processed and
enqueued ba

examples/ipsec-secgw: add lookaside event mode

Added base support for lookaside event mode.
Events that are coming from ethdev will be enqueued
to the event crypto adapter, processed and
enqueued back to ethdev for the transmission.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: free event vector mbufs

Free mbufs from event vector list when enqueue operation fails
and during event port flush for cleanup.

Signed-off-by: Rahul Bhansali <rbhansali@marvel

examples/ipsec-secgw: free event vector mbufs

Free mbufs from event vector list when enqueue operation fails
and during event port flush for cleanup.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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security: hide session structure

Structure rte_security_session is moved to internal
headers which are not visible to applications.
The only field which should be used by app is opaque_data.
This fi

security: hide session structure

Structure rte_security_session is moved to internal
headers which are not visible to applications.
The only field which should be used by app is opaque_data.
This field can now be accessed via set/get APIs added in this
patch.
Subsequent changes in app and lib are made to compile the code.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Tested-by: Gagandeep Singh <g.singh@nxp.com>
Tested-by: David Coyle <david.coyle@intel.com>
Tested-by: Kevin O'Sullivan <kevin.osullivan@intel.com>

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examples/ipsec-secgw: update ether type using tunnel info

Update ether type for outbound SA processing based on tunnel header
information in both NEON functions for poll mode and event mode worker
f

examples/ipsec-secgw: update ether type using tunnel info

Update ether type for outbound SA processing based on tunnel header
information in both NEON functions for poll mode and event mode worker
functions.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: support poll mode NEON LPM lookup

This adds the support of NEON based LPM lookup along with
multi packet processing for burst send in packets routing.

Performance impact:
On c

examples/ipsec-secgw: support poll mode NEON LPM lookup

This adds the support of NEON based LPM lookup along with
multi packet processing for burst send in packets routing.

Performance impact:
On cn10k, with poll mode inline protocol, outbound performance
increased by ~8% and inbound performance increased by ~6%.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: create lookaside sessions at init

In event lookaside mode same session could be handled with multiple
cores, and session creation in datapath will cause situation where
multipl

examples/ipsec-secgw: create lookaside sessions at init

In event lookaside mode same session could be handled with multiple
cores, and session creation in datapath will cause situation where
multiple cores will try to create same session simultaneously.
To avoid such case and enable event lookaside mode in future, lookaside
sessions are now created at initialization in sa_add_rules().

All sessions(inline and lookaside) now created during init process, so
session pool information was removed from ipsec context. Core id was
added to obtain correct crypto device queue pair for the current core.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: add poll mode worker for inline proto

Add separate worker thread when all SA's are of type
inline protocol offload and librte_ipsec is enabled
in order to make it more optimal

examples/ipsec-secgw: add poll mode worker for inline proto

Add separate worker thread when all SA's are of type
inline protocol offload and librte_ipsec is enabled
in order to make it more optimal for that case.
Current default worker supports all kinds of SA leading
to doing lot of per-packet checks and branching based on
SA type which can be of 5 types of SA's.

Also make a provision for choosing different poll mode workers
for different combinations of SA types with default being
existing poll mode worker that supports all kinds of SA's.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples: use event port quiescing

Quiesce event ports used by the workers core on exit to free up
any outstanding resources.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jer

examples: use event port quiescing

Quiesce event ports used by the workers core on exit to free up
any outstanding resources.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

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examples/ipsec-secgw: cleanup worker state before exit

Event ports are configured to implicitly release the scheduler contexts
currently held in the next call to rte_event_dequeue_burst().
A worker

examples/ipsec-secgw: cleanup worker state before exit

Event ports are configured to implicitly release the scheduler contexts
currently held in the next call to rte_event_dequeue_burst().
A worker core might still hold a scheduling context during exit as the
next call to rte_event_dequeue_burst() is never made.
This might lead to deadlock based on the worker exit timing and when
there are very less number of flows.

Add a cleanup function to release any scheduling contexts held by the
worker by using RTE_EVENT_OP_RELEASE.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

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examples/ipsec-secgw: fix buffer freeing in vector mode

Fix packet processing to skip after mbuf is freed instead of
touching and Tx'ing it.

Also free vector event buffer in event worker when after

examples/ipsec-secgw: fix buffer freeing in vector mode

Fix packet processing to skip after mbuf is freed instead of
touching and Tx'ing it.

Also free vector event buffer in event worker when after processing
there is no pkt to be enqueued to Tx adapter.

Fixes: 86738ebe1e3d ("examples/ipsec-secgw: support event vector")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: avoid logs in data path

Update error prints in data path to RTE_LOG_DP().
Error prints in fast path are not good for performance
as they slow down the application when few bad

examples/ipsec-secgw: avoid logs in data path

Update error prints in data path to RTE_LOG_DP().
Error prints in fast path are not good for performance
as they slow down the application when few bad packets are
received.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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examples/ipsec-secgw: support event vector

Adds event vector support to inline protocol offload mode.
By default vector support is disabled, it can be enabled by
using the option --event-vector.
Add

examples/ipsec-secgw: support event vector

Adds event vector support to inline protocol offload mode.
By default vector support is disabled, it can be enabled by
using the option --event-vector.
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector-size and
--vector-tmo.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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mbuf: add namespace to offload flags

Fix the mbuf offload flags namespace by adding an RTE_ prefix to the
name. The old flags remain usable, but a deprecation warning is issued
at compilation.

Sign

mbuf: add namespace to offload flags

Fix the mbuf offload flags namespace by adding an RTE_ prefix to the
name. The old flags remain usable, but a deprecation warning is issued
at compilation.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>

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examples/ipsec-secgw: use mbuf packet type in ev worker

Use mbuf packet type for traffic identification as
packet is parsed already by HW before and HW/PMD updates
necessary info in mbuf packet type

examples/ipsec-secgw: use mbuf packet type in ev worker

Use mbuf packet type for traffic identification as
packet is parsed already by HW before and HW/PMD updates
necessary info in mbuf packet type of the found protocols.

This change is specifically for event mode.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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net: rename Ethernet header fields

Definition of `rte_ether_addr` structure used a workaround allowing DPDK
and Windows SDK headers to be used in the same file, because Windows SDK
defines `s_addr`

net: rename Ethernet header fields

Definition of `rte_ether_addr` structure used a workaround allowing DPDK
and Windows SDK headers to be used in the same file, because Windows SDK
defines `s_addr` as a macro. Rename `s_addr` to `src_addr` and `d_addr`
to `dst_addr` to avoid the conflict and remove the workaround.
Deprecation notice:
https://mails.dpdk.org/archives/dev/2021-July/215270.html

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>

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examples/ipsec-secgw: update event mode inline path

Update mbuf.l2_len with L2 header size for outbound
inline processing.

This patch also fixes a bug in arg parsing.

Signed-off-by: Nithin Dabilpu

examples/ipsec-secgw: update event mode inline path

Update mbuf.l2_len with L2 header size for outbound
inline processing.

This patch also fixes a bug in arg parsing.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

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