raw/ifpga/base: fix init with multi-process

The MAP_FAILED should be used to determine whether the mapping is
successful.

Fixes: e41856b515ce ("raw/ifpga/base: enhance driver reliability in multi-p

raw/ifpga/base: fix init with multi-process

The MAP_FAILED should be used to determine whether the mapping is
successful.

Fixes: e41856b515ce ("raw/ifpga/base: enhance driver reliability in multi-process")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga/base: add PMCI sensor driver

N6000 ADP platform support more sensors than N3000, they are
accessed with the help of PMCI sensor driver.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acke

raw/ifpga/base: add PMCI sensor driver

N6000 ADP platform support more sensors than N3000, they are
accessed with the help of PMCI sensor driver.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga/base: update flash operation interface

In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically convert

raw/ifpga/base: update flash operation interface

In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically converts the mailbox commands to the SPI protocol
required by SPI slave.
That means flash operation is different from old platform, new
interfaces are introduced to adapt these changes.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga: support OFS card probing

PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.

Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device

raw/ifpga: support OFS card probing

PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.

Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device
Feature List) starts from BAR0 by default, port DFL location is indicated
in PORTn_OFFSET register in FME. In OFS implementation, FME DFL and port
DFL location can be defined individually in PCIe VSEC (Vendor Specific
Extended Capabilities). In this patch, DFL definition is searched in VSEC,
the legacy DFL is used only when DFL VSEC is not present.

In original DFL enumeration process, AFU is expected to locate in port DFL,
but this is not the case in OFS implementation. In this patch, enumeration
can search AFU in any PF/VF which has no FME and port.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga: add APIs to get FPGA information

There are some information data can be got from FPGA, they are
implemented in below APIs:
1. rte_pmd_ifpga_get_property() get properties of FPGA (include

raw/ifpga: add APIs to get FPGA information

There are some information data can be got from FPGA, they are
implemented in below APIs:
1. rte_pmd_ifpga_get_property() get properties of FPGA (include BMC).
2. rte_pmd_ifpga_get_phy_info() get information of PHY connect to FPGA.
3. rte_pmd_ifpga_get_rsu_status() get status of rsu process.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga: add FPGA RSU APIs

RSU (Remote System Update) depends on secure manager which may be
different on various implementations, so a new secure manager device
is implemented for adapting such d

raw/ifpga: add FPGA RSU APIs

RSU (Remote System Update) depends on secure manager which may be
different on various implementations, so a new secure manager device
is implemented for adapting such difference.
There are five APIs added:
1. rte_pmd_ifpga_get_dev_id() get raw device ID of ifpga device from PCI
address like 'Domain:Bus:Dev.Func'.
2. rte_pmd_ifpga_update_flash() update flash with specific image file.
3. rte_pmd_ifpga_stop_update() abort flash update process.
4. rte_pmd_ifpga_reboot_try() check current ifpga status and change it
to reboot status if it is idle.
5. rte_pmd_ifpga_reload() trigger full reconfiguration of ifpga device.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga/base: check adapter pointer before dereference

In opae_adapter_destroy(), pointer "adapter" is not validated before
passing it to opae_adapter_shm_free() and opae_adapter_mutex_close()
whi

raw/ifpga/base: check adapter pointer before dereference

In opae_adapter_destroy(), pointer "adapter" is not validated before
passing it to opae_adapter_shm_free() and opae_adapter_mutex_close()
which dereference it.

Coverity issue: 363752
Fixes: e41856b515ce ("raw/ifpga/base: enhance driver reliability in multi-process")

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga/base: enhance driver reliability in multi-process

Current hardware protection is based on pthread mutex which
work just for situation of multi-thread in one process. In
multi-process envir

raw/ifpga/base: enhance driver reliability in multi-process

Current hardware protection is based on pthread mutex which
work just for situation of multi-thread in one process. In
multi-process environment, hardware state machine would be
corrupted by concurrent access, that means original pthread
mutex mechanism need be enhanced.

The major modifications in this patch are list below:
1. Create a mutex for adapter in shared memory named
"mutex.IFPGA:domain:bus:dev.func" when device is probed.
2. Create a shared memory named "IFPGA:domain:bus:dev.func" during opae
adapter is initializing. There is a reference count in shared memory.
Shared memory will be destroyed once reference count turned to zero.
3. Two mutexs are created in shared memory and initialized with flag
PTHREAD_PROCESS_SHARED. One for SPI and the other for I2C. They will
be passed to SPI and I2C driver subsequently.
4. DTB data in flash will be cached in shared memory. Then MAX10 driver
can read DTB from shared memory instead of flash. This avoid
confliction of concurrent flash access between hardware and software.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>

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raw/ifpga/base: support multiple cards

In PAC N3000 card, there is one MAX10 chip in each card, and
all of the sensors are connected to MAX10 chip. To support multiple
cards in one server, we introd

raw/ifpga/base: support multiple cards

In PAC N3000 card, there is one MAX10 chip in each card, and
all of the sensors are connected to MAX10 chip. To support multiple
cards in one server, we introducing a sensor device list under
intel_max10_device instead of a global list. On the other hand, we
using separate intel_max10_device instance for each opae_adatper.

Add mutex lock on do_transaction() function for SPI driver to avoid
race condition.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>

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raw/ifpga/base: get board info

Add new API to get the board info.
opae_mgr_get_board_info()

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>

raw/ifpga/base: introduce sensor functions

Introducing sensor APIs to PMD driver for PAC N3000 card.

Those sensor APIs:
1. opae_mgr_for_each_sensor()
2. opae_mgr_get_sensor_by_name()
3. opae_mgr_ge

raw/ifpga/base: introduce sensor functions

Introducing sensor APIs to PMD driver for PAC N3000 card.

Those sensor APIs:
1. opae_mgr_for_each_sensor()
2. opae_mgr_get_sensor_by_name()
3. opae_mgr_get_sensor_by_id()
4. opae_mgr_get_sensor_value_by_name()
5. opae_mgr_get_sensor_value_by_id()
6. opae_mgr_get_sensor_value()

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>

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drivers/raw: remove rawdev from directory names

The ifpga and skeleton rawdev drivers included "rawdev" in their directory
names, which was superfluous given that they were in the drivers/raw
direct

drivers/raw: remove rawdev from directory names

The ifpga and skeleton rawdev drivers included "rawdev" in their directory
names, which was superfluous given that they were in the drivers/raw
directory. Shorten the names via this patch.

For meson builds, this will rename the final library .so/.a files
produced, but those will be renamed again later via a patch to
standardize rawdev names.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>

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