#
7c4fe2ad |
| 17-Jun-2022 |
Wei Huang <wei.huang@intel.com> |
raw/ifpga/base: update board information
N6000 ADP platform has different definition of board information, they can be recognized after this patch.
Signed-off-by: Wei Huang <wei.huang@intel.com> Ac
raw/ifpga/base: update board information
N6000 ADP platform has different definition of board information, they can be recognized after this patch.
Signed-off-by: Wei Huang <wei.huang@intel.com> Acked-by: Tianfei Zhang <tianfei.zhang@intel.com> Reviewed-by: Rosen Xu <rosen.xu@intel.com>
show more ...
|
#
4858f8a5 |
| 14-Nov-2019 |
Tianfei Zhang <tianfei.zhang@intel.com> |
raw/ifpga/base: clean FME errors
Clean fme errors register when some fme errors occurred.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com>
|
#
10349b73 |
| 14-Nov-2019 |
Tianfei Zhang <tianfei.zhang@intel.com> |
raw/ifpga/base: expose SEU error
This patch exposes SEU error information to application then application could compare this information (128bit) with its own SMH file to know if this SEU is a fatal
raw/ifpga/base: expose SEU error
This patch exposes SEU error information to application then application could compare this information (128bit) with its own SMH file to know if this SEU is a fatal error or not.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com>
show more ...
|
#
5548d7e5 |
| 14-Nov-2019 |
Tianfei Zhang <tianfei.zhang@intel.com> |
raw/ifpga/base: clear pending bit
Every defined bit in FME_ERROR0 is RW1C. Other reserved bits are always 0 when readout and it will plan to be RW1C if needed in future. So it is safe just write the
raw/ifpga/base: clear pending bit
Every defined bit in FME_ERROR0 is RW1C. Other reserved bits are always 0 when readout and it will plan to be RW1C if needed in future. So it is safe just write the read back value to clear all the errors.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com>
show more ...
|
#
9bf03321 |
| 14-Nov-2019 |
Tianfei Zhang <tianfei.zhang@intel.com> |
raw/ifpga/base: support IRQ
Add IRQ support for ifpga FME global error, port error and unit. We implemented this feature by vfio interrupt mechanism.
To build this feature, CONFIG_RTE_EAL_VFIO shou
raw/ifpga/base: support IRQ
Add IRQ support for ifpga FME global error, port error and unit. We implemented this feature by vfio interrupt mechanism.
To build this feature, CONFIG_RTE_EAL_VFIO should be enabled.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com>
show more ...
|
#
473c88f9 |
| 05-Jul-2019 |
Bruce Richardson <bruce.richardson@intel.com> |
drivers/raw: remove rawdev from directory names
The ifpga and skeleton rawdev drivers included "rawdev" in their directory names, which was superfluous given that they were in the drivers/raw direct
drivers/raw: remove rawdev from directory names
The ifpga and skeleton rawdev drivers included "rawdev" in their directory names, which was superfluous given that they were in the drivers/raw directory. Shorten the names via this patch.
For meson builds, this will rename the final library .so/.a files produced, but those will be renamed again later via a patch to standardize rawdev names.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
show more ...
|