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6b0047fa |
| 10-Oct-2024 |
Danylo Vodopianov <dvo-plv@napatech.com> |
net/ntnic: add queue setup operations
Added TX and RX queue setup. Handles memory allocation and hardware Virtio queue setup.
Allocates and configures memory for hardware Virtio queues, including h
net/ntnic: add queue setup operations
Added TX and RX queue setup. Handles memory allocation and hardware Virtio queue setup.
Allocates and configures memory for hardware Virtio queues, including handling IOMMU and VFIO mappings.
Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com> Acked-by: Serhii Iliushyk <sil-plv@napatech.com>
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b0cd36e9 |
| 10-Oct-2024 |
Danylo Vodopianov <dvo-plv@napatech.com> |
net/ntnic: enhance Ethernet device configuration
Added eth_dev_close function to handle closing of Ethernet devices. It releases managed RX/TX virtual queues.
Initialized scatter-gather queue syste
net/ntnic: enhance Ethernet device configuration
Added eth_dev_close function to handle closing of Ethernet devices. It releases managed RX/TX virtual queues.
Initialized scatter-gather queue system.
Defined constants and macros for hardware RX/TX descriptors and packet buffer sizes.
Defined structures for RX and TX packet headers including fields for packet length, descriptors, and color types.
Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com> Acked-by: Serhii Iliushyk <sil-plv@napatech.com>
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e3723ca6 |
| 10-Oct-2024 |
Oleksandr Kolomeiets <okl-plv@napatech.com> |
net/ntnic: add info flow module
The info module keeps track of the hardcoded parameters of the FPGA and provides an abstraction that can support if parameter is unsupported for a given FPGA.
Signed
net/ntnic: add info flow module
The info module keeps track of the hardcoded parameters of the FPGA and provides an abstraction that can support if parameter is unsupported for a given FPGA.
Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com> Acked-by: Serhii Iliushyk <sil-plv@napatech.com>
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eaf1ebdc |
| 17-Jul-2024 |
Serhii Iliushyk <sil-plv@napatech.com> |
net/ntnic: add generic NIM and I2C modules
As the ntnic can support different port speeds, it also needs to support different NIMs (Network Interface Module). This commit add the generic NIM support
net/ntnic: add generic NIM and I2C modules
As the ntnic can support different port speeds, it also needs to support different NIMs (Network Interface Module). This commit add the generic NIM support for ntnic, such that the specific modules, such as QSFP28 can be added later.
The communication with NIMs is in the form of I2C, so support for such a module is added as well.
Additionally a thread is added to control the NIM stat machines.
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@amd.com>
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ddf184d0 |
| 17-Jul-2024 |
Serhii Iliushyk <sil-plv@napatech.com> |
net/ntnic: add FPGA initialization
Enable FPGA initialization and adds ethdev fw_version_get.
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@amd.com>
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0d9bca48 |
| 17-Jul-2024 |
Serhii Iliushyk <sil-plv@napatech.com> |
net/ntnic: add FPGA modules for initialization
New ntnic FPGA modules: - Host Interface (HIF): Basic FPGA info such as prod ID and build time. - Inter-Integrated Circuit Controller (IIC): Use the FP
net/ntnic: add FPGA modules for initialization
New ntnic FPGA modules: - Host Interface (HIF): Basic FPGA info such as prod ID and build time. - Inter-Integrated Circuit Controller (IIC): Use the FPGA to access the other integrated circuits on the ntnic. - PCI Express Gen3 (PCIE3): The FPGA part of PCIe3 initialization, speed tests, and configuration.
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@amd.com>
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7812b7a7 |
| 17-Jul-2024 |
Serhii Iliushyk <sil-plv@napatech.com> |
net/ntnic: add core platform structures
Adds many of the high level structures needed by the ntnic FPGA modules and adapter control. This is considered the first part of the skeleton of ntnic FPGA s
net/ntnic: add core platform structures
Adds many of the high level structures needed by the ntnic FPGA modules and adapter control. This is considered the first part of the skeleton of ntnic FPGA support
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@amd.com>
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