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efa79e68 |
| 29-Jan-2020 |
Ori Kam <orika@mellanox.com> |
net/mlx5: support fine grain dynamic flag
The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets.
In some cases w
net/mlx5: support fine grain dynamic flag
The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets.
In some cases when using external memory, the PCI bandwidth is not relevant since the memory can be accessed by other means.
This commit introduce the ability to control the inline with mbuf granularity.
In order to use this feature the application should register the field name, and restart the port.
Signed-off-by: Ori Kam <orika@mellanox.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
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fbde4331 |
| 28-Jan-2020 |
Matan Azrad <matan@mellanox.com> |
net/mlx5: make FDB default rule optional
There are RDMA-CORE versions which are not supported multi-table for some Mellanox mlx5 devices.
Hence, the optimization added in commit [1] which forwards
net/mlx5: make FDB default rule optional
There are RDMA-CORE versions which are not supported multi-table for some Mellanox mlx5 devices.
Hence, the optimization added in commit [1] which forwards all the FDB traffic to table 1 cannot be configured.
Make the above optimization optional: Do not fail when either table 1 cannot be created or the jump rule (all =>jump to table 1) is not configured successfully. In this case, all the flows will be configured to table 0.
[1] commit b67b4ecbde22 ("net/mlx5: skip table zero to improve insertion rate")
Cc: stable@dpdk.org
Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
bf864e82 |
| 27-Nov-2019 |
Tonghao Zhang <xiangxia.m.yue@gmail.com> |
net/mlx5: fix crash when setting hairpin queues
If configuring the number of tx/rx queue with rte_eth_dev_configure to nr_queues + hairpin_nr_queues, and setting tx/rx queues to nr_queues with rte_e
net/mlx5: fix crash when setting hairpin queues
If configuring the number of tx/rx queue with rte_eth_dev_configure to nr_queues + hairpin_nr_queues, and setting tx/rx queues to nr_queues with rte_eth_tx/rx_queue_setup. But not configuring the hairpin queues via rte_eth_tx/rx_hairpin_queue_setup.
When starting the netdev, there is a crash because of NULL accessing.
Fixes: cf5516696d77 ("ethdev: add hairpin queue") Cc: stable@dpdk.org
Signed-off-by: Tonghao Zhang <xiangxia.m.yue@gmail.com> Acked-by: Ori Kam <orika@mellanox.com>
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7f151701 |
| 12-Nov-2019 |
Matan Azrad <matan@mellanox.com> |
net/mlx5: revert default rules amount optimization
This reverts commit 304ffe576f239e5405228c0feec04b6138d525b7.
It tried to optimize the amount of the default flow rules and created it only once o
net/mlx5: revert default rules amount optimization
This reverts commit 304ffe576f239e5405228c0feec04b6138d525b7.
It tried to optimize the amount of the default flow rules and created it only once on top of the PF representor.
For each FDB rule, the default port ID to match on is like of the port that triggers the flow.
Hence, the single default rule will not be matched on the VF traffic.
As a result, all the traffic of the VFs will not match to the jump flow in the root table and will always be forwarded to the representor port.
Revert the commit.
Fixes: 304ffe576f23 ("net/mlx5: fix condition to create default rule")
Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
304ffe57 |
| 07-Nov-2019 |
Dekel Peled <dekelp@mellanox.com> |
net/mlx5: fix condition to create default rule
Previous patch added creation of a default flow rule on port start. Rule is created under the condition that device is in eswitch mode, and is not a VF
net/mlx5: fix condition to create default rule
Previous patch added creation of a default flow rule on port start. Rule is created under the condition that device is in eswitch mode, and is not a VF, to make sure rule is created only once. In Bluefield, where PF representor is used, this condition is not sufficient. Rule is created twice, causing loss of traffic.
This patch updates this condition, adding check that device is also not a representor.
Fixes: b67b4ecbde22 ("net/mlx5: skip table zero to improve insertion rate")
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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3c84f34e |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: add default flows for hairpin
When using hairpin all traffic from TX hairpin queues should jump to dedecated table where matching can be done using regesters.
Signed-off-by: Ori Kam <orik
net/mlx5: add default flows for hairpin
When using hairpin all traffic from TX hairpin queues should jump to dedecated table where matching can be done using regesters.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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63bd1629 |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: support RSS on hairpin
Add support for rss on hairpin queues.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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6a338ad4 |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: add hairpin binding function
When starting the port, in addition to creating the queues we need to bind the hairpin queues.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viachesla
net/mlx5: add hairpin binding function
When starting the port, in addition to creating the queues we need to bind the hairpin queues.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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ae18a1ae |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: support Tx hairpin queues
This commit adds the support for creating Tx hairpin queues. Hairpin queue is a queue that is created using DevX and only used by the HW.
Signed-off-by: Ori Kam
net/mlx5: support Tx hairpin queues
This commit adds the support for creating Tx hairpin queues. Hairpin queue is a queue that is created using DevX and only used by the HW.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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894c4a8e |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: prepare Tx queues to have different types
Currently all Tx queues are created using Verbs. This commit modify the naming so it will not include verbs, since in next commit a new type will
net/mlx5: prepare Tx queues to have different types
Currently all Tx queues are created using Verbs. This commit modify the naming so it will not include verbs, since in next commit a new type will be introduce (hairpin)
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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e79c9be9 |
| 30-Oct-2019 |
Ori Kam <orika@mellanox.com> |
net/mlx5: support Rx hairpin queues
This commit adds the support for creating Rx hairpin queues. Hairpin queue is a queue that is created using DevX and only used by the HW. This results in that all
net/mlx5: support Rx hairpin queues
This commit adds the support for creating Rx hairpin queues. Hairpin queue is a queue that is created using DevX and only used by the HW. This results in that all the data part of the RQ is not being used.
Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
b67b4ecb |
| 11-Sep-2019 |
Dekel Peled <dekelp@mellanox.com> |
net/mlx5: skip table zero to improve insertion rate
E-switch tables one and above provide higher insertion rate than table zero, as well as enhanced functionality.
This patch adds a mechanism to ut
net/mlx5: skip table zero to improve insertion rate
E-switch tables one and above provide higher insertion rate than table zero, as well as enhanced functionality.
This patch adds a mechanism to utilize these advantages, by creating a default rule on port start, which directs all packets from e-switch table zero to table one. Other flow rules, requested for group n, will be created in e-switch table n+1. Jump action to e-switch group n will be created to group n+1.
Utility function mlx5_flow_group_to_table() is added to translate the rte_flow group value to HW table value, and is called by PMD flow engine on flow rule validation and creation.
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
17ed314c |
| 29-Jul-2019 |
Matan Azrad <matan@mellanox.com> |
net/mlx5: allow LRO per Rx queue
Enabling LRO offload per queue makes sense because the user will probably want to allocate different mempool for LRO queues - the LRO mempool mbuf size may be bigger
net/mlx5: allow LRO per Rx queue
Enabling LRO offload per queue makes sense because the user will probably want to allocate different mempool for LRO queues - the LRO mempool mbuf size may be bigger than non LRO mempool.
Change the LRO offload to be per queue instead of per port.
If one of the queues is with LRO enabled, all the queues will be configured via DevX.
If RSS flows direct TCP packets to queues with different LRO enabling, these flows will not be offloaded with LRO.
Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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940f0a1d |
| 22-Jul-2019 |
Dekel Peled <dekelp@mellanox.com> |
net/mlx5: support LRO with single RxQ object
Implement LRO support using a single RQ object per DPDK RxQ.
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
net/mlx5: support LRO with single RxQ object
Implement LRO support using a single RQ object per DPDK RxQ.
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
dc9ceff7 |
| 22-Jul-2019 |
Dekel Peled <dekelp@mellanox.com> |
net/mlx5: create advanced RxQ via DevX
Function mlx5_rxq_obj_new(), previously called mlx5_rxq_ibv_new(), supports creating Rx queue objects using verbs. This patch expands the relevant functions, t
net/mlx5: create advanced RxQ via DevX
Function mlx5_rxq_obj_new(), previously called mlx5_rxq_ibv_new(), supports creating Rx queue objects using verbs. This patch expands the relevant functions, to support creating verbs or DevX Rx queue objects: Function mlx5_rxq_obj_new() updated to create RQ object using DevX. Function mlx5_ind_table_obj_new() updated to create RQT object using DevX. Function mlx5_hrxq_new() updated to create TIR object using DevX. New utility functions added to perform specific operations: mlx5_devx_rq_new(), mlx5_devx_wq_attr_fill(), mlx5_devx_create_rq_attr_fill().
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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#
93403560 |
| 22-Jul-2019 |
Dekel Peled <dekelp@mellanox.com> |
net/mlx5: rename RxQ verbs to general RxQ object
Prepare for introducing of DevX RxQ object. RxQ object is currently created using verbs only. The next patches will add the option to create RxQ obje
net/mlx5: rename RxQ verbs to general RxQ object
Prepare for introducing of DevX RxQ object. RxQ object is currently created using verbs only. The next patches will add the option to create RxQ object using DevX. This patch renames rxq_ibv to rxq_obj wherever relevant, and adds the DevX items to relevant structs.
Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
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2d77cb61 |
| 30-May-2019 |
Matan Azrad <matan@mellanox.com> |
net/mlx5: recover secondary process Rx errors
The RQ errors recovery mechanism in the PMD invokes a Verbs functions to modify the RQ states in order to reset the RQ and to reactivate it.
These Verb
net/mlx5: recover secondary process Rx errors
The RQ errors recovery mechanism in the PMD invokes a Verbs functions to modify the RQ states in order to reset the RQ and to reactivate it.
These Verbs functions are not allowed to be invoked from a secondary process, hence the PMD skips the recovery when the error is captured by secondary processes queues.
Using the DPDK IPC mechanism the secondary process can request Verbs queues state modifications to be done synchronically by the primary process.
Add support for secondary process Rx errors recovery.
Cc: stable@dpdk.org
Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
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35b2d13f |
| 21-May-2019 |
Olivier Matz <olivier.matz@6wind.com> |
net: add rte prefix to ether defines
Add 'RTE_' prefix to defines: - rename ETHER_ADDR_LEN as RTE_ETHER_ADDR_LEN. - rename ETHER_TYPE_LEN as RTE_ETHER_TYPE_LEN. - rename ETHER_CRC_LEN as RTE_ETHER_C
net: add rte prefix to ether defines
Add 'RTE_' prefix to defines: - rename ETHER_ADDR_LEN as RTE_ETHER_ADDR_LEN. - rename ETHER_TYPE_LEN as RTE_ETHER_TYPE_LEN. - rename ETHER_CRC_LEN as RTE_ETHER_CRC_LEN. - rename ETHER_HDR_LEN as RTE_ETHER_HDR_LEN. - rename ETHER_MIN_LEN as RTE_ETHER_MIN_LEN. - rename ETHER_MAX_LEN as RTE_ETHER_MAX_LEN. - rename ETHER_MTU as RTE_ETHER_MTU. - rename ETHER_MAX_VLAN_FRAME_LEN as RTE_ETHER_MAX_VLAN_FRAME_LEN. - rename ETHER_MAX_VLAN_ID as RTE_ETHER_MAX_VLAN_ID. - rename ETHER_MAX_JUMBO_FRAME_LEN as RTE_ETHER_MAX_JUMBO_FRAME_LEN. - rename ETHER_MIN_MTU as RTE_ETHER_MIN_MTU. - rename ETHER_LOCAL_ADMIN_ADDR as RTE_ETHER_LOCAL_ADMIN_ADDR. - rename ETHER_GROUP_ADDR as RTE_ETHER_GROUP_ADDR. - rename ETHER_TYPE_IPv4 as RTE_ETHER_TYPE_IPv4. - rename ETHER_TYPE_IPv6 as RTE_ETHER_TYPE_IPv6. - rename ETHER_TYPE_ARP as RTE_ETHER_TYPE_ARP. - rename ETHER_TYPE_VLAN as RTE_ETHER_TYPE_VLAN. - rename ETHER_TYPE_RARP as RTE_ETHER_TYPE_RARP. - rename ETHER_TYPE_QINQ as RTE_ETHER_TYPE_QINQ. - rename ETHER_TYPE_ETAG as RTE_ETHER_TYPE_ETAG. - rename ETHER_TYPE_1588 as RTE_ETHER_TYPE_1588. - rename ETHER_TYPE_SLOW as RTE_ETHER_TYPE_SLOW. - rename ETHER_TYPE_TEB as RTE_ETHER_TYPE_TEB. - rename ETHER_TYPE_LLDP as RTE_ETHER_TYPE_LLDP. - rename ETHER_TYPE_MPLS as RTE_ETHER_TYPE_MPLS. - rename ETHER_TYPE_MPLSM as RTE_ETHER_TYPE_MPLSM. - rename ETHER_VXLAN_HLEN as RTE_ETHER_VXLAN_HLEN. - rename ETHER_ADDR_FMT_SIZE as RTE_ETHER_ADDR_FMT_SIZE. - rename VXLAN_GPE_TYPE_IPV4 as RTE_VXLAN_GPE_TYPE_IPV4. - rename VXLAN_GPE_TYPE_IPV6 as RTE_VXLAN_GPE_TYPE_IPV6. - rename VXLAN_GPE_TYPE_ETH as RTE_VXLAN_GPE_TYPE_ETH. - rename VXLAN_GPE_TYPE_NSH as RTE_VXLAN_GPE_TYPE_NSH. - rename VXLAN_GPE_TYPE_MPLS as RTE_VXLAN_GPE_TYPE_MPLS. - rename VXLAN_GPE_TYPE_GBP as RTE_VXLAN_GPE_TYPE_GBP. - rename VXLAN_GPE_TYPE_VBNG as RTE_VXLAN_GPE_TYPE_VBNG. - rename ETHER_VXLAN_GPE_HLEN as RTE_ETHER_VXLAN_GPE_HLEN.
Do not update the command line library to avoid adding a dependency to librte_net.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com> Reviewed-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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6d13ea8e |
| 21-May-2019 |
Olivier Matz <olivier.matz@6wind.com> |
net: add rte prefix to ether structures
Add 'rte_' prefix to structures: - rename struct ether_addr as struct rte_ether_addr. - rename struct ether_hdr as struct rte_ether_hdr. - rename struct vlan_
net: add rte prefix to ether structures
Add 'rte_' prefix to structures: - rename struct ether_addr as struct rte_ether_addr. - rename struct ether_hdr as struct rte_ether_hdr. - rename struct vlan_hdr as struct rte_vlan_hdr. - rename struct vxlan_hdr as struct rte_vxlan_hdr. - rename struct vxlan_gpe_hdr as struct rte_vxlan_gpe_hdr.
Do not update the command line library to avoid adding a dependency to librte_net.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com> Reviewed-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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#
120dc4a7 |
| 10-Apr-2019 |
Yongseok Koh <yskoh@mellanox.com> |
net/mlx5: remove device register remap
UAR (User Access Region) register does not need to be remapped for primary process but it should be remapped only for secondary process. UAR register table is
net/mlx5: remove device register remap
UAR (User Access Region) register does not need to be remapped for primary process but it should be remapped only for secondary process. UAR register table is in the process private structure in rte_eth_devices[], (struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private
The actual UAR table follows the data structure and the table is used for both Tx and Rx.
For Tx, BlueFlame in UAR is used to ring the doorbell. MLX5_TX_BFREG(txq) is defined to get a register for the txq. Processes access its own private data to acquire the register from the UAR table.
For Rx, the doorbell in UAR is required in arming CQ event. However, it is a known issue that the register isn't remapped for secondary process.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
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d5c900d1 |
| 10-Apr-2019 |
Yongseok Koh <yskoh@mellanox.com> |
net/mlx5: remove redundant queue index
Queue index is redundantly stored for both Rx and Tx structures. E.g. txq_ctrl->idx and txq->stats.idx. Both are consolidated to single storage - rxq->idx and
net/mlx5: remove redundant queue index
Queue index is redundantly stored for both Rx and Tx structures. E.g. txq_ctrl->idx and txq->stats.idx. Both are consolidated to single storage - rxq->idx and txq->idx.
Also, rxq and txq are moved to the beginning of its control structure (rxq_ctrl and txq_ctrl) for cacheline alignment.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
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2aac5b5d |
| 01-Apr-2019 |
Yongseok Koh <yskoh@mellanox.com> |
net/mlx5: sync stop/start with secondary process
Rx/Tx burst function pointers are stored in the rte_eth_dev structure, which is local to a process. Even though primary process replaces the function
net/mlx5: sync stop/start with secondary process
Rx/Tx burst function pointers are stored in the rte_eth_dev structure, which is local to a process. Even though primary process replaces the function pointers, secondary will not run the new ones. With rte_mp APIs, primary can easily broadcast a request to stop/start the datapath of secondary processes.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
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f048f3d4 |
| 27-Mar-2019 |
Viacheslav Ovsiienko <viacheslavo@mellanox.com> |
net/mlx5: switch to the shared IB device context
The code is updated to use the shared IB device context and device handles. The IB device context is shared between reprentors created over the singl
net/mlx5: switch to the shared IB device context
The code is updated to use the shared IB device context and device handles. The IB device context is shared between reprentors created over the single multiport IB device. All Verbs and DevX objects will be created within this shared context.
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
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dbeba4cf |
| 21-Feb-2019 |
Thomas Monjalon <thomas@monjalon.net> |
net/mlx: prefix private structure
The private structure stored in rte_eth_dev->data->dev_private was named "struct priv". In order to ease code browsing, the structure is renamed "struct mlx[45]_pri
net/mlx: prefix private structure
The private structure stored in rte_eth_dev->data->dev_private was named "struct priv". In order to ease code browsing, the structure is renamed "struct mlx[45]_priv".
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Yongseok Koh <yskoh@mellanox.com>
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ce9494d7 |
| 23-Nov-2018 |
Tom Barbette <barbette@kth.se> |
net/mlx5: report imissed statistics
The imissed counters (number of packets dropped because the queues were full) were actually reported through xstats as "rx_out_of_buffer" but was not reported thr
net/mlx5: report imissed statistics
The imissed counters (number of packets dropped because the queues were full) were actually reported through xstats as "rx_out_of_buffer" but was not reported through stats.
Following a recent discussion on the ML, as there is no way to tell the user if a counter is implemented or not, this should be considered a bug. For example, user looking at imissed will think the packets are lost before reaching the device.
Signed-off-by: Tom Barbette <barbette@kth.se> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
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