1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #include <unistd.h> 7 8 #include <rte_ether.h> 9 #include <rte_ethdev_driver.h> 10 #include <rte_interrupts.h> 11 #include <rte_alarm.h> 12 13 #include "mlx5.h" 14 #include "mlx5_rxtx.h" 15 #include "mlx5_utils.h" 16 17 /** 18 * Stop traffic on Tx queues. 19 * 20 * @param dev 21 * Pointer to Ethernet device structure. 22 */ 23 static void 24 mlx5_txq_stop(struct rte_eth_dev *dev) 25 { 26 struct mlx5_priv *priv = dev->data->dev_private; 27 unsigned int i; 28 29 for (i = 0; i != priv->txqs_n; ++i) 30 mlx5_txq_release(dev, i); 31 } 32 33 /** 34 * Start traffic on Tx queues. 35 * 36 * @param dev 37 * Pointer to Ethernet device structure. 38 * 39 * @return 40 * 0 on success, a negative errno value otherwise and rte_errno is set. 41 */ 42 static int 43 mlx5_txq_start(struct rte_eth_dev *dev) 44 { 45 struct mlx5_priv *priv = dev->data->dev_private; 46 unsigned int i; 47 int ret; 48 49 for (i = 0; i != priv->txqs_n; ++i) { 50 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i); 51 52 if (!txq_ctrl) 53 continue; 54 txq_alloc_elts(txq_ctrl); 55 txq_ctrl->ibv = mlx5_txq_ibv_new(dev, i); 56 if (!txq_ctrl->ibv) { 57 rte_errno = ENOMEM; 58 goto error; 59 } 60 } 61 return 0; 62 error: 63 ret = rte_errno; /* Save rte_errno before cleanup. */ 64 do { 65 mlx5_txq_release(dev, i); 66 } while (i-- != 0); 67 rte_errno = ret; /* Restore rte_errno. */ 68 return -rte_errno; 69 } 70 71 /** 72 * Stop traffic on Rx queues. 73 * 74 * @param dev 75 * Pointer to Ethernet device structure. 76 */ 77 static void 78 mlx5_rxq_stop(struct rte_eth_dev *dev) 79 { 80 struct mlx5_priv *priv = dev->data->dev_private; 81 unsigned int i; 82 83 for (i = 0; i != priv->rxqs_n; ++i) 84 mlx5_rxq_release(dev, i); 85 } 86 87 /** 88 * Start traffic on Rx queues. 89 * 90 * @param dev 91 * Pointer to Ethernet device structure. 92 * 93 * @return 94 * 0 on success, a negative errno value otherwise and rte_errno is set. 95 */ 96 static int 97 mlx5_rxq_start(struct rte_eth_dev *dev) 98 { 99 struct mlx5_priv *priv = dev->data->dev_private; 100 unsigned int i; 101 int ret = 0; 102 enum mlx5_rxq_obj_type obj_type = MLX5_RXQ_OBJ_TYPE_IBV; 103 104 for (i = 0; i < priv->rxqs_n; ++i) { 105 if ((*priv->rxqs)[i]->lro) { 106 obj_type = MLX5_RXQ_OBJ_TYPE_DEVX_RQ; 107 break; 108 } 109 } 110 /* Allocate/reuse/resize mempool for Multi-Packet RQ. */ 111 if (mlx5_mprq_alloc_mp(dev)) { 112 /* Should not release Rx queues but return immediately. */ 113 return -rte_errno; 114 } 115 for (i = 0; i != priv->rxqs_n; ++i) { 116 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i); 117 struct rte_mempool *mp; 118 119 if (!rxq_ctrl) 120 continue; 121 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) { 122 rxq_ctrl->obj = mlx5_rxq_obj_new 123 (dev, i, MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN); 124 if (!rxq_ctrl->obj) 125 goto error; 126 continue; 127 } 128 /* Pre-register Rx mempool. */ 129 mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ? 130 rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp; 131 DRV_LOG(DEBUG, 132 "port %u Rx queue %u registering" 133 " mp %s having %u chunks", 134 dev->data->port_id, rxq_ctrl->rxq.idx, 135 mp->name, mp->nb_mem_chunks); 136 mlx5_mr_update_mp(dev, &rxq_ctrl->rxq.mr_ctrl, mp); 137 ret = rxq_alloc_elts(rxq_ctrl); 138 if (ret) 139 goto error; 140 rxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type); 141 if (!rxq_ctrl->obj) 142 goto error; 143 if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV) 144 rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num; 145 else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) 146 rxq_ctrl->wqn = rxq_ctrl->obj->rq->id; 147 } 148 return 0; 149 error: 150 ret = rte_errno; /* Save rte_errno before cleanup. */ 151 do { 152 mlx5_rxq_release(dev, i); 153 } while (i-- != 0); 154 rte_errno = ret; /* Restore rte_errno. */ 155 return -rte_errno; 156 } 157 158 /** 159 * DPDK callback to start the device. 160 * 161 * Simulate device start by attaching all configured flows. 162 * 163 * @param dev 164 * Pointer to Ethernet device structure. 165 * 166 * @return 167 * 0 on success, a negative errno value otherwise and rte_errno is set. 168 */ 169 int 170 mlx5_dev_start(struct rte_eth_dev *dev) 171 { 172 struct mlx5_priv *priv = dev->data->dev_private; 173 int ret; 174 175 DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id); 176 ret = mlx5_txq_start(dev); 177 if (ret) { 178 DRV_LOG(ERR, "port %u Tx queue allocation failed: %s", 179 dev->data->port_id, strerror(rte_errno)); 180 return -rte_errno; 181 } 182 ret = mlx5_rxq_start(dev); 183 if (ret) { 184 DRV_LOG(ERR, "port %u Rx queue allocation failed: %s", 185 dev->data->port_id, strerror(rte_errno)); 186 mlx5_txq_stop(dev); 187 return -rte_errno; 188 } 189 dev->data->dev_started = 1; 190 ret = mlx5_rx_intr_vec_enable(dev); 191 if (ret) { 192 DRV_LOG(ERR, "port %u Rx interrupt vector creation failed", 193 dev->data->port_id); 194 goto error; 195 } 196 mlx5_stats_init(dev); 197 ret = mlx5_traffic_enable(dev); 198 if (ret) { 199 DRV_LOG(DEBUG, "port %u failed to set defaults flows", 200 dev->data->port_id); 201 goto error; 202 } 203 ret = mlx5_flow_start(dev, &priv->flows); 204 if (ret) { 205 DRV_LOG(DEBUG, "port %u failed to set flows", 206 dev->data->port_id); 207 goto error; 208 } 209 rte_wmb(); 210 dev->tx_pkt_burst = mlx5_select_tx_function(dev); 211 dev->rx_pkt_burst = mlx5_select_rx_function(dev); 212 /* Enable datapath on secondary process. */ 213 mlx5_mp_req_start_rxtx(dev); 214 mlx5_dev_interrupt_handler_install(dev); 215 return 0; 216 error: 217 ret = rte_errno; /* Save rte_errno before cleanup. */ 218 /* Rollback. */ 219 dev->data->dev_started = 0; 220 mlx5_flow_stop(dev, &priv->flows); 221 mlx5_traffic_disable(dev); 222 mlx5_txq_stop(dev); 223 mlx5_rxq_stop(dev); 224 rte_errno = ret; /* Restore rte_errno. */ 225 return -rte_errno; 226 } 227 228 /** 229 * DPDK callback to stop the device. 230 * 231 * Simulate device stop by detaching all configured flows. 232 * 233 * @param dev 234 * Pointer to Ethernet device structure. 235 */ 236 void 237 mlx5_dev_stop(struct rte_eth_dev *dev) 238 { 239 struct mlx5_priv *priv = dev->data->dev_private; 240 241 dev->data->dev_started = 0; 242 /* Prevent crashes when queues are still in use. */ 243 dev->rx_pkt_burst = removed_rx_burst; 244 dev->tx_pkt_burst = removed_tx_burst; 245 rte_wmb(); 246 /* Disable datapath on secondary process. */ 247 mlx5_mp_req_stop_rxtx(dev); 248 usleep(1000 * priv->rxqs_n); 249 DRV_LOG(DEBUG, "port %u stopping device", dev->data->port_id); 250 mlx5_flow_stop(dev, &priv->flows); 251 mlx5_traffic_disable(dev); 252 mlx5_rx_intr_vec_disable(dev); 253 mlx5_dev_interrupt_handler_uninstall(dev); 254 mlx5_txq_stop(dev); 255 mlx5_rxq_stop(dev); 256 } 257 258 /** 259 * Enable traffic flows configured by control plane 260 * 261 * @param dev 262 * Pointer to Ethernet device private data. 263 * @param dev 264 * Pointer to Ethernet device structure. 265 * 266 * @return 267 * 0 on success, a negative errno value otherwise and rte_errno is set. 268 */ 269 int 270 mlx5_traffic_enable(struct rte_eth_dev *dev) 271 { 272 struct mlx5_priv *priv = dev->data->dev_private; 273 struct rte_flow_item_eth bcast = { 274 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 275 }; 276 struct rte_flow_item_eth ipv6_multi_spec = { 277 .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00", 278 }; 279 struct rte_flow_item_eth ipv6_multi_mask = { 280 .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00", 281 }; 282 struct rte_flow_item_eth unicast = { 283 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 284 }; 285 struct rte_flow_item_eth unicast_mask = { 286 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 287 }; 288 const unsigned int vlan_filter_n = priv->vlan_filter_n; 289 const struct rte_ether_addr cmp = { 290 .addr_bytes = "\x00\x00\x00\x00\x00\x00", 291 }; 292 unsigned int i; 293 unsigned int j; 294 int ret; 295 296 if (priv->config.dv_esw_en && !priv->config.vf) 297 if (!mlx5_flow_create_esw_table_zero_flow(dev)) 298 goto error; 299 if (priv->isolated) 300 return 0; 301 if (dev->data->promiscuous) { 302 struct rte_flow_item_eth promisc = { 303 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", 304 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 305 .type = 0, 306 }; 307 308 ret = mlx5_ctrl_flow(dev, &promisc, &promisc); 309 if (ret) 310 goto error; 311 } 312 if (dev->data->all_multicast) { 313 struct rte_flow_item_eth multicast = { 314 .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00", 315 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 316 .type = 0, 317 }; 318 319 ret = mlx5_ctrl_flow(dev, &multicast, &multicast); 320 if (ret) 321 goto error; 322 } else { 323 /* Add broadcast/multicast flows. */ 324 for (i = 0; i != vlan_filter_n; ++i) { 325 uint16_t vlan = priv->vlan_filter[i]; 326 327 struct rte_flow_item_vlan vlan_spec = { 328 .tci = rte_cpu_to_be_16(vlan), 329 }; 330 struct rte_flow_item_vlan vlan_mask = 331 rte_flow_item_vlan_mask; 332 333 ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast, 334 &vlan_spec, &vlan_mask); 335 if (ret) 336 goto error; 337 ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec, 338 &ipv6_multi_mask, 339 &vlan_spec, &vlan_mask); 340 if (ret) 341 goto error; 342 } 343 if (!vlan_filter_n) { 344 ret = mlx5_ctrl_flow(dev, &bcast, &bcast); 345 if (ret) 346 goto error; 347 ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec, 348 &ipv6_multi_mask); 349 if (ret) 350 goto error; 351 } 352 } 353 /* Add MAC address flows. */ 354 for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) { 355 struct rte_ether_addr *mac = &dev->data->mac_addrs[i]; 356 357 if (!memcmp(mac, &cmp, sizeof(*mac))) 358 continue; 359 memcpy(&unicast.dst.addr_bytes, 360 mac->addr_bytes, 361 RTE_ETHER_ADDR_LEN); 362 for (j = 0; j != vlan_filter_n; ++j) { 363 uint16_t vlan = priv->vlan_filter[j]; 364 365 struct rte_flow_item_vlan vlan_spec = { 366 .tci = rte_cpu_to_be_16(vlan), 367 }; 368 struct rte_flow_item_vlan vlan_mask = 369 rte_flow_item_vlan_mask; 370 371 ret = mlx5_ctrl_flow_vlan(dev, &unicast, 372 &unicast_mask, 373 &vlan_spec, 374 &vlan_mask); 375 if (ret) 376 goto error; 377 } 378 if (!vlan_filter_n) { 379 ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask); 380 if (ret) 381 goto error; 382 } 383 } 384 return 0; 385 error: 386 ret = rte_errno; /* Save rte_errno before cleanup. */ 387 mlx5_flow_list_flush(dev, &priv->ctrl_flows); 388 rte_errno = ret; /* Restore rte_errno. */ 389 return -rte_errno; 390 } 391 392 393 /** 394 * Disable traffic flows configured by control plane 395 * 396 * @param dev 397 * Pointer to Ethernet device private data. 398 */ 399 void 400 mlx5_traffic_disable(struct rte_eth_dev *dev) 401 { 402 struct mlx5_priv *priv = dev->data->dev_private; 403 404 mlx5_flow_list_flush(dev, &priv->ctrl_flows); 405 } 406 407 /** 408 * Restart traffic flows configured by control plane 409 * 410 * @param dev 411 * Pointer to Ethernet device private data. 412 * 413 * @return 414 * 0 on success, a negative errno value otherwise and rte_errno is set. 415 */ 416 int 417 mlx5_traffic_restart(struct rte_eth_dev *dev) 418 { 419 if (dev->data->dev_started) { 420 mlx5_traffic_disable(dev); 421 return mlx5_traffic_enable(dev); 422 } 423 return 0; 424 } 425