| 8c53b9b7 | 15-Oct-2024 |
Jun Yang <jun.yang@nxp.com> |
dma/dpaa: add QDMA stall workaround for ERR050265
Non-prefetchable read setting in the source descriptor may be required for targets other than local memory. Prefetchable read setting will offer bet
dma/dpaa: add QDMA stall workaround for ERR050265
Non-prefetchable read setting in the source descriptor may be required for targets other than local memory. Prefetchable read setting will offer better performance for misaligned transfers in the form of fewer transactions and should be set if possible. This patch also fixes QDMA stall issue due to unaligned transactions.
Signed-off-by: Jun Yang <jun.yang@nxp.com> Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
show more ...
|
| bdcb782a | 15-Oct-2024 |
Jun Yang <jun.yang@nxp.com> |
dma/dpaa: add workaround for ERR050757
ERR050757 on LS104x indicates:
For outbound PCIe read transactions, a completion buffer is used to store the PCIe completions till the data is passed back to
dma/dpaa: add workaround for ERR050757
ERR050757 on LS104x indicates:
For outbound PCIe read transactions, a completion buffer is used to store the PCIe completions till the data is passed back to the initiator. At most 16 outstanding transactions are allowed and maximum read request is 256 bytes. The completion buffer size inside the controller needs to be at least 4KB, but the PCIe controller has 3 KB of buffer. In case the size of pending outbound read transactions of more than 3KB, the PCIe controller may drop the incoming completions without notifying the initiator of the transaction, leaving transactions unfinished. All subsequent outbound reads to PCIe are blocked permanently. To avoid qDMA hang as it keeps waiting for data that was silently dropped, set stride mode for qDMA.
Signed-off-by: Jun Yang <jun.yang@nxp.com> Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
show more ...
|
| 5bce9bed | 25-Oct-2024 |
Mattias Rönnblom <mattias.ronnblom@ericsson.com> |
eal: add static per-lcore memory allocation facility
Introduce DPDK per-lcore id variables, or lcore variables for short.
An lcore variable has one value for every current and future lcore id-equip
eal: add static per-lcore memory allocation facility
Introduce DPDK per-lcore id variables, or lcore variables for short.
An lcore variable has one value for every current and future lcore id-equipped thread.
The primary <rte_lcore_var.h> use case is for statically allocating small, frequently-accessed data structures, for which one instance should exist for each lcore.
Lcore variables are similar to thread-local storage (TLS, e.g., C11 _Thread_local), but decoupling the values' life time with that of the threads.
Lcore variables are also similar in terms of functionality provided by FreeBSD kernel's DPCPU_*() family of macros and the associated build-time machinery. DPCPU uses linker scripts, which effectively prevents the reuse of its, otherwise seemingly viable, approach.
The currently-prevailing way to solve the same problem as lcore variables is to keep a module's per-lcore data as RTE_MAX_LCORE-sized array of cache-aligned, RTE_CACHE_GUARDed structs. The benefit of lcore variables over this approach is that data related to the same lcore now is close (spatially, in memory), rather than data used by the same module, which in turn avoid excessive use of padding, polluting caches with unused data.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com> Acked-by: Morten Brørup <mb@smartsharesystems.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com> Acked-by: Chengwen Feng <fengchengwen@huawei.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org>
show more ...
|
| 892bf8cf | 21-Oct-2024 |
Sivaprasad Tummala <sivaprasad.tummala@amd.com> |
config/x86: set maximum lcores for AMD EPYC Zen5
On x86 platforms, max lcores are limited to 128 by default.
On AMD EPYC processors, this limit was adjusted for native builds in the commit acb34af9
config/x86: set maximum lcores for AMD EPYC Zen5
On x86 platforms, max lcores are limited to 128 by default.
On AMD EPYC processors, this limit was adjusted for native builds in the commit acb34af951cf ("config/x86: increase lcores number for native AMD EPYC")
As agreed earlier in mailing list, this patch adjusts the limit for specific AMD EPYC target/cross builds.
Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com> Acked-by: Morten Brørup <mb@smartsharesystems.com>
show more ...
|
| c3495563 | 28-Oct-2024 |
David Marchand <david.marchand@redhat.com> |
config/arm: fix warning for native build with meson >= 0.55
Caught in UNH logs for native compilation on ARM:
Program /...../dpdk/config/arm/armv8_machine.py found: YES (/...../dpdk/config/arm/arm
config/arm: fix warning for native build with meson >= 0.55
Caught in UNH logs for native compilation on ARM:
Program /...../dpdk/config/arm/armv8_machine.py found: YES (/...../dpdk/config/arm/armv8_machine.py) WARNING: Project targeting '>= 0.57' but tried to use feature deprecated since '0.55.0': ExternalProgram.path. use ExternalProgram.full_path() instead
There is nothing to search, nor a reason to call the script with an absolute path. The script can be directly pointed at with files().
Fixes: 200b88cbe0e6 ("build: detect micro-arch on ARM") Fixes: 6f3dbd306de0 ("build: increase minimum meson version to 0.57")
Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Robin Jarry <rjarry@redhat.com> Acked-by: Chengwen Feng <fengchengwen@huawei.com>
show more ...
|
| b6105ba4 | 06-Sep-2024 |
Bruce Richardson <bruce.richardson@intel.com> |
config/x86: add 32-bit cross compilation for Arch Linux
Add a 32-bit cross file for x86 for Arch linux.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: David Marchand <david.
config/x86: add 32-bit cross compilation for Arch Linux
Add a 32-bit cross file for x86 for Arch linux.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
show more ...
|
| c3096d21 | 06-Sep-2024 |
Bruce Richardson <bruce.richardson@intel.com> |
config/x86: add 32-bit cross compilation for Fedora
Add cross compilation target for building 32-bit x86 DPDK on Fedora or RHEL.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-b
config/x86: add 32-bit cross compilation for Fedora
Add cross compilation target for building 32-bit x86 DPDK on Fedora or RHEL.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
show more ...
|
| 08cf1112 | 06-Sep-2024 |
Bruce Richardson <bruce.richardson@intel.com> |
config/x86: add 32-bit cross compilation for Debian
To simplify building 32-bit binaries on 64-bit system, we can supply a cross compilation file which provides the relevant compiler flags and setti
config/x86: add 32-bit cross compilation for Debian
To simplify building 32-bit binaries on 64-bit system, we can supply a cross compilation file which provides the relevant compiler flags and settings needed - '-m32' compile/link flag, and appropriate PKG_CONFIG_LIBDIR value. This latter setting will depend upon the layout format of the particular OS/distro in use, so initially add a cross file with paths set for Debian or Ubuntu systems.
Note, unlike previous cross files, this file has a .ini extension which means that editors use correct syntax highlighting on it.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
show more ...
|
| 979f59de | 08-Oct-2024 |
Bruce Richardson <bruce.richardson@intel.com> |
build: add common checks for AVX512
Rather than having each driver do its own checking for AVX-512 support, let's do it once in config/x86/meson.build and let all drivers and libraries reuse that re
build: add common checks for AVX512
Rather than having each driver do its own checking for AVX-512 support, let's do it once in config/x86/meson.build and let all drivers and libraries reuse that result.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
show more ...
|
| 7d386a8f | 07-Mar-2024 |
Anoob Joseph <anoobj@marvell.com> |
config/arm: add -march fallback for Neoverse V2
Add fallback march for Neoverse V2 to support build with older compilers that doesn't support mcpu = 'neoverse-v2'.
Signed-off-by: Anoob Joseph <anoo
config/arm: add -march fallback for Neoverse V2
Add fallback march for Neoverse V2 to support build with older compilers that doesn't support mcpu = 'neoverse-v2'.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
show more ...
|
| 44a312f9 | 14-Mar-2024 |
Pavan Nikhilesh <pbhagavatula@marvell.com> |
config/arm: allow WFE to be enabled by user
Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`.
Example usage: m
config/arm: allow WFE to be enabled by user
Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`.
Example usage: meson build -Dc_args='-DRTE_ARM_USE_WFE' \ --cross-file config/arm/arm64_cn10k_linux_gcc
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Chengwen Feng <fengchengwen@huawei.com> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Wathsala Vithanage <wathsala.vithanage@arm.com>
show more ...
|
| 7fbe6ec6 | 14-Mar-2024 |
Pavan Nikhilesh <pbhagavatula@marvell.com> |
config/arm: support -march fallback
Some ARM CPUs have specific march requirements and are not compatible with the supported march list. Add fallback march in case the mcpu and the march advertised
config/arm: support -march fallback
Some ARM CPUs have specific march requirements and are not compatible with the supported march list. Add fallback march in case the mcpu and the march advertised in the part_number_config are not supported by the compiler.
Example mcpu = neoverse-n2 march = armv9-a fallback_march = armv8.5-a
mcpu, march not supported machine_args = ['-march=armv8.5-a']
mcpu, march, fallback_march not supported least march supported = armv8-a
machine_args = ['-march=armv8-a']
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
show more ...
|
| a51153d0 | 14-Mar-2024 |
Pavan Nikhilesh <pbhagavatula@marvell.com> |
config/arm: add -march crypto feature to thunderxt83
Some older compilers don't recognize crypto march feature for thunderxt83 mcpu. Explicitly add it to march feature list.
Signed-off-by: Pavan Ni
config/arm: add -march crypto feature to thunderxt83
Some older compilers don't recognize crypto march feature for thunderxt83 mcpu. Explicitly add it to march feature list.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
show more ...
|
| 74ef8af0 | 14-Mar-2024 |
Pavan Nikhilesh <pbhagavatula@marvell.com> |
config/arm: add -march armv9-a
Add armv9-a as supported march flag for ARM neoverse class of processors. Update supported march list to include armv9-a.
Signed-off-by: Pavan Nikhilesh <pbhagavatula
config/arm: add -march armv9-a
Add armv9-a as supported march flag for ARM neoverse class of processors. Update supported march list to include armv9-a.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
show more ...
|