vkernel - Delete unused/ancient timer/rtc function declarations in clock.h.

* Also get rid of tsc_is_broken flag, that is completely unused.

kernel: Remove orphaned externs.

kernel/pc64: Adjust some references to already removed i386.

While there, perform some whitespace fixes.
No functional change.

kernel - Refactor smp collision statistics

* Add an indefinite wait timing API (sys/indefinite.h,
sys/indefinite2.h). This interface uses the TSC and will
record lock latencies to our pcpu stat

kernel - Refactor smp collision statistics

* Add an indefinite wait timing API (sys/indefinite.h,
sys/indefinite2.h). This interface uses the TSC and will
record lock latencies to our pcpu stats in microseconds.
The systat -pv 1 display shows this under smpcoll.

Note that latencies generated by tokens, lockmgr, and mutex
locks do not necessarily reflect actual lost cpu time as the
kernel will schedule other threads while those are blocked,
if other threads are available.

* Formalize TSC operations more, supply a type (tsc_uclock_t and
tsc_sclock_t).

* Reinstrument lockmgr, mutex, token, and spinlocks to use the new
indefinite timing interface.

show more ...

kernel: Remove some orphaned extern declarations in sys/platform.

Also a no longer used kmalloc type.

clock/tsc: Detect invariant TSC CPU synchronization

The detected result could be used to determine whether TSC could be
used as cputimer or not, and could be used by other stuffs, e.g.
CoDel AQM pac

clock/tsc: Detect invariant TSC CPU synchronization

The detected result could be used to determine whether TSC could be
used as cputimer or not, and could be used by other stuffs, e.g.
CoDel AQM packet time stamping.

- Only invariant TSC will be tested
- If there is only one CPU, then invariant TSC is always synchronized
- Only CPUs from Intel are tested (*)

The test is conducted using lwkt_cpusync interfaces:
BSP read the TSC, then ask APs to read TSC. If TSC read from any APs
is less then the BSP's TSC, the invariant TSC is not synchronized
across CPUs.

Currently the test runs ~100ms.

(*)
AMD family 15h model 00h-0fh may also have synchronized TSC across
CPUs as pointed out by vsrinivas@, however, according to AMD:

<Revision Guide for AMD Family 15h Models 00h-0Fh Processors
Rev. 3.18 October 2012>
759 One Core May Observe a Time Stamp Counter Skew

AMD family 15h model 00h-0fh is _not_ ready yet.

show more ...

clock/tsc: Detect invariant TSC

According to Intel's description:
"The invariant TSC will run at a constant rate in all ACPI P-, C-. "
and T-states. ..."

The difference between invariant TSC and c

clock/tsc: Detect invariant TSC

According to Intel's description:
"The invariant TSC will run at a constant rate in all ACPI P-, C-. "
and T-states. ..."

The difference between invariant TSC and constant TSC is that
invariant TSC is not affected by frequency changes and deep ACPI
C-state.

Constant TSC could be detected based on the CPU model (Intel has
the model list, while there is no information from AMD's document);
constant TSC is not detected yet.

show more ...

kernel: Make SMP support default (and non-optional).

The 'SMP' kernel option gets removed with this commit, so it has to
be removed from everybody's configs.

Reviewed-by: sjg
Approved-by: many

clock: Remove no longer used statclock_disable and related code

Remove APIC_IO from vkernel

Add platform vkernel64.