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70f74b76 |
| 07-Apr-2017 |
Matthew Dillon <dillon@apollo.backplane.com> |
Revert "kernel - Spread IPIs out to more priority levels"
This commit seems to be causing a performance regression on VMs. Since it didn't fix a particular bug (was just supposed to make things more
Revert "kernel - Spread IPIs out to more priority levels"
This commit seems to be causing a performance regression on VMs. Since it didn't fix a particular bug (was just supposed to make things more robust), revert it for now.
Reported-by: tkusumi
This reverts commit f240042b9f9bcfdacd70499659fcc5f55d5e49ab.
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f240042b |
| 27-Mar-2017 |
Matthew Dillon <dillon@apollo.backplane.com> |
kernel - Spread IPIs out to more priority levels
* Due to the brandamaged way the LAPIC queues received IPIs, each priority level (the top 4 bits of the 8 bit vector) has a 2-entry FIFO. Bring
kernel - Spread IPIs out to more priority levels
* Due to the brandamaged way the LAPIC queues received IPIs, each priority level (the top 4 bits of the 8 bit vector) has a 2-entry FIFO. Bring in comments from FreeBSD on how this works.
* Change our IPI vectors which previously used 2 priority levels to now use 3 priority levels. Each source is generally limited by an atomic op to avoid multi-queueing and hopefully that means the above LAPIC hw queue will never refuse to accept an IPI.
IPIQ and TIMER use group 1
INVLTLB (and INVLPG) uses group 2
SNIFF, CPUSTOP, and SPURIOUSINT use group 3
* Reduces the number of vectors available per cpu by 16, but shouldn't present that big a problem.
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e32d3244 |
| 20-Jul-2016 |
Matthew Dillon <dillon@apollo.backplane.com> |
kernel - Fix Xinvltlb issue, fix ipiq issue, add Xsniff
* The Xinvltlb IPI interrupt enables interrupts in smp_inval_intr(), which allows potentially pending interrupts and other things to happen.
kernel - Fix Xinvltlb issue, fix ipiq issue, add Xsniff
* The Xinvltlb IPI interrupt enables interrupts in smp_inval_intr(), which allows potentially pending interrupts and other things to happen. We must use doreti instead of doreti_iret.
* Fix a reentrancy issue with lwkt_ipiq. Reentrancy can occur when the ipi callback itself needs to issue an IPI, but the target cpu FIFO is full. When this happens, the cpu mask may not be correct so force a scan of all cpus in this situation.
* Add an infinite loop detection test to lwkt_process_ipiq() and jigger another IPI if it persists more than 10 seconds, hopefully recovering the system if as-yet unknown IPI issues persist.
* Add the Xsniff IPI and augment systat -pv to use it. This sniffs the %rip and %rpc on all cpus, allowing us to see where where the kernel spends its time.
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b8a64c88 |
| 12-Jun-2016 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
x86_64/timer: Xtimer is generic enough for per-cpu timer.
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2c64e990 |
| 25-Jan-2016 |
zrj <rimvydas.jasinskas@gmail.com> |
Remove advertising header from sys/
Correct BSD License clause numbering from 1-2-4 to 1-2-3.
Some less clear cases taken as it was done of FreeBSD.
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4f918f4e |
| 23-Feb-2013 |
Sascha Wildner <saw@online.de> |
kernel/x86_64: Remove some bogus #ifndefs.
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1918fc5c |
| 24-Oct-2012 |
Sascha Wildner <saw@online.de> |
kernel: Make SMP support default (and non-optional).
The 'SMP' kernel option gets removed with this commit, so it has to be removed from everybody's configs.
Reviewed-by: sjg Approved-by: many
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451af8d9 |
| 31-Aug-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
intr/x86_64: Define IDT_HWI_VECTORS
This macro defines how many IDT vectors that could be setup as hardware interrupts. Use this macro instead of MAX_HARDINTS and APIC_INTMAPSIZE.
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9a4bd8f3 |
| 03-Jun-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
x86_64: Allow UP kernel to use LAPIC timer and I/O APIC
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ed42d880 |
| 25-May-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
x86_64: Remove no longer used interrupt vector declaration
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57a9c56b |
| 01-Feb-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
pc64: Split out isa_intr.h and move isa/intr_machdep.h to include/
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46d4e165 |
| 01-Jul-2009 |
Jordan Gordeev <jgordeev@dir.bg> |
amd64: Big batch of SMP changes.
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c8fe38ae |
| 29-Aug-2008 |
Matthew Dillon <dillon@dragonflybsd.org> |
AMD64 - Sync AMD64 support from Jordan Gordeev's svn repository and Google SOC project. This work is still continuing but represents substantial progress in the effort.
With this commit the world b
AMD64 - Sync AMD64 support from Jordan Gordeev's svn repository and Google SOC project. This work is still continuing but represents substantial progress in the effort.
With this commit the world builds and installs, the loader is able to boot the kernel, and the kernel is able to initialize, probe devices, and exec the init program. The init program is then able to run until it hits its first fork(). For the purposes of the GSOC the project is being considered a big success!
The code has been adapted from multiple sources, most notably Peter Wemm and other peoples work from FreeBSD, with many modifications to make it work with DragonFly. Also thanks go to Simon Schubert for working on gdb and compiler issues, and to Noah Yan for a good chunk of precursor work in 2007.
While Jordan wishes to be modest on his contribution, frankly we would not have been able to make this much progress without the large number of man-hours Jordan has dedicated to his GSOC project painstakingly gluing code together, tracking down issues, and progressing the boot sequence.
Submitted-by: Jordan Gordeev <jgordeev@dir.bg>
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b6871f55 |
| 23-Sep-2007 |
Yonghong Yan <yanyh@dragonflybsd.org> |
More headers for pc64 platform kernel build/linking
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