igb: Free tx mbufs proactively.

For 82575, which is earliest product of this product line, the RS
bit is set on every packet's last TX desc by default, since in the
'head write back' mode, the conte

igb: Free tx mbufs proactively.

For 82575, which is earliest product of this product line, the RS
bit is set on every packet's last TX desc by default, since in the
'head write back' mode, the content of TDH register does not move,
if the content of the 'header', which is memory based, does not
move. It is still allowed to reduce the density of RS TX descs,
which will be useful for workloads w/o using sendfile.

This is preparation for the dillon's upcoming sendfile patch.

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igb: Use ringmap to do MSI-X cpu assignment and fill redirect table.

ig_hal/igb: Merge Intel igb-2.4.3

- Add one more device
- Fix settings for i354

Tested-by: dillon@ (I354, I217[emx]) me (I350, 82580, 82576, 82575)

igb: Optimize the aggregated TX/RX MSI-X handler a bit

By checking whether there are any TX descs to collect or not, before
holding the TX ring serializer.

This requires that igb_txeof() is only ca

igb: Optimize the aggregated TX/RX MSI-X handler a bit

By checking whether there are any TX descs to collect or not, before
holding the TX ring serializer.

This requires that igb_txeof() is only called in interrupt handler,
thus we remove the igb_txeof() from igb_start(), which does nothing
most of the time. Removal of igb_txeof() from igb_start() also allows
us to simplify the TX ring OACTIVE detection, so several unused water
marks are also removed.

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igb: Partly rework MSI-X support to bypass one serializer

For aggregated TX/RX MSI-X handler, there is no need to use
an independent serializer; using RX ring's serializer just
works (well, this dri

igb: Partly rework MSI-X support to bypass one serializer

For aggregated TX/RX MSI-X handler, there is no need to use
an independent serializer; using RX ring's serializer just
works (well, this driver's MSI-X support was added when we
still lacked of experience about how to serialize aggregated
TX/RX MSI-X handler).

Enable aggregated TX/RX MSI-X handling by default to avoid
extra TX interrupt (though its pretty low for TCP streams).

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igb: Integrate ifmedia flow control support.

Other minor bits:
- Set media to IFM_NONE, if there is no link yet.
- Remove the IFM_1000_LX bits. Cards supported by igb(4) do
not have PHYs supporti

igb: Integrate ifmedia flow control support.

Other minor bits:
- Set media to IFM_NONE, if there is no link yet.
- Remove the IFM_1000_LX bits. Cards supported by igb(4) do
not have PHYs supporting 1000baseLX.
- Remove no longer used dev.igb.X.flow_ctrl sysctl node.
ifconfig igbX [mediaopt|-mediaopt] [rxpause|txpause|forcepause]
should be used instead.

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igb: Support flow control change and default to RX pause

kernel: Use the new auto-created sysctl ctx/tree in various drivers.

Everywhere where we formerly rolled a hw.fooX.* per-device ctx/tree
ourselves.

This commit switches it to dev.foo.X.*

igb: enable MSI-X for i354 on C2550 SoC

igb: Merge Intel igb-2.3.10

- More I210 chips are supported
- Add I354 support
- Fix multicast filtering settings if promisc mode exits

ifnet: Simplify ifnet_serialize_array function interface

It is no longer used to hold RX or TX serializers, so the RX/TX
serializer offset function arguments are not necessary at all.

igb: Fix comment

igb: Remove unused macros

igb: Sync w/ intel igb-2.3.7

- Support I210 and I211
- EEE settings are only applied to copper chips
- Explicitly disable DMA coalesce, if not requested

igb: Rework serializer array setup

igb: Add per-TX ring tx_pkt sysctl node, if IGB_TSS_DEBUG is enabled

igb: Add per-TX ring enable flag.

For TX rings' whose enable flag are not set, which could happen during
polling entering/exiting, its corresponding subqueue will be purged.

igb: Move IGB_FLAG_TSO_IPLEN0 into TX rings

Avoid extra access to softc and leave enough space for TX ring specific
flags.

igb: Define macros for wreg_nsegs, instead of using magic number

igb: Merge per-RX queue rx_wregs into single rx_wreg_nsegs node

There is no use case that it needs to be tuned on per-RX queue base.

igb: Don't assume only one TX queue will be enabled.

Prepare multiple TX queue support.

- Add TX queue count when MSI-X is used
- Add currently used TX queue count

Number of TX queues are still li

igb: Don't assume only one TX queue will be enabled.

Prepare multiple TX queue support.

- Add TX queue count when MSI-X is used
- Add currently used TX queue count

Number of TX queues are still limited to 1 as of this commit.

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igb: Utilize subqueue watchdog functions

Prepare for the multiple TX queue support

if: Multiple TX queue support step 1 of many; introduce ifaltq subqueue

Put the plain queue information, e.g. queue header and tail, serializer,
packet staging scoreboard and ifnet.if_start schedule

if: Multiple TX queue support step 1 of many; introduce ifaltq subqueue

Put the plain queue information, e.g. queue header and tail, serializer,
packet staging scoreboard and ifnet.if_start schedule netmsg etc. into
its own structure (subqueue). ifaltq structure could have multiple of
subqueues based on the count that drivers can specify.

Subqueue's enqueue, dequeue, purging and states updating are protected
by the subqueue's serializer, so for hardwares supporting multiple TX
queues, contention on queuing operation could be greatly reduced.

The subqueue is passed to if_start to let the driver know which hardware
TX queue to work on. Only the related driver's TX queue serializer will
be held, so for hardwares supporting multiple TX queues, contention on
driver's TX queue serializer could be greatly reduced.

Bunch of ifsq_ prefixed functions are added, which is used to perform
various operations on subqueues. Commonly used ifq_ prefixed functions
are still kept mainly for the drivers which do not support multiple TX
queues (well, these functions also ease the netif/ convertion in this
step :).

All of the pseudo network devices under sys/net are converted to use the
new subqueue operation. netproto/802_11 is converted too. igb(4) is
converted to use the new subqueue operation, the rest of the network
drivers are only changed for the if_start interface modification.

For ALTQs which have packet scheduler enabled, only the first subqueue
is used (*).

(*) Whether we should utilize multiple TX queues if ALTQ's packet scheduler
is enabled is quite questionable. Mainly because hardware's multiple TX
queue packet dequeue mechanism could have negative impact on ALTQ's packet
scheduler's decision.

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igb: Save TX interrupt CPUID into tx_ring struct

This will be used to unify the ifnet.if_cpuid and ifnet.if_npoll_cpuid

igb: Improve tiny packets reception performance on low frequency CPU

Update RDT register a little bit often, so the RX descriptors are made
to the NIC chip on a more regularly base:
The RDT register

igb: Improve tiny packets reception performance on low frequency CPU

Update RDT register a little bit often, so the RX descriptors are made
to the NIC chip on a more regularly base:
The RDT register is updated after certain amount of RX descriptors are
added to the hardware RX ring. The default value of the amount of RX
descriptors are 32. This value could be further tuned by per-device
sysctl node hw.igbX.rxY_wreg.

The default value improves tiny packets reception performance w/ 82576
on AMD970@800Mhz under interrupt mode for single stream (1.28Mpps ->
1.48Mpps) and it does not increase CPU usage on AMD970@3500Mhz (CPU
usage stays @36%).

This commit does _not_ seem to affect the tiny packet reception
performance when the workload are evenly distributed to all CPUs.

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