1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (C) 2018 Intel Corporation. All rights reserved. 3 * Copyright (c) 2019, 2021 Mellanox Technologies LTD. All rights reserved. 4 * Copyright (c) 2023, 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 5 */ 6 7 #include "spdk/stdinc.h" 8 #include "spdk_internal/cunit.h" 9 #include "common/lib/test_env.c" 10 #include "common/lib/test_iobuf.c" 11 #include "common/lib/test_rdma.c" 12 #include "nvmf/rdma.c" 13 #include "nvmf/transport.c" 14 15 #define RDMA_UT_UNITS_IN_MAX_IO 16 16 17 struct spdk_nvmf_transport_opts g_rdma_ut_transport_opts = { 18 .max_queue_depth = SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH, 19 .max_qpairs_per_ctrlr = SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR, 20 .in_capsule_data_size = SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE, 21 .max_io_size = (SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE * RDMA_UT_UNITS_IN_MAX_IO), 22 .io_unit_size = SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE, 23 .max_aq_depth = SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH, 24 .num_shared_buffers = SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS, 25 }; 26 27 SPDK_LOG_REGISTER_COMPONENT(nvmf) 28 DEFINE_STUB(spdk_mem_map_set_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 29 uint64_t size, uint64_t translation), 0); 30 DEFINE_STUB(spdk_mem_map_clear_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 31 uint64_t size), 0); 32 DEFINE_STUB(spdk_mem_map_alloc, struct spdk_mem_map *, (uint64_t default_translation, 33 const struct spdk_mem_map_ops *ops, void *cb_ctx), NULL); 34 DEFINE_STUB(spdk_nvmf_qpair_disconnect, int, (struct spdk_nvmf_qpair *qpair), 0); 35 DEFINE_STUB(spdk_nvmf_qpair_get_listen_trid, int, 36 (struct spdk_nvmf_qpair *qpair, struct spdk_nvme_transport_id *trid), 0); 37 DEFINE_STUB_V(spdk_mem_map_free, (struct spdk_mem_map **pmap)); 38 39 DEFINE_STUB_V(spdk_nvmf_request_exec, (struct spdk_nvmf_request *req)); 40 DEFINE_STUB(spdk_nvmf_request_complete, int, (struct spdk_nvmf_request *req), 0); 41 DEFINE_STUB(spdk_nvme_transport_id_compare, int, (const struct spdk_nvme_transport_id *trid1, 42 const struct spdk_nvme_transport_id *trid2), 0); 43 DEFINE_STUB_V(spdk_nvmf_ctrlr_abort_aer, (struct spdk_nvmf_ctrlr *ctrlr)); 44 DEFINE_STUB(spdk_nvmf_request_get_dif_ctx, bool, (struct spdk_nvmf_request *req, 45 struct spdk_dif_ctx *dif_ctx), false); 46 DEFINE_STUB_V(spdk_nvme_trid_populate_transport, (struct spdk_nvme_transport_id *trid, 47 enum spdk_nvme_transport_type trtype)); 48 DEFINE_STUB_V(spdk_nvmf_tgt_new_qpair, (struct spdk_nvmf_tgt *tgt, struct spdk_nvmf_qpair *qpair)); 49 DEFINE_STUB(nvmf_ctrlr_abort_request, int, (struct spdk_nvmf_request *req), 0); 50 DEFINE_STUB(spdk_nvme_transport_id_adrfam_str, const char *, (enum spdk_nvmf_adrfam adrfam), NULL); 51 DEFINE_STUB(ibv_dereg_mr, int, (struct ibv_mr *mr), 0); 52 DEFINE_STUB(ibv_resize_cq, int, (struct ibv_cq *cq, int cqe), 0); 53 DEFINE_STUB(spdk_mempool_lookup, struct spdk_mempool *, (const char *name), NULL); 54 55 /* ibv_reg_mr can be a macro, need to undefine it */ 56 #ifdef ibv_reg_mr 57 #undef ibv_reg_mr 58 #endif 59 60 DEFINE_RETURN_MOCK(ibv_reg_mr, struct ibv_mr *); 61 struct ibv_mr * 62 ibv_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access) 63 { 64 HANDLE_RETURN_MOCK(ibv_reg_mr); 65 if (length > 0) { 66 return &g_rdma_mr; 67 } else { 68 return NULL; 69 } 70 } 71 72 int 73 ibv_query_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr, 74 int attr_mask, struct ibv_qp_init_attr *init_attr) 75 { 76 if (qp == NULL) { 77 return -1; 78 } else { 79 attr->port_num = 80; 80 81 if (qp->state == IBV_QPS_ERR) { 82 attr->qp_state = 10; 83 } else { 84 attr->qp_state = IBV_QPS_INIT; 85 } 86 87 return 0; 88 } 89 } 90 91 const char * 92 spdk_nvme_transport_id_trtype_str(enum spdk_nvme_transport_type trtype) 93 { 94 switch (trtype) { 95 case SPDK_NVME_TRANSPORT_PCIE: 96 return "PCIe"; 97 case SPDK_NVME_TRANSPORT_RDMA: 98 return "RDMA"; 99 case SPDK_NVME_TRANSPORT_FC: 100 return "FC"; 101 default: 102 return NULL; 103 } 104 } 105 106 int 107 spdk_nvme_transport_id_populate_trstring(struct spdk_nvme_transport_id *trid, const char *trstring) 108 { 109 int len, i; 110 111 if (trstring == NULL) { 112 return -EINVAL; 113 } 114 115 len = strnlen(trstring, SPDK_NVMF_TRSTRING_MAX_LEN); 116 if (len == SPDK_NVMF_TRSTRING_MAX_LEN) { 117 return -EINVAL; 118 } 119 120 /* cast official trstring to uppercase version of input. */ 121 for (i = 0; i < len; i++) { 122 trid->trstring[i] = toupper(trstring[i]); 123 } 124 return 0; 125 } 126 127 static void 128 reset_nvmf_rdma_request(struct spdk_nvmf_rdma_request *rdma_req) 129 { 130 int i; 131 132 rdma_req->req.length = 0; 133 rdma_req->req.data_from_pool = false; 134 rdma_req->data.wr.num_sge = 0; 135 rdma_req->data.wr.wr.rdma.remote_addr = 0; 136 rdma_req->data.wr.wr.rdma.rkey = 0; 137 rdma_req->offset = 0; 138 memset(&rdma_req->req.dif, 0, sizeof(rdma_req->req.dif)); 139 140 for (i = 0; i < SPDK_NVMF_MAX_SGL_ENTRIES; i++) { 141 rdma_req->req.iov[i].iov_base = 0; 142 rdma_req->req.iov[i].iov_len = 0; 143 rdma_req->data.wr.sg_list[i].addr = 0; 144 rdma_req->data.wr.sg_list[i].length = 0; 145 rdma_req->data.wr.sg_list[i].lkey = 0; 146 } 147 rdma_req->req.iovcnt = 0; 148 if (rdma_req->req.stripped_data) { 149 free(rdma_req->req.stripped_data); 150 rdma_req->req.stripped_data = NULL; 151 } 152 } 153 154 static void 155 test_spdk_nvmf_rdma_request_parse_sgl(void) 156 { 157 struct spdk_nvmf_rdma_transport rtransport = {}; 158 struct spdk_nvmf_transport_ops ops = {}; 159 struct spdk_nvmf_rdma_device device; 160 struct spdk_nvmf_rdma_request rdma_req = {}; 161 struct spdk_nvmf_rdma_recv recv; 162 struct spdk_nvmf_rdma_poll_group group; 163 struct spdk_nvmf_rdma_qpair rqpair; 164 struct spdk_nvmf_rdma_poller poller; 165 union nvmf_c2h_msg cpl; 166 union nvmf_h2c_msg cmd; 167 struct spdk_nvme_sgl_descriptor *sgl; 168 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 169 struct spdk_nvmf_rdma_request_data data; 170 int rc, i; 171 uint32_t sgl_length; 172 173 data.wr.sg_list = data.sgl; 174 group.group.transport = &rtransport.transport; 175 poller.group = &group; 176 rqpair.poller = &poller; 177 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 178 179 sgl = &cmd.nvme_cmd.dptr.sgl1; 180 rdma_req.recv = &recv; 181 rdma_req.req.cmd = &cmd; 182 rdma_req.req.rsp = &cpl; 183 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 184 rdma_req.req.qpair = &rqpair.qpair; 185 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 186 187 rtransport.transport.opts = g_rdma_ut_transport_opts; 188 rtransport.data_wr_pool = NULL; 189 rtransport.transport.ops = &ops; 190 191 device.attr.device_cap_flags = 0; 192 sgl->keyed.key = 0xEEEE; 193 sgl->address = 0xFFFF; 194 rdma_req.recv->buf = (void *)0xDDDD; 195 196 /* Test 1: sgl type: keyed data block subtype: address */ 197 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 198 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 199 200 /* Part 1: simple I/O, one SGL smaller than the transport io unit size */ 201 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 202 reset_nvmf_rdma_request(&rdma_req); 203 sgl->keyed.length = rtransport.transport.opts.io_unit_size / 2; 204 205 device.map = (void *)0x0; 206 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 207 CU_ASSERT(rc == 0); 208 CU_ASSERT(rdma_req.req.data_from_pool == true); 209 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size / 2); 210 CU_ASSERT((uint64_t)rdma_req.req.iovcnt == 1); 211 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 212 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 213 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 214 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 215 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 216 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 217 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rtransport.transport.opts.io_unit_size / 2); 218 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 219 220 /* Part 2: simple I/O, one SGL larger than the transport io unit size (equal to the max io size) */ 221 reset_nvmf_rdma_request(&rdma_req); 222 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 223 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 224 225 CU_ASSERT(rc == 0); 226 CU_ASSERT(rdma_req.req.data_from_pool == true); 227 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO); 228 CU_ASSERT(rdma_req.data.wr.num_sge == RDMA_UT_UNITS_IN_MAX_IO); 229 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 230 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 231 for (i = 0; i < RDMA_UT_UNITS_IN_MAX_IO; i++) { 232 CU_ASSERT((uint64_t)rdma_req.req.iov[i].iov_base == 0x2000); 233 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 234 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == rtransport.transport.opts.io_unit_size); 235 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 236 } 237 238 /* Part 3: simple I/O one SGL larger than the transport max io size */ 239 reset_nvmf_rdma_request(&rdma_req); 240 sgl->keyed.length = rtransport.transport.opts.max_io_size * 2; 241 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 242 243 CU_ASSERT(rc == -1); 244 245 /* Part 4: Pretend there are no buffer pools */ 246 MOCK_SET(spdk_iobuf_get, NULL); 247 reset_nvmf_rdma_request(&rdma_req); 248 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 249 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 250 251 CU_ASSERT(rc == 0); 252 CU_ASSERT(rdma_req.req.data_from_pool == false); 253 CU_ASSERT(rdma_req.req.iovcnt == 0); 254 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 255 CU_ASSERT(rdma_req.req.iov[0].iov_base == NULL); 256 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0); 257 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 0); 258 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == 0); 259 260 rdma_req.recv->buf = (void *)0xDDDD; 261 /* Test 2: sgl type: keyed data block subtype: offset (in capsule data) */ 262 sgl->generic.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 263 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 264 265 /* Part 1: Normal I/O smaller than in capsule data size no offset */ 266 reset_nvmf_rdma_request(&rdma_req); 267 sgl->address = 0; 268 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 269 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 270 271 CU_ASSERT(rc == 0); 272 CU_ASSERT(rdma_req.req.iovcnt == 1); 273 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0xDDDD); 274 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.in_capsule_data_size); 275 CU_ASSERT(rdma_req.req.data_from_pool == false); 276 277 /* Part 2: I/O offset + length too large */ 278 reset_nvmf_rdma_request(&rdma_req); 279 sgl->address = rtransport.transport.opts.in_capsule_data_size; 280 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 281 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 282 283 CU_ASSERT(rc == -1); 284 285 /* Part 3: I/O too large */ 286 reset_nvmf_rdma_request(&rdma_req); 287 sgl->address = 0; 288 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size * 2; 289 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 290 291 CU_ASSERT(rc == -1); 292 293 /* Test 3: Multi SGL */ 294 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 295 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 296 sgl->address = 0; 297 rdma_req.recv->buf = (void *)&sgl_desc; 298 MOCK_SET(spdk_iobuf_get, &data); 299 MOCK_SET(spdk_mempool_get, &data); 300 301 /* part 1: 2 segments each with 1 wr. */ 302 reset_nvmf_rdma_request(&rdma_req); 303 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 304 for (i = 0; i < 2; i++) { 305 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 306 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 307 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size; 308 sgl_desc[i].address = 0x4000 + i * rtransport.transport.opts.io_unit_size; 309 sgl_desc[i].keyed.key = 0x44; 310 } 311 312 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 313 314 CU_ASSERT(rc == 0); 315 CU_ASSERT(rdma_req.req.data_from_pool == true); 316 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 2); 317 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 318 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 319 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 320 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 321 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 322 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size); 323 CU_ASSERT(data.wr.num_sge == 1); 324 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 325 326 /* part 2: 2 segments, each with 1 wr containing 8 sge_elements */ 327 reset_nvmf_rdma_request(&rdma_req); 328 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 329 for (i = 0; i < 2; i++) { 330 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 331 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 332 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size * 8; 333 sgl_desc[i].address = 0x4000 + i * 8 * rtransport.transport.opts.io_unit_size; 334 sgl_desc[i].keyed.key = 0x44; 335 } 336 337 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 338 339 CU_ASSERT(rc == 0); 340 CU_ASSERT(rdma_req.req.data_from_pool == true); 341 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 342 CU_ASSERT(rdma_req.req.iovcnt == 16); 343 CU_ASSERT(rdma_req.data.wr.num_sge == 8); 344 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 345 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 346 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 347 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 348 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 8); 349 CU_ASSERT(data.wr.num_sge == 8); 350 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 351 352 /* part 3: 2 segments, one very large, one very small */ 353 reset_nvmf_rdma_request(&rdma_req); 354 for (i = 0; i < 2; i++) { 355 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 356 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 357 sgl_desc[i].keyed.key = 0x44; 358 } 359 360 sgl_desc[0].keyed.length = rtransport.transport.opts.io_unit_size * 15 + 361 rtransport.transport.opts.io_unit_size / 2; 362 sgl_desc[0].address = 0x4000; 363 sgl_desc[1].keyed.length = rtransport.transport.opts.io_unit_size / 2; 364 sgl_desc[1].address = 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 365 rtransport.transport.opts.io_unit_size / 2; 366 367 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 368 369 CU_ASSERT(rc == 0); 370 CU_ASSERT(rdma_req.req.data_from_pool == true); 371 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 372 CU_ASSERT(rdma_req.req.iovcnt == 16); 373 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 374 for (i = 0; i < 15; i++) { 375 CU_ASSERT(rdma_req.data.sgl[i].length == rtransport.transport.opts.io_unit_size); 376 } 377 CU_ASSERT(rdma_req.data.sgl[15].length == rtransport.transport.opts.io_unit_size / 2); 378 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 379 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 380 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 381 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 382 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 383 rtransport.transport.opts.io_unit_size / 2); 384 CU_ASSERT(data.sgl[0].length == rtransport.transport.opts.io_unit_size / 2); 385 CU_ASSERT(data.wr.num_sge == 1); 386 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 387 388 /* part 4: 2 SGL descriptors, each length is transport buffer / 2 389 * 1 transport buffers should be allocated */ 390 reset_nvmf_rdma_request(&rdma_req); 391 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 392 sgl_length = rtransport.transport.opts.io_unit_size / 2; 393 for (i = 0; i < 2; i++) { 394 sgl_desc[i].keyed.length = sgl_length; 395 sgl_desc[i].address = 0x4000 + i * sgl_length; 396 } 397 398 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 399 400 CU_ASSERT(rc == 0); 401 CU_ASSERT(rdma_req.req.data_from_pool == true); 402 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size); 403 CU_ASSERT(rdma_req.req.iovcnt == 1); 404 405 CU_ASSERT(rdma_req.data.sgl[0].length == sgl_length); 406 /* We mocked mempool_get to return address of data variable. Mempool is used 407 * to get both additional WRs and data buffers, so data points to &data */ 408 CU_ASSERT(rdma_req.data.sgl[0].addr == (uint64_t)&data); 409 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 410 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 411 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 412 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 413 414 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 415 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + sgl_length); 416 CU_ASSERT(data.sgl[0].length == sgl_length); 417 CU_ASSERT(data.sgl[0].addr == (uint64_t)&data + sgl_length); 418 CU_ASSERT(data.wr.num_sge == 1); 419 420 MOCK_CLEAR(spdk_mempool_get); 421 MOCK_CLEAR(spdk_iobuf_get); 422 423 reset_nvmf_rdma_request(&rdma_req); 424 } 425 426 static struct spdk_nvmf_rdma_recv * 427 create_recv(struct spdk_nvmf_rdma_qpair *rqpair, enum spdk_nvme_nvm_opcode opc) 428 { 429 struct spdk_nvmf_rdma_recv *rdma_recv; 430 union nvmf_h2c_msg *cmd; 431 struct spdk_nvme_sgl_descriptor *sgl; 432 433 rdma_recv = calloc(1, sizeof(*rdma_recv)); 434 rdma_recv->qpair = rqpair; 435 cmd = calloc(1, sizeof(*cmd)); 436 rdma_recv->sgl[0].addr = (uintptr_t)cmd; 437 cmd->nvme_cmd.opc = opc; 438 sgl = &cmd->nvme_cmd.dptr.sgl1; 439 sgl->keyed.key = 0xEEEE; 440 sgl->address = 0xFFFF; 441 sgl->keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 442 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 443 sgl->keyed.length = 1; 444 445 return rdma_recv; 446 } 447 448 static void 449 free_recv(struct spdk_nvmf_rdma_recv *rdma_recv) 450 { 451 free((void *)rdma_recv->sgl[0].addr); 452 free(rdma_recv); 453 } 454 455 static struct spdk_nvmf_rdma_request * 456 create_req(struct spdk_nvmf_rdma_qpair *rqpair, 457 struct spdk_nvmf_rdma_recv *rdma_recv) 458 { 459 struct spdk_nvmf_rdma_request *rdma_req; 460 union nvmf_c2h_msg *cpl; 461 462 rdma_req = calloc(1, sizeof(*rdma_req)); 463 rdma_req->recv = rdma_recv; 464 rdma_req->req.qpair = &rqpair->qpair; 465 rdma_req->state = RDMA_REQUEST_STATE_NEW; 466 rdma_req->data.wr.wr_id = (uintptr_t)&rdma_req->data_wr; 467 rdma_req->data.wr.sg_list = rdma_req->data.sgl; 468 cpl = calloc(1, sizeof(*cpl)); 469 rdma_req->rsp.sgl[0].addr = (uintptr_t)cpl; 470 rdma_req->req.rsp = cpl; 471 472 return rdma_req; 473 } 474 475 static void 476 free_req(struct spdk_nvmf_rdma_request *rdma_req) 477 { 478 free((void *)rdma_req->rsp.sgl[0].addr); 479 free(rdma_req); 480 } 481 482 static void 483 qpair_reset(struct spdk_nvmf_rdma_qpair *rqpair, 484 struct spdk_nvmf_rdma_poller *poller, 485 struct spdk_nvmf_rdma_device *device, 486 struct spdk_nvmf_rdma_resources *resources, 487 struct spdk_nvmf_transport *transport) 488 { 489 memset(rqpair, 0, sizeof(*rqpair)); 490 STAILQ_INIT(&rqpair->pending_rdma_write_queue); 491 STAILQ_INIT(&rqpair->pending_rdma_read_queue); 492 STAILQ_INIT(&rqpair->pending_rdma_send_queue); 493 rqpair->poller = poller; 494 rqpair->device = device; 495 rqpair->resources = resources; 496 rqpair->qpair.qid = 1; 497 rqpair->qpair.state = SPDK_NVMF_QPAIR_ENABLED; 498 rqpair->max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 499 rqpair->max_send_depth = 16; 500 rqpair->max_read_depth = 16; 501 rqpair->qpair.transport = transport; 502 } 503 504 static void 505 poller_reset(struct spdk_nvmf_rdma_poller *poller, 506 struct spdk_nvmf_rdma_poll_group *group) 507 { 508 memset(poller, 0, sizeof(*poller)); 509 STAILQ_INIT(&poller->qpairs_pending_recv); 510 STAILQ_INIT(&poller->qpairs_pending_send); 511 poller->group = group; 512 } 513 514 static void 515 test_spdk_nvmf_rdma_request_process(void) 516 { 517 struct spdk_nvmf_rdma_transport rtransport = {}; 518 struct spdk_nvmf_transport_ops ops = {}; 519 struct spdk_nvmf_rdma_poll_group group = {}; 520 struct spdk_nvmf_rdma_poller poller = {}; 521 struct spdk_nvmf_rdma_device device = {}; 522 struct spdk_nvmf_rdma_resources resources = {}; 523 struct spdk_nvmf_rdma_qpair rqpair = {}; 524 struct spdk_nvmf_rdma_recv *rdma_recv; 525 struct spdk_nvmf_rdma_request *rdma_req; 526 struct spdk_iobuf_channel ch = {}; 527 bool progress; 528 529 group.group.buf_cache = &ch; 530 531 STAILQ_INIT(&group.group.pending_buf_queue); 532 poller_reset(&poller, &group); 533 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 534 535 rtransport.transport.opts = g_rdma_ut_transport_opts; 536 rtransport.data_wr_pool = spdk_mempool_create("test_wr_pool", 128, 537 sizeof(struct spdk_nvmf_rdma_request_data), 538 0, 0); 539 rtransport.transport.ops = &ops; 540 MOCK_CLEAR(spdk_iobuf_get); 541 542 device.attr.device_cap_flags = 0; 543 device.map = (void *)0x0; 544 545 /* Test 1: single SGL READ request */ 546 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_READ); 547 rdma_req = create_req(&rqpair, rdma_recv); 548 rqpair.current_recv_depth = 1; 549 /* NEW -> EXECUTING */ 550 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 551 CU_ASSERT(progress == true); 552 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 553 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_CONTROLLER_TO_HOST); 554 /* EXECUTED -> TRANSFERRING_C2H */ 555 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 556 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 557 CU_ASSERT(progress == true); 558 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_CONTROLLER_TO_HOST); 559 CU_ASSERT(rdma_req->recv == NULL); 560 /* COMPLETED -> FREE */ 561 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 562 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 563 CU_ASSERT(progress == true); 564 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 565 566 free_recv(rdma_recv); 567 free_req(rdma_req); 568 poller_reset(&poller, &group); 569 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 570 571 /* Test 2: single SGL WRITE request */ 572 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 573 rdma_req = create_req(&rqpair, rdma_recv); 574 rqpair.current_recv_depth = 1; 575 /* NEW -> TRANSFERRING_H2C */ 576 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 577 CU_ASSERT(progress == true); 578 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 579 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_HOST_TO_CONTROLLER); 580 STAILQ_INIT(&poller.qpairs_pending_send); 581 /* READY_TO_EXECUTE -> EXECUTING */ 582 rdma_req->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 583 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 584 CU_ASSERT(progress == true); 585 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 586 /* EXECUTED -> COMPLETING */ 587 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 588 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 589 CU_ASSERT(progress == true); 590 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_COMPLETING); 591 CU_ASSERT(rdma_req->recv == NULL); 592 /* COMPLETED -> FREE */ 593 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 594 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 595 CU_ASSERT(progress == true); 596 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 597 598 free_recv(rdma_recv); 599 free_req(rdma_req); 600 poller_reset(&poller, &group); 601 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 602 603 /* Test 3: WRITE+WRITE ibv_send batching */ 604 { 605 struct spdk_nvmf_rdma_recv *recv1, *recv2; 606 struct spdk_nvmf_rdma_request *req1, *req2; 607 recv1 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 608 req1 = create_req(&rqpair, recv1); 609 recv2 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 610 req2 = create_req(&rqpair, recv2); 611 612 /* WRITE 1: NEW -> TRANSFERRING_H2C */ 613 rqpair.current_recv_depth = 1; 614 nvmf_rdma_request_process(&rtransport, req1); 615 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 616 617 /* WRITE 2: NEW -> TRANSFERRING_H2C */ 618 rqpair.current_recv_depth = 2; 619 nvmf_rdma_request_process(&rtransport, req2); 620 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 621 622 STAILQ_INIT(&poller.qpairs_pending_send); 623 624 /* WRITE 1 completes before WRITE 2 has finished RDMA reading */ 625 /* WRITE 1: READY_TO_EXECUTE -> EXECUTING */ 626 req1->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 627 nvmf_rdma_request_process(&rtransport, req1); 628 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_EXECUTING); 629 /* WRITE 1: EXECUTED -> COMPLETING */ 630 req1->state = RDMA_REQUEST_STATE_EXECUTED; 631 nvmf_rdma_request_process(&rtransport, req1); 632 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_COMPLETING); 633 STAILQ_INIT(&poller.qpairs_pending_send); 634 /* WRITE 1: COMPLETED -> FREE */ 635 req1->state = RDMA_REQUEST_STATE_COMPLETED; 636 nvmf_rdma_request_process(&rtransport, req1); 637 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_FREE); 638 639 /* Now WRITE 2 has finished reading and completes */ 640 /* WRITE 2: COMPLETED -> FREE */ 641 /* WRITE 2: READY_TO_EXECUTE -> EXECUTING */ 642 req2->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 643 nvmf_rdma_request_process(&rtransport, req2); 644 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_EXECUTING); 645 /* WRITE 1: EXECUTED -> COMPLETING */ 646 req2->state = RDMA_REQUEST_STATE_EXECUTED; 647 nvmf_rdma_request_process(&rtransport, req2); 648 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_COMPLETING); 649 STAILQ_INIT(&poller.qpairs_pending_send); 650 /* WRITE 1: COMPLETED -> FREE */ 651 req2->state = RDMA_REQUEST_STATE_COMPLETED; 652 nvmf_rdma_request_process(&rtransport, req2); 653 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_FREE); 654 655 free_recv(recv1); 656 free_req(req1); 657 free_recv(recv2); 658 free_req(req2); 659 poller_reset(&poller, &group); 660 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 661 } 662 663 /* Test 4, invalid command, check xfer type */ 664 { 665 struct spdk_nvmf_rdma_recv *rdma_recv_inv; 666 struct spdk_nvmf_rdma_request *rdma_req_inv; 667 /* construct an opcode that specifies BIDIRECTIONAL transfer */ 668 uint8_t opc = 0x10 | SPDK_NVME_DATA_BIDIRECTIONAL; 669 670 rdma_recv_inv = create_recv(&rqpair, opc); 671 rdma_req_inv = create_req(&rqpair, rdma_recv_inv); 672 673 /* NEW -> RDMA_REQUEST_STATE_COMPLETING */ 674 rqpair.current_recv_depth = 1; 675 progress = nvmf_rdma_request_process(&rtransport, rdma_req_inv); 676 CU_ASSERT(progress == true); 677 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_COMPLETING); 678 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC); 679 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_OPCODE); 680 681 /* RDMA_REQUEST_STATE_COMPLETED -> FREE */ 682 rdma_req_inv->state = RDMA_REQUEST_STATE_COMPLETED; 683 nvmf_rdma_request_process(&rtransport, rdma_req_inv); 684 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_FREE); 685 686 free_recv(rdma_recv_inv); 687 free_req(rdma_req_inv); 688 poller_reset(&poller, &group); 689 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 690 } 691 692 /* Test 5: Write response waits in queue */ 693 { 694 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 695 rdma_req = create_req(&rqpair, rdma_recv); 696 rqpair.current_recv_depth = 1; 697 /* NEW -> TRANSFERRING_H2C */ 698 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 699 CU_ASSERT(progress == true); 700 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 701 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_HOST_TO_CONTROLLER); 702 STAILQ_INIT(&poller.qpairs_pending_send); 703 /* READY_TO_EXECUTE -> EXECUTING */ 704 rdma_req->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 705 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 706 CU_ASSERT(progress == true); 707 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 708 /* EXECUTED -> COMPLETING */ 709 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 710 /* Send queue is full */ 711 rqpair.current_send_depth = rqpair.max_send_depth; 712 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 713 CU_ASSERT(progress == true); 714 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_READY_TO_COMPLETE_PENDING); 715 CU_ASSERT(rdma_req == STAILQ_FIRST(&rqpair.pending_rdma_send_queue)); 716 717 /* Send queue is still full */ 718 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 719 CU_ASSERT(progress == false); 720 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_READY_TO_COMPLETE_PENDING); 721 CU_ASSERT(rdma_req == STAILQ_FIRST(&rqpair.pending_rdma_send_queue)); 722 723 /* Slot is available */ 724 rqpair.current_send_depth = rqpair.max_send_depth - 1; 725 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 726 CU_ASSERT(progress == true); 727 CU_ASSERT(STAILQ_EMPTY(&rqpair.pending_rdma_send_queue)); 728 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_COMPLETING); 729 CU_ASSERT(rdma_req->recv == NULL); 730 /* COMPLETED -> FREE */ 731 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 732 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 733 CU_ASSERT(progress == true); 734 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 735 736 free_recv(rdma_recv); 737 free_req(rdma_req); 738 poller_reset(&poller, &group); 739 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 740 741 } 742 743 spdk_mempool_free(rtransport.data_wr_pool); 744 } 745 746 #define TEST_GROUPS_COUNT 5 747 static void 748 test_nvmf_rdma_get_optimal_poll_group(void) 749 { 750 struct spdk_nvmf_rdma_transport rtransport = {}; 751 struct spdk_nvmf_transport *transport = &rtransport.transport; 752 struct spdk_nvmf_rdma_qpair rqpair = {}; 753 struct spdk_nvmf_transport_poll_group *groups[TEST_GROUPS_COUNT]; 754 struct spdk_nvmf_rdma_poll_group *rgroups[TEST_GROUPS_COUNT]; 755 struct spdk_nvmf_transport_poll_group *result; 756 struct spdk_nvmf_poll_group group = {}; 757 uint32_t i; 758 759 rqpair.qpair.transport = transport; 760 TAILQ_INIT(&rtransport.poll_groups); 761 762 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 763 groups[i] = nvmf_rdma_poll_group_create(transport, NULL); 764 CU_ASSERT(groups[i] != NULL); 765 groups[i]->group = &group; 766 rgroups[i] = SPDK_CONTAINEROF(groups[i], struct spdk_nvmf_rdma_poll_group, group); 767 groups[i]->transport = transport; 768 } 769 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[0]); 770 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[0]); 771 772 /* Emulate connection of %TEST_GROUPS_COUNT% initiators - each creates 1 admin and 1 io qp */ 773 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 774 rqpair.qpair.qid = 0; 775 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 776 CU_ASSERT(result == groups[i]); 777 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 778 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i]); 779 780 rqpair.qpair.qid = 1; 781 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 782 CU_ASSERT(result == groups[i]); 783 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 784 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 785 } 786 /* wrap around, admin/io pg point to the first pg 787 Destroy all poll groups except of the last one */ 788 for (i = 0; i < TEST_GROUPS_COUNT - 1; i++) { 789 nvmf_rdma_poll_group_destroy(groups[i]); 790 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[i + 1]); 791 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i + 1]); 792 } 793 794 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 795 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 796 797 /* Check that pointers to the next admin/io poll groups are not changed */ 798 rqpair.qpair.qid = 0; 799 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 800 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 801 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 802 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 803 804 rqpair.qpair.qid = 1; 805 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 806 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 807 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 808 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 809 810 /* Remove the last poll group, check that pointers are NULL */ 811 nvmf_rdma_poll_group_destroy(groups[TEST_GROUPS_COUNT - 1]); 812 CU_ASSERT(rtransport.conn_sched.next_admin_pg == NULL); 813 CU_ASSERT(rtransport.conn_sched.next_io_pg == NULL); 814 815 /* Request optimal poll group, result must be NULL */ 816 rqpair.qpair.qid = 0; 817 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 818 CU_ASSERT(result == NULL); 819 820 rqpair.qpair.qid = 1; 821 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 822 CU_ASSERT(result == NULL); 823 } 824 #undef TEST_GROUPS_COUNT 825 826 static void 827 test_spdk_nvmf_rdma_request_parse_sgl_with_md(void) 828 { 829 struct spdk_nvmf_rdma_transport rtransport = {}; 830 struct spdk_nvmf_transport_ops ops = {}; 831 struct spdk_nvmf_rdma_device device; 832 struct spdk_nvmf_rdma_request rdma_req = {}; 833 struct spdk_nvmf_rdma_recv recv; 834 struct spdk_nvmf_rdma_poll_group group; 835 struct spdk_nvmf_rdma_qpair rqpair; 836 struct spdk_nvmf_rdma_poller poller; 837 union nvmf_c2h_msg cpl; 838 union nvmf_h2c_msg cmd; 839 struct spdk_nvme_sgl_descriptor *sgl; 840 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 841 char data_buffer[8192]; 842 struct spdk_nvmf_rdma_request_data *data = (struct spdk_nvmf_rdma_request_data *)data_buffer; 843 char data2_buffer[8192]; 844 struct spdk_nvmf_rdma_request_data *data2 = (struct spdk_nvmf_rdma_request_data *)data2_buffer; 845 const uint32_t data_bs = 512; 846 const uint32_t md_size = 8; 847 int rc, i; 848 struct spdk_dif_ctx_init_ext_opts dif_opts; 849 850 MOCK_CLEAR(spdk_mempool_get); 851 MOCK_CLEAR(spdk_iobuf_get); 852 853 data->wr.sg_list = data->sgl; 854 group.group.transport = &rtransport.transport; 855 poller.group = &group; 856 rqpair.poller = &poller; 857 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 858 859 sgl = &cmd.nvme_cmd.dptr.sgl1; 860 rdma_req.recv = &recv; 861 rdma_req.req.cmd = &cmd; 862 rdma_req.req.rsp = &cpl; 863 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 864 rdma_req.req.qpair = &rqpair.qpair; 865 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 866 867 rtransport.transport.opts = g_rdma_ut_transport_opts; 868 rtransport.data_wr_pool = NULL; 869 rtransport.transport.ops = &ops; 870 871 device.attr.device_cap_flags = 0; 872 device.map = NULL; 873 sgl->keyed.key = 0xEEEE; 874 sgl->address = 0xFFFF; 875 rdma_req.recv->buf = (void *)0xDDDD; 876 877 /* Test 1: sgl type: keyed data block subtype: address */ 878 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 879 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 880 881 /* Part 1: simple I/O, one SGL smaller than the transport io unit size, block size 512 */ 882 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 883 reset_nvmf_rdma_request(&rdma_req); 884 dif_opts.size = SPDK_SIZEOF(&dif_opts, dif_pi_format); 885 dif_opts.dif_pi_format = SPDK_DIF_PI_FORMAT_16; 886 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 887 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 888 0, 0, 0, 0, 0, &dif_opts); 889 rdma_req.req.dif_enabled = true; 890 rtransport.transport.opts.io_unit_size = data_bs * 8; 891 rdma_req.req.qpair->transport = &rtransport.transport; 892 sgl->keyed.length = data_bs * 4; 893 894 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 895 896 CU_ASSERT(rc == 0); 897 CU_ASSERT(rdma_req.req.data_from_pool == true); 898 CU_ASSERT(rdma_req.req.length == data_bs * 4); 899 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 900 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 901 CU_ASSERT(rdma_req.req.iovcnt == 1); 902 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 903 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 904 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 905 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 906 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 907 908 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 909 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 910 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 911 912 /* Part 2: simple I/O, one SGL equal to io unit size, io_unit_size is not aligned with md_size, 913 block size 512 */ 914 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 915 reset_nvmf_rdma_request(&rdma_req); 916 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 917 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 918 0, 0, 0, 0, 0, &dif_opts); 919 rdma_req.req.dif_enabled = true; 920 rtransport.transport.opts.io_unit_size = data_bs * 4; 921 sgl->keyed.length = data_bs * 4; 922 923 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 924 925 CU_ASSERT(rc == 0); 926 CU_ASSERT(rdma_req.req.data_from_pool == true); 927 CU_ASSERT(rdma_req.req.length == data_bs * 4); 928 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 929 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 930 CU_ASSERT(rdma_req.req.iovcnt == 2); 931 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 932 CU_ASSERT(rdma_req.data.wr.num_sge == 5); 933 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 934 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 935 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 936 937 for (i = 0; i < 3; ++i) { 938 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 939 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 940 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 941 } 942 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 943 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 944 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 945 946 /* 2nd buffer consumed */ 947 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 948 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 949 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 950 951 /* Part 3: simple I/O, one SGL equal io unit size, io_unit_size is equal to block size 512 bytes */ 952 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 953 reset_nvmf_rdma_request(&rdma_req); 954 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 955 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 956 0, 0, 0, 0, 0, &dif_opts); 957 rdma_req.req.dif_enabled = true; 958 rtransport.transport.opts.io_unit_size = data_bs; 959 sgl->keyed.length = data_bs; 960 961 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 962 963 CU_ASSERT(rc == 0); 964 CU_ASSERT(rdma_req.req.data_from_pool == true); 965 CU_ASSERT(rdma_req.req.length == data_bs); 966 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 967 CU_ASSERT(rdma_req.req.dif.elba_length == data_bs + md_size); 968 CU_ASSERT(rdma_req.req.iovcnt == 2); 969 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 970 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 971 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 972 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 973 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 974 975 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 976 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs); 977 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 978 979 CU_ASSERT(rdma_req.req.iovcnt == 2); 980 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)((unsigned long)0x2000)); 981 CU_ASSERT(rdma_req.req.iov[0].iov_len == data_bs); 982 /* 2nd buffer consumed for metadata */ 983 CU_ASSERT(rdma_req.req.iov[1].iov_base == (void *)((unsigned long)0x2000)); 984 CU_ASSERT(rdma_req.req.iov[1].iov_len == md_size); 985 986 /* Part 4: simple I/O, one SGL equal io unit size, io_unit_size is aligned with md_size, 987 block size 512 */ 988 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 989 reset_nvmf_rdma_request(&rdma_req); 990 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 991 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 992 0, 0, 0, 0, 0, &dif_opts); 993 rdma_req.req.dif_enabled = true; 994 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 995 sgl->keyed.length = data_bs * 4; 996 997 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 998 999 CU_ASSERT(rc == 0); 1000 CU_ASSERT(rdma_req.req.data_from_pool == true); 1001 CU_ASSERT(rdma_req.req.length == data_bs * 4); 1002 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1003 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 1004 CU_ASSERT(rdma_req.req.iovcnt == 1); 1005 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1006 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 1007 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1008 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1009 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1010 1011 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 1012 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 1013 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 1014 1015 /* Part 5: simple I/O, one SGL equal to 2x io unit size, io_unit_size is aligned with md_size, 1016 block size 512 */ 1017 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 1018 reset_nvmf_rdma_request(&rdma_req); 1019 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1020 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1021 0, 0, 0, 0, 0, &dif_opts); 1022 rdma_req.req.dif_enabled = true; 1023 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 2; 1024 sgl->keyed.length = data_bs * 4; 1025 1026 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1027 1028 CU_ASSERT(rc == 0); 1029 CU_ASSERT(rdma_req.req.data_from_pool == true); 1030 CU_ASSERT(rdma_req.req.length == data_bs * 4); 1031 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1032 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 1033 CU_ASSERT(rdma_req.req.iovcnt == 2); 1034 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1035 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 1036 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1037 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1038 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1039 1040 for (i = 0; i < 2; ++i) { 1041 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 1042 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs * 2); 1043 } 1044 1045 /* Part 6: simple I/O, one SGL larger than the transport io unit size, io_unit_size is not aligned to md_size, 1046 block size 512 */ 1047 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 1048 reset_nvmf_rdma_request(&rdma_req); 1049 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1050 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1051 0, 0, 0, 0, 0, &dif_opts); 1052 rdma_req.req.dif_enabled = true; 1053 rtransport.transport.opts.io_unit_size = data_bs * 4; 1054 sgl->keyed.length = data_bs * 6; 1055 1056 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1057 1058 CU_ASSERT(rc == 0); 1059 CU_ASSERT(rdma_req.req.data_from_pool == true); 1060 CU_ASSERT(rdma_req.req.length == data_bs * 6); 1061 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1062 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 6); 1063 CU_ASSERT(rdma_req.req.iovcnt == 2); 1064 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1065 CU_ASSERT(rdma_req.data.wr.num_sge == 7); 1066 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1067 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1068 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1069 1070 for (i = 0; i < 3; ++i) { 1071 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 1072 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1073 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1074 } 1075 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 1076 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 1077 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 1078 1079 /* 2nd IO buffer consumed */ 1080 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 1081 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 1082 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 1083 1084 CU_ASSERT(rdma_req.data.wr.sg_list[5].addr == 0x2000 + 24 + md_size); 1085 CU_ASSERT(rdma_req.data.wr.sg_list[5].length == 512); 1086 CU_ASSERT(rdma_req.data.wr.sg_list[5].lkey == RDMA_UT_LKEY); 1087 1088 CU_ASSERT(rdma_req.data.wr.sg_list[6].addr == 0x2000 + 24 + 512 + md_size * 2); 1089 CU_ASSERT(rdma_req.data.wr.sg_list[6].length == 512); 1090 CU_ASSERT(rdma_req.data.wr.sg_list[6].lkey == RDMA_UT_LKEY); 1091 1092 /* Part 7: simple I/O, number of SGL entries exceeds the number of entries 1093 one WR can hold. Additional WR is chained */ 1094 MOCK_SET(spdk_iobuf_get, data2_buffer); 1095 MOCK_SET(spdk_mempool_get, data2_buffer); 1096 reset_nvmf_rdma_request(&rdma_req); 1097 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1098 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1099 0, 0, 0, 0, 0, &dif_opts); 1100 rdma_req.req.dif_enabled = true; 1101 rtransport.transport.opts.io_unit_size = data_bs * 16; 1102 sgl->keyed.length = data_bs * 16; 1103 1104 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1105 1106 CU_ASSERT(rc == 0); 1107 CU_ASSERT(rdma_req.req.data_from_pool == true); 1108 CU_ASSERT(rdma_req.req.length == data_bs * 16); 1109 CU_ASSERT(rdma_req.req.iovcnt == 2); 1110 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1111 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 16); 1112 CU_ASSERT(rdma_req.req.iov[0].iov_base == data2_buffer); 1113 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 1114 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1115 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1116 1117 for (i = 0; i < 15; ++i) { 1118 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1119 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1120 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1121 } 1122 1123 /* 8192 - (512 + 8) * 15 = 392 */ 1124 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1125 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == 392); 1126 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1127 1128 /* additional wr from pool */ 1129 CU_ASSERT(rdma_req.data.wr.next == (void *)&data2->wr); 1130 CU_ASSERT(rdma_req.data.wr.next->num_sge == 1); 1131 CU_ASSERT(rdma_req.data.wr.next->next == &rdma_req.rsp.wr); 1132 /* 2nd IO buffer */ 1133 CU_ASSERT(data2->wr.sg_list[0].addr == (uintptr_t)data2_buffer); 1134 CU_ASSERT(data2->wr.sg_list[0].length == 120); 1135 CU_ASSERT(data2->wr.sg_list[0].lkey == RDMA_UT_LKEY); 1136 1137 /* Part 8: simple I/O, data with metadata do not fit to 1 io_buffer */ 1138 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 1139 reset_nvmf_rdma_request(&rdma_req); 1140 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1141 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1142 0, 0, 0, 0, 0, &dif_opts); 1143 rdma_req.req.dif_enabled = true; 1144 rtransport.transport.opts.io_unit_size = 516; 1145 sgl->keyed.length = data_bs * 2; 1146 1147 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1148 1149 CU_ASSERT(rc == 0); 1150 CU_ASSERT(rdma_req.req.data_from_pool == true); 1151 CU_ASSERT(rdma_req.req.length == data_bs * 2); 1152 CU_ASSERT(rdma_req.req.iovcnt == 3); 1153 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1154 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 2); 1155 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0x2000); 1156 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 1157 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1158 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1159 1160 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 1161 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 512); 1162 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 1163 1164 /* 2nd IO buffer consumed, offset 4 bytes due to part of the metadata 1165 is located at the beginning of that buffer */ 1166 CU_ASSERT(rdma_req.data.wr.sg_list[1].addr == 0x2000 + 4); 1167 CU_ASSERT(rdma_req.data.wr.sg_list[1].length == 512); 1168 CU_ASSERT(rdma_req.data.wr.sg_list[1].lkey == RDMA_UT_LKEY); 1169 1170 /* Test 2: Multi SGL */ 1171 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1172 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 1173 sgl->address = 0; 1174 rdma_req.recv->buf = (void *)&sgl_desc; 1175 MOCK_SET(spdk_mempool_get, data_buffer); 1176 MOCK_SET(spdk_iobuf_get, data_buffer); 1177 1178 /* part 1: 2 segments each with 1 wr. io_unit_size is aligned with data_bs + md_size */ 1179 reset_nvmf_rdma_request(&rdma_req); 1180 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1181 SPDK_DIF_TYPE1, 1182 SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1183 0, 0, 0, 0, 0, &dif_opts); 1184 rdma_req.req.dif_enabled = true; 1185 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 1186 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 1187 1188 for (i = 0; i < 2; i++) { 1189 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 1190 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 1191 sgl_desc[i].keyed.length = data_bs * 4; 1192 sgl_desc[i].address = 0x4000 + i * data_bs * 4; 1193 sgl_desc[i].keyed.key = 0x44; 1194 } 1195 1196 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1197 1198 CU_ASSERT(rc == 0); 1199 CU_ASSERT(rdma_req.req.data_from_pool == true); 1200 CU_ASSERT(rdma_req.req.length == data_bs * 4 * 2); 1201 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1202 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4 * 2); 1203 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 1204 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1205 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs * 4); 1206 1207 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 1208 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 1209 CU_ASSERT(rdma_req.data.wr.next == &data->wr); 1210 CU_ASSERT(data->wr.wr.rdma.rkey == 0x44); 1211 CU_ASSERT(data->wr.wr.rdma.remote_addr == 0x4000 + data_bs * 4); 1212 CU_ASSERT(data->wr.num_sge == 1); 1213 CU_ASSERT(data->wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1214 CU_ASSERT(data->wr.sg_list[0].length == data_bs * 4); 1215 1216 CU_ASSERT(data->wr.next == &rdma_req.rsp.wr); 1217 reset_nvmf_rdma_request(&rdma_req); 1218 } 1219 1220 static void 1221 test_nvmf_rdma_opts_init(void) 1222 { 1223 struct spdk_nvmf_transport_opts opts = {}; 1224 1225 nvmf_rdma_opts_init(&opts); 1226 CU_ASSERT(opts.max_queue_depth == SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH); 1227 CU_ASSERT(opts.max_qpairs_per_ctrlr == SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR); 1228 CU_ASSERT(opts.in_capsule_data_size == SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE); 1229 CU_ASSERT(opts.max_io_size == SPDK_NVMF_RDMA_DEFAULT_MAX_IO_SIZE); 1230 CU_ASSERT(opts.io_unit_size == SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE); 1231 CU_ASSERT(opts.max_aq_depth == SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH); 1232 CU_ASSERT(opts.num_shared_buffers == SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS); 1233 CU_ASSERT(opts.buf_cache_size == SPDK_NVMF_RDMA_DEFAULT_BUFFER_CACHE_SIZE); 1234 CU_ASSERT(opts.dif_insert_or_strip == SPDK_NVMF_RDMA_DIF_INSERT_OR_STRIP); 1235 CU_ASSERT(opts.abort_timeout_sec == SPDK_NVMF_RDMA_DEFAULT_ABORT_TIMEOUT_SEC); 1236 CU_ASSERT(opts.transport_specific == NULL); 1237 } 1238 1239 static void 1240 test_nvmf_rdma_request_free_data(void) 1241 { 1242 struct spdk_nvmf_rdma_request rdma_req = {}; 1243 struct spdk_nvmf_rdma_transport rtransport = {}; 1244 struct spdk_nvmf_rdma_request_data *next_request_data = NULL; 1245 1246 MOCK_CLEAR(spdk_mempool_get); 1247 rtransport.data_wr_pool = spdk_mempool_create("spdk_nvmf_rdma_wr_data", 1248 SPDK_NVMF_MAX_SGL_ENTRIES, 1249 sizeof(struct spdk_nvmf_rdma_request_data), 1250 SPDK_MEMPOOL_DEFAULT_CACHE_SIZE, 1251 SPDK_ENV_NUMA_ID_ANY); 1252 next_request_data = spdk_mempool_get(rtransport.data_wr_pool); 1253 SPDK_CU_ASSERT_FATAL(((struct test_mempool *)rtransport.data_wr_pool)->count == 1254 SPDK_NVMF_MAX_SGL_ENTRIES - 1); 1255 next_request_data->wr.wr_id = (uint64_t)&rdma_req.data_wr; 1256 next_request_data->wr.num_sge = 2; 1257 next_request_data->wr.next = NULL; 1258 rdma_req.data.wr.next = &next_request_data->wr; 1259 rdma_req.data.wr.wr_id = (uint64_t)&rdma_req.data_wr; 1260 rdma_req.data.wr.num_sge = 2; 1261 rdma_req.transfer_wr = &rdma_req.data.wr; 1262 1263 nvmf_rdma_request_free_data(&rdma_req, &rtransport); 1264 /* Check if next_request_data put into memory pool */ 1265 CU_ASSERT(((struct test_mempool *)rtransport.data_wr_pool)->count == SPDK_NVMF_MAX_SGL_ENTRIES); 1266 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 1267 1268 spdk_mempool_free(rtransport.data_wr_pool); 1269 } 1270 1271 static void 1272 test_nvmf_rdma_resources_create(void) 1273 { 1274 static struct spdk_nvmf_rdma_resources *rdma_resource; 1275 struct spdk_nvmf_rdma_resource_opts opts = {}; 1276 struct spdk_nvmf_rdma_qpair qpair = {}; 1277 struct spdk_nvmf_rdma_recv *recv = NULL; 1278 struct spdk_nvmf_rdma_request *req = NULL; 1279 const int DEPTH = 128; 1280 1281 opts.max_queue_depth = DEPTH; 1282 opts.in_capsule_data_size = 4096; 1283 opts.shared = true; 1284 opts.qpair = &qpair; 1285 1286 rdma_resource = nvmf_rdma_resources_create(&opts); 1287 CU_ASSERT(rdma_resource != NULL); 1288 /* Just check first and last entry */ 1289 recv = &rdma_resource->recvs[0]; 1290 req = &rdma_resource->reqs[0]; 1291 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1292 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs)); 1293 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[0]); 1294 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[0])); 1295 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1296 CU_ASSERT(recv->wr.num_sge == 2); 1297 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[0].rdma_wr); 1298 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[0].sgl); 1299 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[0]); 1300 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[0]); 1301 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[0])); 1302 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1303 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1304 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].rsp_wr); 1305 CU_ASSERT(req->rsp.wr.next == NULL); 1306 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1307 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1308 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[0].rsp.sgl); 1309 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1310 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1311 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].data_wr); 1312 CU_ASSERT(req->data.wr.next == NULL); 1313 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1314 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[0].data.sgl); 1315 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1316 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1317 1318 recv = &rdma_resource->recvs[DEPTH - 1]; 1319 req = &rdma_resource->reqs[DEPTH - 1]; 1320 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1321 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs + 1322 (DEPTH - 1) * 4096)); 1323 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[DEPTH - 1]); 1324 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[DEPTH - 1])); 1325 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1326 CU_ASSERT(recv->wr.num_sge == 2); 1327 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[DEPTH - 1].rdma_wr); 1328 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[DEPTH - 1].sgl); 1329 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[DEPTH - 1]); 1330 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[DEPTH - 1]); 1331 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[DEPTH - 1])); 1332 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1333 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1334 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&req->rsp_wr); 1335 CU_ASSERT(req->rsp.wr.next == NULL); 1336 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1337 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1338 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[DEPTH - 1].rsp.sgl); 1339 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1340 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1341 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&req->data_wr); 1342 CU_ASSERT(req->data.wr.next == NULL); 1343 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1344 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[DEPTH - 1].data.sgl); 1345 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1346 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1347 1348 nvmf_rdma_resources_destroy(rdma_resource); 1349 } 1350 1351 static void 1352 test_nvmf_rdma_qpair_compare(void) 1353 { 1354 struct spdk_nvmf_rdma_qpair rqpair1 = {}, rqpair2 = {}; 1355 1356 rqpair1.qp_num = 0; 1357 rqpair2.qp_num = UINT32_MAX; 1358 1359 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair1, &rqpair2) < 0); 1360 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair2, &rqpair1) > 0); 1361 } 1362 1363 static void 1364 test_nvmf_rdma_resize_cq(void) 1365 { 1366 int rc = -1; 1367 int tnum_wr = 0; 1368 int tnum_cqe = 0; 1369 struct spdk_nvmf_rdma_qpair rqpair = {}; 1370 struct spdk_nvmf_rdma_poller rpoller = {}; 1371 struct spdk_nvmf_rdma_device rdevice = {}; 1372 struct ibv_context ircontext = {}; 1373 struct ibv_device idevice = {}; 1374 1375 rdevice.context = &ircontext; 1376 rqpair.poller = &rpoller; 1377 ircontext.device = &idevice; 1378 1379 /* Test1: Current capacity support required size. */ 1380 rpoller.required_num_wr = 10; 1381 rpoller.num_cqe = 20; 1382 rqpair.max_queue_depth = 2; 1383 tnum_wr = rpoller.required_num_wr; 1384 tnum_cqe = rpoller.num_cqe; 1385 1386 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1387 CU_ASSERT(rc == 0); 1388 CU_ASSERT(rpoller.required_num_wr == 10 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1389 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1390 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1391 1392 /* Test2: iWARP doesn't support CQ resize. */ 1393 tnum_wr = rpoller.required_num_wr; 1394 tnum_cqe = rpoller.num_cqe; 1395 idevice.transport_type = IBV_TRANSPORT_IWARP; 1396 1397 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1398 CU_ASSERT(rc == -1); 1399 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1400 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1401 1402 1403 /* Test3: RDMA CQE requirement exceeds device max_cqe limitation. */ 1404 tnum_wr = rpoller.required_num_wr; 1405 tnum_cqe = rpoller.num_cqe; 1406 idevice.transport_type = IBV_TRANSPORT_UNKNOWN; 1407 rdevice.attr.max_cqe = 3; 1408 1409 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1410 CU_ASSERT(rc == -1); 1411 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1412 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1413 1414 /* Test4: RDMA CQ resize failed. */ 1415 tnum_wr = rpoller.required_num_wr; 1416 tnum_cqe = rpoller.num_cqe; 1417 idevice.transport_type = IBV_TRANSPORT_IB; 1418 rdevice.attr.max_cqe = 30; 1419 MOCK_SET(ibv_resize_cq, -1); 1420 1421 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1422 CU_ASSERT(rc == -1); 1423 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1424 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1425 1426 /* Test5: RDMA CQ resize success. rsize = MIN(MAX(num_cqe * 2, required_num_wr), device->attr.max_cqe). */ 1427 tnum_wr = rpoller.required_num_wr; 1428 tnum_cqe = rpoller.num_cqe; 1429 MOCK_SET(ibv_resize_cq, 0); 1430 1431 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1432 CU_ASSERT(rc == 0); 1433 CU_ASSERT(rpoller.num_cqe = 30); 1434 CU_ASSERT(rpoller.required_num_wr == 18 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1435 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1436 CU_ASSERT(rpoller.num_cqe > tnum_cqe); 1437 } 1438 1439 int 1440 main(int argc, char **argv) 1441 { 1442 CU_pSuite suite = NULL; 1443 unsigned int num_failures; 1444 1445 CU_initialize_registry(); 1446 1447 suite = CU_add_suite("nvmf", NULL, NULL); 1448 1449 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl); 1450 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_process); 1451 CU_ADD_TEST(suite, test_nvmf_rdma_get_optimal_poll_group); 1452 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl_with_md); 1453 CU_ADD_TEST(suite, test_nvmf_rdma_opts_init); 1454 CU_ADD_TEST(suite, test_nvmf_rdma_request_free_data); 1455 CU_ADD_TEST(suite, test_nvmf_rdma_resources_create); 1456 CU_ADD_TEST(suite, test_nvmf_rdma_qpair_compare); 1457 CU_ADD_TEST(suite, test_nvmf_rdma_resize_cq); 1458 1459 num_failures = spdk_ut_run_tests(argc, argv, NULL); 1460 CU_cleanup_registry(); 1461 return num_failures; 1462 } 1463