1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (C) 2018 Intel Corporation. All rights reserved. 3 * Copyright (c) 2019, 2021 Mellanox Technologies LTD. All rights reserved. 4 * Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 5 */ 6 7 #include "spdk/stdinc.h" 8 #include "spdk_internal/cunit.h" 9 #include "common/lib/test_env.c" 10 #include "common/lib/test_iobuf.c" 11 #include "common/lib/test_rdma.c" 12 #include "nvmf/rdma.c" 13 #include "nvmf/transport.c" 14 15 #define RDMA_UT_UNITS_IN_MAX_IO 16 16 17 struct spdk_nvmf_transport_opts g_rdma_ut_transport_opts = { 18 .max_queue_depth = SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH, 19 .max_qpairs_per_ctrlr = SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR, 20 .in_capsule_data_size = SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE, 21 .max_io_size = (SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE * RDMA_UT_UNITS_IN_MAX_IO), 22 .io_unit_size = SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE, 23 .max_aq_depth = SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH, 24 .num_shared_buffers = SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS, 25 }; 26 27 SPDK_LOG_REGISTER_COMPONENT(nvmf) 28 DEFINE_STUB(spdk_mem_map_set_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 29 uint64_t size, uint64_t translation), 0); 30 DEFINE_STUB(spdk_mem_map_clear_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 31 uint64_t size), 0); 32 DEFINE_STUB(spdk_mem_map_alloc, struct spdk_mem_map *, (uint64_t default_translation, 33 const struct spdk_mem_map_ops *ops, void *cb_ctx), NULL); 34 DEFINE_STUB(spdk_nvmf_qpair_disconnect, int, (struct spdk_nvmf_qpair *qpair, 35 nvmf_qpair_disconnect_cb cb_fn, void *ctx), 0); 36 DEFINE_STUB(spdk_nvmf_qpair_get_listen_trid, int, 37 (struct spdk_nvmf_qpair *qpair, struct spdk_nvme_transport_id *trid), 0); 38 DEFINE_STUB_V(spdk_mem_map_free, (struct spdk_mem_map **pmap)); 39 40 DEFINE_STUB_V(spdk_nvmf_request_exec, (struct spdk_nvmf_request *req)); 41 DEFINE_STUB(spdk_nvmf_request_complete, int, (struct spdk_nvmf_request *req), 0); 42 DEFINE_STUB(spdk_nvme_transport_id_compare, int, (const struct spdk_nvme_transport_id *trid1, 43 const struct spdk_nvme_transport_id *trid2), 0); 44 DEFINE_STUB_V(spdk_nvmf_ctrlr_abort_aer, (struct spdk_nvmf_ctrlr *ctrlr)); 45 DEFINE_STUB(spdk_nvmf_request_get_dif_ctx, bool, (struct spdk_nvmf_request *req, 46 struct spdk_dif_ctx *dif_ctx), false); 47 DEFINE_STUB_V(spdk_nvme_trid_populate_transport, (struct spdk_nvme_transport_id *trid, 48 enum spdk_nvme_transport_type trtype)); 49 DEFINE_STUB_V(spdk_nvmf_tgt_new_qpair, (struct spdk_nvmf_tgt *tgt, struct spdk_nvmf_qpair *qpair)); 50 DEFINE_STUB(nvmf_ctrlr_abort_request, int, (struct spdk_nvmf_request *req), 0); 51 DEFINE_STUB(spdk_nvme_transport_id_adrfam_str, const char *, (enum spdk_nvmf_adrfam adrfam), NULL); 52 DEFINE_STUB(ibv_dereg_mr, int, (struct ibv_mr *mr), 0); 53 DEFINE_STUB(ibv_resize_cq, int, (struct ibv_cq *cq, int cqe), 0); 54 DEFINE_STUB(spdk_mempool_lookup, struct spdk_mempool *, (const char *name), NULL); 55 56 /* ibv_reg_mr can be a macro, need to undefine it */ 57 #ifdef ibv_reg_mr 58 #undef ibv_reg_mr 59 #endif 60 61 DEFINE_RETURN_MOCK(ibv_reg_mr, struct ibv_mr *); 62 struct ibv_mr * 63 ibv_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access) 64 { 65 HANDLE_RETURN_MOCK(ibv_reg_mr); 66 if (length > 0) { 67 return &g_rdma_mr; 68 } else { 69 return NULL; 70 } 71 } 72 73 int 74 ibv_query_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr, 75 int attr_mask, struct ibv_qp_init_attr *init_attr) 76 { 77 if (qp == NULL) { 78 return -1; 79 } else { 80 attr->port_num = 80; 81 82 if (qp->state == IBV_QPS_ERR) { 83 attr->qp_state = 10; 84 } else { 85 attr->qp_state = IBV_QPS_INIT; 86 } 87 88 return 0; 89 } 90 } 91 92 const char * 93 spdk_nvme_transport_id_trtype_str(enum spdk_nvme_transport_type trtype) 94 { 95 switch (trtype) { 96 case SPDK_NVME_TRANSPORT_PCIE: 97 return "PCIe"; 98 case SPDK_NVME_TRANSPORT_RDMA: 99 return "RDMA"; 100 case SPDK_NVME_TRANSPORT_FC: 101 return "FC"; 102 default: 103 return NULL; 104 } 105 } 106 107 int 108 spdk_nvme_transport_id_populate_trstring(struct spdk_nvme_transport_id *trid, const char *trstring) 109 { 110 int len, i; 111 112 if (trstring == NULL) { 113 return -EINVAL; 114 } 115 116 len = strnlen(trstring, SPDK_NVMF_TRSTRING_MAX_LEN); 117 if (len == SPDK_NVMF_TRSTRING_MAX_LEN) { 118 return -EINVAL; 119 } 120 121 /* cast official trstring to uppercase version of input. */ 122 for (i = 0; i < len; i++) { 123 trid->trstring[i] = toupper(trstring[i]); 124 } 125 return 0; 126 } 127 128 static void 129 reset_nvmf_rdma_request(struct spdk_nvmf_rdma_request *rdma_req) 130 { 131 int i; 132 133 rdma_req->req.length = 0; 134 rdma_req->req.data_from_pool = false; 135 rdma_req->data.wr.num_sge = 0; 136 rdma_req->data.wr.wr.rdma.remote_addr = 0; 137 rdma_req->data.wr.wr.rdma.rkey = 0; 138 rdma_req->offset = 0; 139 memset(&rdma_req->req.dif, 0, sizeof(rdma_req->req.dif)); 140 141 for (i = 0; i < SPDK_NVMF_MAX_SGL_ENTRIES; i++) { 142 rdma_req->req.iov[i].iov_base = 0; 143 rdma_req->req.iov[i].iov_len = 0; 144 rdma_req->data.wr.sg_list[i].addr = 0; 145 rdma_req->data.wr.sg_list[i].length = 0; 146 rdma_req->data.wr.sg_list[i].lkey = 0; 147 } 148 rdma_req->req.iovcnt = 0; 149 if (rdma_req->req.stripped_data) { 150 free(rdma_req->req.stripped_data); 151 rdma_req->req.stripped_data = NULL; 152 } 153 } 154 155 static void 156 test_spdk_nvmf_rdma_request_parse_sgl(void) 157 { 158 struct spdk_nvmf_rdma_transport rtransport; 159 struct spdk_nvmf_rdma_device device; 160 struct spdk_nvmf_rdma_request rdma_req = {}; 161 struct spdk_nvmf_rdma_recv recv; 162 struct spdk_nvmf_rdma_poll_group group; 163 struct spdk_nvmf_rdma_qpair rqpair; 164 struct spdk_nvmf_rdma_poller poller; 165 union nvmf_c2h_msg cpl; 166 union nvmf_h2c_msg cmd; 167 struct spdk_nvme_sgl_descriptor *sgl; 168 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 169 struct spdk_nvmf_rdma_request_data data; 170 int rc, i; 171 uint32_t sgl_length; 172 173 data.wr.sg_list = data.sgl; 174 group.group.transport = &rtransport.transport; 175 poller.group = &group; 176 rqpair.poller = &poller; 177 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 178 179 sgl = &cmd.nvme_cmd.dptr.sgl1; 180 rdma_req.recv = &recv; 181 rdma_req.req.cmd = &cmd; 182 rdma_req.req.rsp = &cpl; 183 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 184 rdma_req.req.qpair = &rqpair.qpair; 185 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 186 187 rtransport.transport.opts = g_rdma_ut_transport_opts; 188 rtransport.data_wr_pool = NULL; 189 190 device.attr.device_cap_flags = 0; 191 sgl->keyed.key = 0xEEEE; 192 sgl->address = 0xFFFF; 193 rdma_req.recv->buf = (void *)0xDDDD; 194 195 /* Test 1: sgl type: keyed data block subtype: address */ 196 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 197 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 198 199 /* Part 1: simple I/O, one SGL smaller than the transport io unit size */ 200 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 201 reset_nvmf_rdma_request(&rdma_req); 202 sgl->keyed.length = rtransport.transport.opts.io_unit_size / 2; 203 204 device.map = (void *)0x0; 205 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 206 CU_ASSERT(rc == 0); 207 CU_ASSERT(rdma_req.req.data_from_pool == true); 208 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size / 2); 209 CU_ASSERT((uint64_t)rdma_req.req.iovcnt == 1); 210 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 211 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 212 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 213 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 214 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 215 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 216 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rtransport.transport.opts.io_unit_size / 2); 217 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 218 219 /* Part 2: simple I/O, one SGL larger than the transport io unit size (equal to the max io size) */ 220 reset_nvmf_rdma_request(&rdma_req); 221 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 222 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 223 224 CU_ASSERT(rc == 0); 225 CU_ASSERT(rdma_req.req.data_from_pool == true); 226 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO); 227 CU_ASSERT(rdma_req.data.wr.num_sge == RDMA_UT_UNITS_IN_MAX_IO); 228 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 229 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 230 for (i = 0; i < RDMA_UT_UNITS_IN_MAX_IO; i++) { 231 CU_ASSERT((uint64_t)rdma_req.req.iov[i].iov_base == 0x2000); 232 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 233 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == rtransport.transport.opts.io_unit_size); 234 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 235 } 236 237 /* Part 3: simple I/O one SGL larger than the transport max io size */ 238 reset_nvmf_rdma_request(&rdma_req); 239 sgl->keyed.length = rtransport.transport.opts.max_io_size * 2; 240 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 241 242 CU_ASSERT(rc == -1); 243 244 /* Part 4: Pretend there are no buffer pools */ 245 MOCK_SET(spdk_iobuf_get, NULL); 246 reset_nvmf_rdma_request(&rdma_req); 247 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 248 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 249 250 CU_ASSERT(rc == 0); 251 CU_ASSERT(rdma_req.req.data_from_pool == false); 252 CU_ASSERT(rdma_req.req.iovcnt == 0); 253 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 254 CU_ASSERT(rdma_req.req.iov[0].iov_base == NULL); 255 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0); 256 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 0); 257 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == 0); 258 259 rdma_req.recv->buf = (void *)0xDDDD; 260 /* Test 2: sgl type: keyed data block subtype: offset (in capsule data) */ 261 sgl->generic.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 262 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 263 264 /* Part 1: Normal I/O smaller than in capsule data size no offset */ 265 reset_nvmf_rdma_request(&rdma_req); 266 sgl->address = 0; 267 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 268 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 269 270 CU_ASSERT(rc == 0); 271 CU_ASSERT(rdma_req.req.iovcnt == 1); 272 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0xDDDD); 273 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.in_capsule_data_size); 274 CU_ASSERT(rdma_req.req.data_from_pool == false); 275 276 /* Part 2: I/O offset + length too large */ 277 reset_nvmf_rdma_request(&rdma_req); 278 sgl->address = rtransport.transport.opts.in_capsule_data_size; 279 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 280 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 281 282 CU_ASSERT(rc == -1); 283 284 /* Part 3: I/O too large */ 285 reset_nvmf_rdma_request(&rdma_req); 286 sgl->address = 0; 287 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size * 2; 288 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 289 290 CU_ASSERT(rc == -1); 291 292 /* Test 3: Multi SGL */ 293 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 294 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 295 sgl->address = 0; 296 rdma_req.recv->buf = (void *)&sgl_desc; 297 MOCK_SET(spdk_iobuf_get, &data); 298 MOCK_SET(spdk_mempool_get, &data); 299 300 /* part 1: 2 segments each with 1 wr. */ 301 reset_nvmf_rdma_request(&rdma_req); 302 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 303 for (i = 0; i < 2; i++) { 304 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 305 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 306 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size; 307 sgl_desc[i].address = 0x4000 + i * rtransport.transport.opts.io_unit_size; 308 sgl_desc[i].keyed.key = 0x44; 309 } 310 311 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 312 313 CU_ASSERT(rc == 0); 314 CU_ASSERT(rdma_req.req.data_from_pool == true); 315 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 2); 316 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 317 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 318 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 319 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 320 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 321 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size); 322 CU_ASSERT(data.wr.num_sge == 1); 323 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 324 325 /* part 2: 2 segments, each with 1 wr containing 8 sge_elements */ 326 reset_nvmf_rdma_request(&rdma_req); 327 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 328 for (i = 0; i < 2; i++) { 329 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 330 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 331 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size * 8; 332 sgl_desc[i].address = 0x4000 + i * 8 * rtransport.transport.opts.io_unit_size; 333 sgl_desc[i].keyed.key = 0x44; 334 } 335 336 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 337 338 CU_ASSERT(rc == 0); 339 CU_ASSERT(rdma_req.req.data_from_pool == true); 340 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 341 CU_ASSERT(rdma_req.req.iovcnt == 16); 342 CU_ASSERT(rdma_req.data.wr.num_sge == 8); 343 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 344 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 345 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 346 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 347 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 8); 348 CU_ASSERT(data.wr.num_sge == 8); 349 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 350 351 /* part 3: 2 segments, one very large, one very small */ 352 reset_nvmf_rdma_request(&rdma_req); 353 for (i = 0; i < 2; i++) { 354 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 355 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 356 sgl_desc[i].keyed.key = 0x44; 357 } 358 359 sgl_desc[0].keyed.length = rtransport.transport.opts.io_unit_size * 15 + 360 rtransport.transport.opts.io_unit_size / 2; 361 sgl_desc[0].address = 0x4000; 362 sgl_desc[1].keyed.length = rtransport.transport.opts.io_unit_size / 2; 363 sgl_desc[1].address = 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 364 rtransport.transport.opts.io_unit_size / 2; 365 366 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 367 368 CU_ASSERT(rc == 0); 369 CU_ASSERT(rdma_req.req.data_from_pool == true); 370 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 371 CU_ASSERT(rdma_req.req.iovcnt == 16); 372 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 373 for (i = 0; i < 15; i++) { 374 CU_ASSERT(rdma_req.data.sgl[i].length == rtransport.transport.opts.io_unit_size); 375 } 376 CU_ASSERT(rdma_req.data.sgl[15].length == rtransport.transport.opts.io_unit_size / 2); 377 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 378 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 379 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 380 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 381 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 382 rtransport.transport.opts.io_unit_size / 2); 383 CU_ASSERT(data.sgl[0].length == rtransport.transport.opts.io_unit_size / 2); 384 CU_ASSERT(data.wr.num_sge == 1); 385 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 386 387 /* part 4: 2 SGL descriptors, each length is transport buffer / 2 388 * 1 transport buffers should be allocated */ 389 reset_nvmf_rdma_request(&rdma_req); 390 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 391 sgl_length = rtransport.transport.opts.io_unit_size / 2; 392 for (i = 0; i < 2; i++) { 393 sgl_desc[i].keyed.length = sgl_length; 394 sgl_desc[i].address = 0x4000 + i * sgl_length; 395 } 396 397 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 398 399 CU_ASSERT(rc == 0); 400 CU_ASSERT(rdma_req.req.data_from_pool == true); 401 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size); 402 CU_ASSERT(rdma_req.req.iovcnt == 1); 403 404 CU_ASSERT(rdma_req.data.sgl[0].length == sgl_length); 405 /* We mocked mempool_get to return address of data variable. Mempool is used 406 * to get both additional WRs and data buffers, so data points to &data */ 407 CU_ASSERT(rdma_req.data.sgl[0].addr == (uint64_t)&data); 408 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 409 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 410 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 411 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 412 413 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 414 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + sgl_length); 415 CU_ASSERT(data.sgl[0].length == sgl_length); 416 CU_ASSERT(data.sgl[0].addr == (uint64_t)&data + sgl_length); 417 CU_ASSERT(data.wr.num_sge == 1); 418 419 MOCK_CLEAR(spdk_mempool_get); 420 MOCK_CLEAR(spdk_iobuf_get); 421 422 reset_nvmf_rdma_request(&rdma_req); 423 } 424 425 static struct spdk_nvmf_rdma_recv * 426 create_recv(struct spdk_nvmf_rdma_qpair *rqpair, enum spdk_nvme_nvm_opcode opc) 427 { 428 struct spdk_nvmf_rdma_recv *rdma_recv; 429 union nvmf_h2c_msg *cmd; 430 struct spdk_nvme_sgl_descriptor *sgl; 431 432 rdma_recv = calloc(1, sizeof(*rdma_recv)); 433 rdma_recv->qpair = rqpair; 434 cmd = calloc(1, sizeof(*cmd)); 435 rdma_recv->sgl[0].addr = (uintptr_t)cmd; 436 cmd->nvme_cmd.opc = opc; 437 sgl = &cmd->nvme_cmd.dptr.sgl1; 438 sgl->keyed.key = 0xEEEE; 439 sgl->address = 0xFFFF; 440 sgl->keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 441 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 442 sgl->keyed.length = 1; 443 444 return rdma_recv; 445 } 446 447 static void 448 free_recv(struct spdk_nvmf_rdma_recv *rdma_recv) 449 { 450 free((void *)rdma_recv->sgl[0].addr); 451 free(rdma_recv); 452 } 453 454 static struct spdk_nvmf_rdma_request * 455 create_req(struct spdk_nvmf_rdma_qpair *rqpair, 456 struct spdk_nvmf_rdma_recv *rdma_recv) 457 { 458 struct spdk_nvmf_rdma_request *rdma_req; 459 union nvmf_c2h_msg *cpl; 460 461 rdma_req = calloc(1, sizeof(*rdma_req)); 462 rdma_req->recv = rdma_recv; 463 rdma_req->req.qpair = &rqpair->qpair; 464 rdma_req->state = RDMA_REQUEST_STATE_NEW; 465 rdma_req->data.wr.wr_id = (uintptr_t)&rdma_req->data_wr; 466 rdma_req->data.wr.sg_list = rdma_req->data.sgl; 467 cpl = calloc(1, sizeof(*cpl)); 468 rdma_req->rsp.sgl[0].addr = (uintptr_t)cpl; 469 rdma_req->req.rsp = cpl; 470 471 return rdma_req; 472 } 473 474 static void 475 free_req(struct spdk_nvmf_rdma_request *rdma_req) 476 { 477 free((void *)rdma_req->rsp.sgl[0].addr); 478 free(rdma_req); 479 } 480 481 static void 482 qpair_reset(struct spdk_nvmf_rdma_qpair *rqpair, 483 struct spdk_nvmf_rdma_poller *poller, 484 struct spdk_nvmf_rdma_device *device, 485 struct spdk_nvmf_rdma_resources *resources, 486 struct spdk_nvmf_transport *transport) 487 { 488 memset(rqpair, 0, sizeof(*rqpair)); 489 STAILQ_INIT(&rqpair->pending_rdma_write_queue); 490 STAILQ_INIT(&rqpair->pending_rdma_read_queue); 491 rqpair->poller = poller; 492 rqpair->device = device; 493 rqpair->resources = resources; 494 rqpair->qpair.qid = 1; 495 rqpair->ibv_state = IBV_QPS_RTS; 496 rqpair->qpair.state = SPDK_NVMF_QPAIR_ACTIVE; 497 rqpair->max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 498 rqpair->max_send_depth = 16; 499 rqpair->max_read_depth = 16; 500 rqpair->qpair.transport = transport; 501 } 502 503 static void 504 poller_reset(struct spdk_nvmf_rdma_poller *poller, 505 struct spdk_nvmf_rdma_poll_group *group) 506 { 507 memset(poller, 0, sizeof(*poller)); 508 STAILQ_INIT(&poller->qpairs_pending_recv); 509 STAILQ_INIT(&poller->qpairs_pending_send); 510 poller->group = group; 511 } 512 513 static void 514 test_spdk_nvmf_rdma_request_process(void) 515 { 516 struct spdk_nvmf_rdma_transport rtransport = {}; 517 struct spdk_nvmf_rdma_poll_group group = {}; 518 struct spdk_nvmf_rdma_poller poller = {}; 519 struct spdk_nvmf_rdma_device device = {}; 520 struct spdk_nvmf_rdma_resources resources = {}; 521 struct spdk_nvmf_rdma_qpair rqpair = {}; 522 struct spdk_nvmf_rdma_recv *rdma_recv; 523 struct spdk_nvmf_rdma_request *rdma_req; 524 bool progress; 525 526 STAILQ_INIT(&group.group.pending_buf_queue); 527 poller_reset(&poller, &group); 528 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 529 530 rtransport.transport.opts = g_rdma_ut_transport_opts; 531 rtransport.data_wr_pool = spdk_mempool_create("test_wr_pool", 128, 532 sizeof(struct spdk_nvmf_rdma_request_data), 533 0, 0); 534 MOCK_CLEAR(spdk_iobuf_get); 535 536 device.attr.device_cap_flags = 0; 537 device.map = (void *)0x0; 538 539 /* Test 1: single SGL READ request */ 540 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_READ); 541 rdma_req = create_req(&rqpair, rdma_recv); 542 rqpair.current_recv_depth = 1; 543 /* NEW -> EXECUTING */ 544 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 545 CU_ASSERT(progress == true); 546 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 547 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_CONTROLLER_TO_HOST); 548 /* EXECUTED -> TRANSFERRING_C2H */ 549 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 550 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 551 CU_ASSERT(progress == true); 552 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_CONTROLLER_TO_HOST); 553 CU_ASSERT(rdma_req->recv == NULL); 554 /* COMPLETED -> FREE */ 555 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 556 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 557 CU_ASSERT(progress == true); 558 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 559 560 free_recv(rdma_recv); 561 free_req(rdma_req); 562 poller_reset(&poller, &group); 563 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 564 565 /* Test 2: single SGL WRITE request */ 566 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 567 rdma_req = create_req(&rqpair, rdma_recv); 568 rqpair.current_recv_depth = 1; 569 /* NEW -> TRANSFERRING_H2C */ 570 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 571 CU_ASSERT(progress == true); 572 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 573 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_HOST_TO_CONTROLLER); 574 STAILQ_INIT(&poller.qpairs_pending_send); 575 /* READY_TO_EXECUTE -> EXECUTING */ 576 rdma_req->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 577 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 578 CU_ASSERT(progress == true); 579 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 580 /* EXECUTED -> COMPLETING */ 581 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 582 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 583 CU_ASSERT(progress == true); 584 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_COMPLETING); 585 CU_ASSERT(rdma_req->recv == NULL); 586 /* COMPLETED -> FREE */ 587 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 588 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 589 CU_ASSERT(progress == true); 590 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 591 592 free_recv(rdma_recv); 593 free_req(rdma_req); 594 poller_reset(&poller, &group); 595 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 596 597 /* Test 3: WRITE+WRITE ibv_send batching */ 598 { 599 struct spdk_nvmf_rdma_recv *recv1, *recv2; 600 struct spdk_nvmf_rdma_request *req1, *req2; 601 recv1 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 602 req1 = create_req(&rqpair, recv1); 603 recv2 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 604 req2 = create_req(&rqpair, recv2); 605 606 /* WRITE 1: NEW -> TRANSFERRING_H2C */ 607 rqpair.current_recv_depth = 1; 608 nvmf_rdma_request_process(&rtransport, req1); 609 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 610 611 /* WRITE 2: NEW -> TRANSFERRING_H2C */ 612 rqpair.current_recv_depth = 2; 613 nvmf_rdma_request_process(&rtransport, req2); 614 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 615 616 STAILQ_INIT(&poller.qpairs_pending_send); 617 618 /* WRITE 1 completes before WRITE 2 has finished RDMA reading */ 619 /* WRITE 1: READY_TO_EXECUTE -> EXECUTING */ 620 req1->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 621 nvmf_rdma_request_process(&rtransport, req1); 622 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_EXECUTING); 623 /* WRITE 1: EXECUTED -> COMPLETING */ 624 req1->state = RDMA_REQUEST_STATE_EXECUTED; 625 nvmf_rdma_request_process(&rtransport, req1); 626 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_COMPLETING); 627 STAILQ_INIT(&poller.qpairs_pending_send); 628 /* WRITE 1: COMPLETED -> FREE */ 629 req1->state = RDMA_REQUEST_STATE_COMPLETED; 630 nvmf_rdma_request_process(&rtransport, req1); 631 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_FREE); 632 633 /* Now WRITE 2 has finished reading and completes */ 634 /* WRITE 2: COMPLETED -> FREE */ 635 /* WRITE 2: READY_TO_EXECUTE -> EXECUTING */ 636 req2->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 637 nvmf_rdma_request_process(&rtransport, req2); 638 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_EXECUTING); 639 /* WRITE 1: EXECUTED -> COMPLETING */ 640 req2->state = RDMA_REQUEST_STATE_EXECUTED; 641 nvmf_rdma_request_process(&rtransport, req2); 642 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_COMPLETING); 643 STAILQ_INIT(&poller.qpairs_pending_send); 644 /* WRITE 1: COMPLETED -> FREE */ 645 req2->state = RDMA_REQUEST_STATE_COMPLETED; 646 nvmf_rdma_request_process(&rtransport, req2); 647 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_FREE); 648 649 free_recv(recv1); 650 free_req(req1); 651 free_recv(recv2); 652 free_req(req2); 653 poller_reset(&poller, &group); 654 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 655 } 656 657 /* Test 4, invalid command, check xfer type */ 658 { 659 struct spdk_nvmf_rdma_recv *rdma_recv_inv; 660 struct spdk_nvmf_rdma_request *rdma_req_inv; 661 /* construct an opcode that specifies BIDIRECTIONAL transfer */ 662 uint8_t opc = 0x10 | SPDK_NVME_DATA_BIDIRECTIONAL; 663 664 rdma_recv_inv = create_recv(&rqpair, opc); 665 rdma_req_inv = create_req(&rqpair, rdma_recv_inv); 666 667 /* NEW -> RDMA_REQUEST_STATE_COMPLETING */ 668 rqpair.current_recv_depth = 1; 669 progress = nvmf_rdma_request_process(&rtransport, rdma_req_inv); 670 CU_ASSERT(progress == true); 671 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_COMPLETING); 672 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC); 673 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_OPCODE); 674 675 /* RDMA_REQUEST_STATE_COMPLETED -> FREE */ 676 rdma_req_inv->state = RDMA_REQUEST_STATE_COMPLETED; 677 nvmf_rdma_request_process(&rtransport, rdma_req_inv); 678 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_FREE); 679 680 free_recv(rdma_recv_inv); 681 free_req(rdma_req_inv); 682 poller_reset(&poller, &group); 683 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 684 } 685 686 spdk_mempool_free(rtransport.data_wr_pool); 687 } 688 689 #define TEST_GROUPS_COUNT 5 690 static void 691 test_nvmf_rdma_get_optimal_poll_group(void) 692 { 693 struct spdk_nvmf_rdma_transport rtransport = {}; 694 struct spdk_nvmf_transport *transport = &rtransport.transport; 695 struct spdk_nvmf_rdma_qpair rqpair = {}; 696 struct spdk_nvmf_transport_poll_group *groups[TEST_GROUPS_COUNT]; 697 struct spdk_nvmf_rdma_poll_group *rgroups[TEST_GROUPS_COUNT]; 698 struct spdk_nvmf_transport_poll_group *result; 699 struct spdk_nvmf_poll_group group = {}; 700 uint32_t i; 701 702 rqpair.qpair.transport = transport; 703 TAILQ_INIT(&rtransport.poll_groups); 704 705 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 706 groups[i] = nvmf_rdma_poll_group_create(transport, NULL); 707 CU_ASSERT(groups[i] != NULL); 708 groups[i]->group = &group; 709 rgroups[i] = SPDK_CONTAINEROF(groups[i], struct spdk_nvmf_rdma_poll_group, group); 710 groups[i]->transport = transport; 711 } 712 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[0]); 713 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[0]); 714 715 /* Emulate connection of %TEST_GROUPS_COUNT% initiators - each creates 1 admin and 1 io qp */ 716 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 717 rqpair.qpair.qid = 0; 718 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 719 CU_ASSERT(result == groups[i]); 720 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 721 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i]); 722 723 rqpair.qpair.qid = 1; 724 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 725 CU_ASSERT(result == groups[i]); 726 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 727 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 728 } 729 /* wrap around, admin/io pg point to the first pg 730 Destroy all poll groups except of the last one */ 731 for (i = 0; i < TEST_GROUPS_COUNT - 1; i++) { 732 nvmf_rdma_poll_group_destroy(groups[i]); 733 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[i + 1]); 734 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i + 1]); 735 } 736 737 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 738 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 739 740 /* Check that pointers to the next admin/io poll groups are not changed */ 741 rqpair.qpair.qid = 0; 742 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 743 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 744 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 745 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 746 747 rqpair.qpair.qid = 1; 748 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 749 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 750 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 751 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 752 753 /* Remove the last poll group, check that pointers are NULL */ 754 nvmf_rdma_poll_group_destroy(groups[TEST_GROUPS_COUNT - 1]); 755 CU_ASSERT(rtransport.conn_sched.next_admin_pg == NULL); 756 CU_ASSERT(rtransport.conn_sched.next_io_pg == NULL); 757 758 /* Request optimal poll group, result must be NULL */ 759 rqpair.qpair.qid = 0; 760 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 761 CU_ASSERT(result == NULL); 762 763 rqpair.qpair.qid = 1; 764 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 765 CU_ASSERT(result == NULL); 766 } 767 #undef TEST_GROUPS_COUNT 768 769 static void 770 test_spdk_nvmf_rdma_request_parse_sgl_with_md(void) 771 { 772 struct spdk_nvmf_rdma_transport rtransport; 773 struct spdk_nvmf_rdma_device device; 774 struct spdk_nvmf_rdma_request rdma_req = {}; 775 struct spdk_nvmf_rdma_recv recv; 776 struct spdk_nvmf_rdma_poll_group group; 777 struct spdk_nvmf_rdma_qpair rqpair; 778 struct spdk_nvmf_rdma_poller poller; 779 union nvmf_c2h_msg cpl; 780 union nvmf_h2c_msg cmd; 781 struct spdk_nvme_sgl_descriptor *sgl; 782 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 783 char data_buffer[8192]; 784 struct spdk_nvmf_rdma_request_data *data = (struct spdk_nvmf_rdma_request_data *)data_buffer; 785 char data2_buffer[8192]; 786 struct spdk_nvmf_rdma_request_data *data2 = (struct spdk_nvmf_rdma_request_data *)data2_buffer; 787 const uint32_t data_bs = 512; 788 const uint32_t md_size = 8; 789 int rc, i; 790 struct spdk_dif_ctx_init_ext_opts dif_opts; 791 792 MOCK_CLEAR(spdk_mempool_get); 793 MOCK_CLEAR(spdk_iobuf_get); 794 795 data->wr.sg_list = data->sgl; 796 group.group.transport = &rtransport.transport; 797 poller.group = &group; 798 rqpair.poller = &poller; 799 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 800 801 sgl = &cmd.nvme_cmd.dptr.sgl1; 802 rdma_req.recv = &recv; 803 rdma_req.req.cmd = &cmd; 804 rdma_req.req.rsp = &cpl; 805 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 806 rdma_req.req.qpair = &rqpair.qpair; 807 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 808 809 rtransport.transport.opts = g_rdma_ut_transport_opts; 810 rtransport.data_wr_pool = NULL; 811 812 device.attr.device_cap_flags = 0; 813 device.map = NULL; 814 sgl->keyed.key = 0xEEEE; 815 sgl->address = 0xFFFF; 816 rdma_req.recv->buf = (void *)0xDDDD; 817 818 /* Test 1: sgl type: keyed data block subtype: address */ 819 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 820 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 821 822 /* Part 1: simple I/O, one SGL smaller than the transport io unit size, block size 512 */ 823 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 824 reset_nvmf_rdma_request(&rdma_req); 825 dif_opts.size = SPDK_SIZEOF(&dif_opts, dif_pi_format); 826 dif_opts.dif_pi_format = SPDK_DIF_PI_FORMAT_16; 827 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 828 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 829 0, 0, 0, 0, 0, &dif_opts); 830 rdma_req.req.dif_enabled = true; 831 rtransport.transport.opts.io_unit_size = data_bs * 8; 832 rdma_req.req.qpair->transport = &rtransport.transport; 833 sgl->keyed.length = data_bs * 4; 834 835 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 836 837 CU_ASSERT(rc == 0); 838 CU_ASSERT(rdma_req.req.data_from_pool == true); 839 CU_ASSERT(rdma_req.req.length == data_bs * 4); 840 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 841 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 842 CU_ASSERT(rdma_req.req.iovcnt == 1); 843 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 844 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 845 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 846 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 847 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 848 849 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 850 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 851 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 852 853 /* Part 2: simple I/O, one SGL equal to io unit size, io_unit_size is not aligned with md_size, 854 block size 512 */ 855 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 856 reset_nvmf_rdma_request(&rdma_req); 857 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 858 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 859 0, 0, 0, 0, 0, &dif_opts); 860 rdma_req.req.dif_enabled = true; 861 rtransport.transport.opts.io_unit_size = data_bs * 4; 862 sgl->keyed.length = data_bs * 4; 863 864 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 865 866 CU_ASSERT(rc == 0); 867 CU_ASSERT(rdma_req.req.data_from_pool == true); 868 CU_ASSERT(rdma_req.req.length == data_bs * 4); 869 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 870 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 871 CU_ASSERT(rdma_req.req.iovcnt == 2); 872 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 873 CU_ASSERT(rdma_req.data.wr.num_sge == 5); 874 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 875 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 876 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 877 878 for (i = 0; i < 3; ++i) { 879 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 880 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 881 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 882 } 883 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 884 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 885 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 886 887 /* 2nd buffer consumed */ 888 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 889 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 890 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 891 892 /* Part 3: simple I/O, one SGL equal io unit size, io_unit_size is equal to block size 512 bytes */ 893 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 894 reset_nvmf_rdma_request(&rdma_req); 895 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 896 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 897 0, 0, 0, 0, 0, &dif_opts); 898 rdma_req.req.dif_enabled = true; 899 rtransport.transport.opts.io_unit_size = data_bs; 900 sgl->keyed.length = data_bs; 901 902 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 903 904 CU_ASSERT(rc == 0); 905 CU_ASSERT(rdma_req.req.data_from_pool == true); 906 CU_ASSERT(rdma_req.req.length == data_bs); 907 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 908 CU_ASSERT(rdma_req.req.dif.elba_length == data_bs + md_size); 909 CU_ASSERT(rdma_req.req.iovcnt == 2); 910 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 911 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 912 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 913 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 914 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 915 916 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 917 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs); 918 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 919 920 CU_ASSERT(rdma_req.req.iovcnt == 2); 921 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)((unsigned long)0x2000)); 922 CU_ASSERT(rdma_req.req.iov[0].iov_len == data_bs); 923 /* 2nd buffer consumed for metadata */ 924 CU_ASSERT(rdma_req.req.iov[1].iov_base == (void *)((unsigned long)0x2000)); 925 CU_ASSERT(rdma_req.req.iov[1].iov_len == md_size); 926 927 /* Part 4: simple I/O, one SGL equal io unit size, io_unit_size is aligned with md_size, 928 block size 512 */ 929 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 930 reset_nvmf_rdma_request(&rdma_req); 931 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 932 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 933 0, 0, 0, 0, 0, &dif_opts); 934 rdma_req.req.dif_enabled = true; 935 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 936 sgl->keyed.length = data_bs * 4; 937 938 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 939 940 CU_ASSERT(rc == 0); 941 CU_ASSERT(rdma_req.req.data_from_pool == true); 942 CU_ASSERT(rdma_req.req.length == data_bs * 4); 943 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 944 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 945 CU_ASSERT(rdma_req.req.iovcnt == 1); 946 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 947 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 948 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 949 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 950 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 951 952 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 953 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 954 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 955 956 /* Part 5: simple I/O, one SGL equal to 2x io unit size, io_unit_size is aligned with md_size, 957 block size 512 */ 958 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 959 reset_nvmf_rdma_request(&rdma_req); 960 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 961 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 962 0, 0, 0, 0, 0, &dif_opts); 963 rdma_req.req.dif_enabled = true; 964 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 2; 965 sgl->keyed.length = data_bs * 4; 966 967 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 968 969 CU_ASSERT(rc == 0); 970 CU_ASSERT(rdma_req.req.data_from_pool == true); 971 CU_ASSERT(rdma_req.req.length == data_bs * 4); 972 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 973 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 974 CU_ASSERT(rdma_req.req.iovcnt == 2); 975 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 976 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 977 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 978 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 979 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 980 981 for (i = 0; i < 2; ++i) { 982 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 983 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs * 2); 984 } 985 986 /* Part 6: simple I/O, one SGL larger than the transport io unit size, io_unit_size is not aligned to md_size, 987 block size 512 */ 988 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 989 reset_nvmf_rdma_request(&rdma_req); 990 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 991 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 992 0, 0, 0, 0, 0, &dif_opts); 993 rdma_req.req.dif_enabled = true; 994 rtransport.transport.opts.io_unit_size = data_bs * 4; 995 sgl->keyed.length = data_bs * 6; 996 997 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 998 999 CU_ASSERT(rc == 0); 1000 CU_ASSERT(rdma_req.req.data_from_pool == true); 1001 CU_ASSERT(rdma_req.req.length == data_bs * 6); 1002 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1003 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 6); 1004 CU_ASSERT(rdma_req.req.iovcnt == 2); 1005 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1006 CU_ASSERT(rdma_req.data.wr.num_sge == 7); 1007 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1008 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1009 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1010 1011 for (i = 0; i < 3; ++i) { 1012 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 1013 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1014 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1015 } 1016 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 1017 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 1018 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 1019 1020 /* 2nd IO buffer consumed */ 1021 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 1022 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 1023 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 1024 1025 CU_ASSERT(rdma_req.data.wr.sg_list[5].addr == 0x2000 + 24 + md_size); 1026 CU_ASSERT(rdma_req.data.wr.sg_list[5].length == 512); 1027 CU_ASSERT(rdma_req.data.wr.sg_list[5].lkey == RDMA_UT_LKEY); 1028 1029 CU_ASSERT(rdma_req.data.wr.sg_list[6].addr == 0x2000 + 24 + 512 + md_size * 2); 1030 CU_ASSERT(rdma_req.data.wr.sg_list[6].length == 512); 1031 CU_ASSERT(rdma_req.data.wr.sg_list[6].lkey == RDMA_UT_LKEY); 1032 1033 /* Part 7: simple I/O, number of SGL entries exceeds the number of entries 1034 one WR can hold. Additional WR is chained */ 1035 MOCK_SET(spdk_iobuf_get, data2_buffer); 1036 MOCK_SET(spdk_mempool_get, data2_buffer); 1037 reset_nvmf_rdma_request(&rdma_req); 1038 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1039 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1040 0, 0, 0, 0, 0, &dif_opts); 1041 rdma_req.req.dif_enabled = true; 1042 rtransport.transport.opts.io_unit_size = data_bs * 16; 1043 sgl->keyed.length = data_bs * 16; 1044 1045 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1046 1047 CU_ASSERT(rc == 0); 1048 CU_ASSERT(rdma_req.req.data_from_pool == true); 1049 CU_ASSERT(rdma_req.req.length == data_bs * 16); 1050 CU_ASSERT(rdma_req.req.iovcnt == 2); 1051 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1052 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 16); 1053 CU_ASSERT(rdma_req.req.iov[0].iov_base == data2_buffer); 1054 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 1055 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1056 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1057 1058 for (i = 0; i < 15; ++i) { 1059 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1060 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1061 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1062 } 1063 1064 /* 8192 - (512 + 8) * 15 = 392 */ 1065 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1066 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == 392); 1067 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1068 1069 /* additional wr from pool */ 1070 CU_ASSERT(rdma_req.data.wr.next == (void *)&data2->wr); 1071 CU_ASSERT(rdma_req.data.wr.next->num_sge == 1); 1072 CU_ASSERT(rdma_req.data.wr.next->next == &rdma_req.rsp.wr); 1073 /* 2nd IO buffer */ 1074 CU_ASSERT(data2->wr.sg_list[0].addr == (uintptr_t)data2_buffer); 1075 CU_ASSERT(data2->wr.sg_list[0].length == 120); 1076 CU_ASSERT(data2->wr.sg_list[0].lkey == RDMA_UT_LKEY); 1077 1078 /* Part 8: simple I/O, data with metadata do not fit to 1 io_buffer */ 1079 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 1080 reset_nvmf_rdma_request(&rdma_req); 1081 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1082 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1083 0, 0, 0, 0, 0, &dif_opts); 1084 rdma_req.req.dif_enabled = true; 1085 rtransport.transport.opts.io_unit_size = 516; 1086 sgl->keyed.length = data_bs * 2; 1087 1088 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1089 1090 CU_ASSERT(rc == 0); 1091 CU_ASSERT(rdma_req.req.data_from_pool == true); 1092 CU_ASSERT(rdma_req.req.length == data_bs * 2); 1093 CU_ASSERT(rdma_req.req.iovcnt == 3); 1094 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1095 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 2); 1096 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0x2000); 1097 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 1098 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1099 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1100 1101 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 1102 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 512); 1103 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 1104 1105 /* 2nd IO buffer consumed, offset 4 bytes due to part of the metadata 1106 is located at the beginning of that buffer */ 1107 CU_ASSERT(rdma_req.data.wr.sg_list[1].addr == 0x2000 + 4); 1108 CU_ASSERT(rdma_req.data.wr.sg_list[1].length == 512); 1109 CU_ASSERT(rdma_req.data.wr.sg_list[1].lkey == RDMA_UT_LKEY); 1110 1111 /* Test 2: Multi SGL */ 1112 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1113 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 1114 sgl->address = 0; 1115 rdma_req.recv->buf = (void *)&sgl_desc; 1116 MOCK_SET(spdk_mempool_get, data_buffer); 1117 MOCK_SET(spdk_iobuf_get, data_buffer); 1118 1119 /* part 1: 2 segments each with 1 wr. io_unit_size is aligned with data_bs + md_size */ 1120 reset_nvmf_rdma_request(&rdma_req); 1121 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1122 SPDK_DIF_TYPE1, 1123 SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1124 0, 0, 0, 0, 0, &dif_opts); 1125 rdma_req.req.dif_enabled = true; 1126 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 1127 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 1128 1129 for (i = 0; i < 2; i++) { 1130 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 1131 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 1132 sgl_desc[i].keyed.length = data_bs * 4; 1133 sgl_desc[i].address = 0x4000 + i * data_bs * 4; 1134 sgl_desc[i].keyed.key = 0x44; 1135 } 1136 1137 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1138 1139 CU_ASSERT(rc == 0); 1140 CU_ASSERT(rdma_req.req.data_from_pool == true); 1141 CU_ASSERT(rdma_req.req.length == data_bs * 4 * 2); 1142 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1143 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4 * 2); 1144 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 1145 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1146 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs * 4); 1147 1148 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 1149 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 1150 CU_ASSERT(rdma_req.data.wr.next == &data->wr); 1151 CU_ASSERT(data->wr.wr.rdma.rkey == 0x44); 1152 CU_ASSERT(data->wr.wr.rdma.remote_addr == 0x4000 + data_bs * 4); 1153 CU_ASSERT(data->wr.num_sge == 1); 1154 CU_ASSERT(data->wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1155 CU_ASSERT(data->wr.sg_list[0].length == data_bs * 4); 1156 1157 CU_ASSERT(data->wr.next == &rdma_req.rsp.wr); 1158 reset_nvmf_rdma_request(&rdma_req); 1159 } 1160 1161 static void 1162 test_nvmf_rdma_opts_init(void) 1163 { 1164 struct spdk_nvmf_transport_opts opts = {}; 1165 1166 nvmf_rdma_opts_init(&opts); 1167 CU_ASSERT(opts.max_queue_depth == SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH); 1168 CU_ASSERT(opts.max_qpairs_per_ctrlr == SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR); 1169 CU_ASSERT(opts.in_capsule_data_size == SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE); 1170 CU_ASSERT(opts.max_io_size == SPDK_NVMF_RDMA_DEFAULT_MAX_IO_SIZE); 1171 CU_ASSERT(opts.io_unit_size == SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE); 1172 CU_ASSERT(opts.max_aq_depth == SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH); 1173 CU_ASSERT(opts.num_shared_buffers == SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS); 1174 CU_ASSERT(opts.buf_cache_size == SPDK_NVMF_RDMA_DEFAULT_BUFFER_CACHE_SIZE); 1175 CU_ASSERT(opts.dif_insert_or_strip == SPDK_NVMF_RDMA_DIF_INSERT_OR_STRIP); 1176 CU_ASSERT(opts.abort_timeout_sec == SPDK_NVMF_RDMA_DEFAULT_ABORT_TIMEOUT_SEC); 1177 CU_ASSERT(opts.transport_specific == NULL); 1178 } 1179 1180 static void 1181 test_nvmf_rdma_request_free_data(void) 1182 { 1183 struct spdk_nvmf_rdma_request rdma_req = {}; 1184 struct spdk_nvmf_rdma_transport rtransport = {}; 1185 struct spdk_nvmf_rdma_request_data *next_request_data = NULL; 1186 1187 MOCK_CLEAR(spdk_mempool_get); 1188 rtransport.data_wr_pool = spdk_mempool_create("spdk_nvmf_rdma_wr_data", 1189 SPDK_NVMF_MAX_SGL_ENTRIES, 1190 sizeof(struct spdk_nvmf_rdma_request_data), 1191 SPDK_MEMPOOL_DEFAULT_CACHE_SIZE, 1192 SPDK_ENV_SOCKET_ID_ANY); 1193 next_request_data = spdk_mempool_get(rtransport.data_wr_pool); 1194 SPDK_CU_ASSERT_FATAL(((struct test_mempool *)rtransport.data_wr_pool)->count == 1195 SPDK_NVMF_MAX_SGL_ENTRIES - 1); 1196 next_request_data->wr.wr_id = (uint64_t)&rdma_req.data_wr; 1197 next_request_data->wr.num_sge = 2; 1198 next_request_data->wr.next = NULL; 1199 rdma_req.data.wr.next = &next_request_data->wr; 1200 rdma_req.data.wr.wr_id = (uint64_t)&rdma_req.data_wr; 1201 rdma_req.data.wr.num_sge = 2; 1202 rdma_req.transfer_wr = &rdma_req.data.wr; 1203 1204 nvmf_rdma_request_free_data(&rdma_req, &rtransport); 1205 /* Check if next_request_data put into memory pool */ 1206 CU_ASSERT(((struct test_mempool *)rtransport.data_wr_pool)->count == SPDK_NVMF_MAX_SGL_ENTRIES); 1207 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 1208 1209 spdk_mempool_free(rtransport.data_wr_pool); 1210 } 1211 1212 static void 1213 test_nvmf_rdma_update_ibv_state(void) 1214 { 1215 struct spdk_nvmf_rdma_qpair rqpair = {}; 1216 struct spdk_rdma_qp rdma_qp = {}; 1217 struct ibv_qp qp = {}; 1218 int rc = 0; 1219 1220 rqpair.rdma_qp = &rdma_qp; 1221 1222 /* Case 1: Failed to get updated RDMA queue pair state */ 1223 rqpair.ibv_state = IBV_QPS_INIT; 1224 rqpair.rdma_qp->qp = NULL; 1225 1226 rc = nvmf_rdma_update_ibv_state(&rqpair); 1227 CU_ASSERT(rc == IBV_QPS_ERR + 1); 1228 1229 /* Case 2: Bad state updated */ 1230 rqpair.rdma_qp->qp = &qp; 1231 qp.state = IBV_QPS_ERR; 1232 rc = nvmf_rdma_update_ibv_state(&rqpair); 1233 CU_ASSERT(rqpair.ibv_state == 10); 1234 CU_ASSERT(rc == IBV_QPS_ERR + 1); 1235 1236 /* Case 3: Pass */ 1237 qp.state = IBV_QPS_INIT; 1238 rc = nvmf_rdma_update_ibv_state(&rqpair); 1239 CU_ASSERT(rqpair.ibv_state == IBV_QPS_INIT); 1240 CU_ASSERT(rc == IBV_QPS_INIT); 1241 } 1242 1243 static void 1244 test_nvmf_rdma_resources_create(void) 1245 { 1246 static struct spdk_nvmf_rdma_resources *rdma_resource; 1247 struct spdk_nvmf_rdma_resource_opts opts = {}; 1248 struct spdk_nvmf_rdma_qpair qpair = {}; 1249 struct spdk_nvmf_rdma_recv *recv = NULL; 1250 struct spdk_nvmf_rdma_request *req = NULL; 1251 const int DEPTH = 128; 1252 1253 opts.max_queue_depth = DEPTH; 1254 opts.in_capsule_data_size = 4096; 1255 opts.shared = true; 1256 opts.qpair = &qpair; 1257 1258 rdma_resource = nvmf_rdma_resources_create(&opts); 1259 CU_ASSERT(rdma_resource != NULL); 1260 /* Just check first and last entry */ 1261 recv = &rdma_resource->recvs[0]; 1262 req = &rdma_resource->reqs[0]; 1263 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1264 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs)); 1265 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[0]); 1266 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[0])); 1267 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1268 CU_ASSERT(recv->wr.num_sge == 2); 1269 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[0].rdma_wr); 1270 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[0].sgl); 1271 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[0]); 1272 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[0]); 1273 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[0])); 1274 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1275 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1276 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].rsp_wr); 1277 CU_ASSERT(req->rsp.wr.next == NULL); 1278 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1279 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1280 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[0].rsp.sgl); 1281 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1282 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1283 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].data_wr); 1284 CU_ASSERT(req->data.wr.next == NULL); 1285 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1286 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[0].data.sgl); 1287 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1288 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1289 1290 recv = &rdma_resource->recvs[DEPTH - 1]; 1291 req = &rdma_resource->reqs[DEPTH - 1]; 1292 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1293 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs + 1294 (DEPTH - 1) * 4096)); 1295 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[DEPTH - 1]); 1296 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[DEPTH - 1])); 1297 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1298 CU_ASSERT(recv->wr.num_sge == 2); 1299 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[DEPTH - 1].rdma_wr); 1300 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[DEPTH - 1].sgl); 1301 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[DEPTH - 1]); 1302 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[DEPTH - 1]); 1303 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[DEPTH - 1])); 1304 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1305 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1306 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&req->rsp_wr); 1307 CU_ASSERT(req->rsp.wr.next == NULL); 1308 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1309 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1310 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[DEPTH - 1].rsp.sgl); 1311 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1312 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1313 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&req->data_wr); 1314 CU_ASSERT(req->data.wr.next == NULL); 1315 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1316 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[DEPTH - 1].data.sgl); 1317 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1318 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1319 1320 nvmf_rdma_resources_destroy(rdma_resource); 1321 } 1322 1323 static void 1324 test_nvmf_rdma_qpair_compare(void) 1325 { 1326 struct spdk_nvmf_rdma_qpair rqpair1 = {}, rqpair2 = {}; 1327 1328 rqpair1.qp_num = 0; 1329 rqpair2.qp_num = UINT32_MAX; 1330 1331 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair1, &rqpair2) < 0); 1332 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair2, &rqpair1) > 0); 1333 } 1334 1335 static void 1336 test_nvmf_rdma_resize_cq(void) 1337 { 1338 int rc = -1; 1339 int tnum_wr = 0; 1340 int tnum_cqe = 0; 1341 struct spdk_nvmf_rdma_qpair rqpair = {}; 1342 struct spdk_nvmf_rdma_poller rpoller = {}; 1343 struct spdk_nvmf_rdma_device rdevice = {}; 1344 struct ibv_context ircontext = {}; 1345 struct ibv_device idevice = {}; 1346 1347 rdevice.context = &ircontext; 1348 rqpair.poller = &rpoller; 1349 ircontext.device = &idevice; 1350 1351 /* Test1: Current capacity support required size. */ 1352 rpoller.required_num_wr = 10; 1353 rpoller.num_cqe = 20; 1354 rqpair.max_queue_depth = 2; 1355 tnum_wr = rpoller.required_num_wr; 1356 tnum_cqe = rpoller.num_cqe; 1357 1358 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1359 CU_ASSERT(rc == 0); 1360 CU_ASSERT(rpoller.required_num_wr == 10 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1361 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1362 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1363 1364 /* Test2: iWARP doesn't support CQ resize. */ 1365 tnum_wr = rpoller.required_num_wr; 1366 tnum_cqe = rpoller.num_cqe; 1367 idevice.transport_type = IBV_TRANSPORT_IWARP; 1368 1369 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1370 CU_ASSERT(rc == -1); 1371 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1372 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1373 1374 1375 /* Test3: RDMA CQE requirement exceeds device max_cqe limitation. */ 1376 tnum_wr = rpoller.required_num_wr; 1377 tnum_cqe = rpoller.num_cqe; 1378 idevice.transport_type = IBV_TRANSPORT_UNKNOWN; 1379 rdevice.attr.max_cqe = 3; 1380 1381 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1382 CU_ASSERT(rc == -1); 1383 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1384 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1385 1386 /* Test4: RDMA CQ resize failed. */ 1387 tnum_wr = rpoller.required_num_wr; 1388 tnum_cqe = rpoller.num_cqe; 1389 idevice.transport_type = IBV_TRANSPORT_IB; 1390 rdevice.attr.max_cqe = 30; 1391 MOCK_SET(ibv_resize_cq, -1); 1392 1393 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1394 CU_ASSERT(rc == -1); 1395 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1396 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1397 1398 /* Test5: RDMA CQ resize success. rsize = MIN(MAX(num_cqe * 2, required_num_wr), device->attr.max_cqe). */ 1399 tnum_wr = rpoller.required_num_wr; 1400 tnum_cqe = rpoller.num_cqe; 1401 MOCK_SET(ibv_resize_cq, 0); 1402 1403 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1404 CU_ASSERT(rc == 0); 1405 CU_ASSERT(rpoller.num_cqe = 30); 1406 CU_ASSERT(rpoller.required_num_wr == 18 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1407 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1408 CU_ASSERT(rpoller.num_cqe > tnum_cqe); 1409 } 1410 1411 int 1412 main(int argc, char **argv) 1413 { 1414 CU_pSuite suite = NULL; 1415 unsigned int num_failures; 1416 1417 CU_initialize_registry(); 1418 1419 suite = CU_add_suite("nvmf", NULL, NULL); 1420 1421 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl); 1422 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_process); 1423 CU_ADD_TEST(suite, test_nvmf_rdma_get_optimal_poll_group); 1424 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl_with_md); 1425 CU_ADD_TEST(suite, test_nvmf_rdma_opts_init); 1426 CU_ADD_TEST(suite, test_nvmf_rdma_request_free_data); 1427 CU_ADD_TEST(suite, test_nvmf_rdma_update_ibv_state); 1428 CU_ADD_TEST(suite, test_nvmf_rdma_resources_create); 1429 CU_ADD_TEST(suite, test_nvmf_rdma_qpair_compare); 1430 CU_ADD_TEST(suite, test_nvmf_rdma_resize_cq); 1431 1432 num_failures = spdk_ut_run_tests(argc, argv, NULL); 1433 CU_cleanup_registry(); 1434 return num_failures; 1435 } 1436