1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (C) 2018 Intel Corporation. All rights reserved. 3 * Copyright (c) 2019, 2021 Mellanox Technologies LTD. All rights reserved. 4 * Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 5 */ 6 7 #include "spdk/stdinc.h" 8 #include "spdk_internal/cunit.h" 9 #include "common/lib/test_env.c" 10 #include "common/lib/test_iobuf.c" 11 #include "common/lib/test_rdma.c" 12 #include "nvmf/rdma.c" 13 #include "nvmf/transport.c" 14 15 #define RDMA_UT_UNITS_IN_MAX_IO 16 16 17 struct spdk_nvmf_transport_opts g_rdma_ut_transport_opts = { 18 .max_queue_depth = SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH, 19 .max_qpairs_per_ctrlr = SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR, 20 .in_capsule_data_size = SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE, 21 .max_io_size = (SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE * RDMA_UT_UNITS_IN_MAX_IO), 22 .io_unit_size = SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE, 23 .max_aq_depth = SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH, 24 .num_shared_buffers = SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS, 25 }; 26 27 SPDK_LOG_REGISTER_COMPONENT(nvmf) 28 DEFINE_STUB(spdk_mem_map_set_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 29 uint64_t size, uint64_t translation), 0); 30 DEFINE_STUB(spdk_mem_map_clear_translation, int, (struct spdk_mem_map *map, uint64_t vaddr, 31 uint64_t size), 0); 32 DEFINE_STUB(spdk_mem_map_alloc, struct spdk_mem_map *, (uint64_t default_translation, 33 const struct spdk_mem_map_ops *ops, void *cb_ctx), NULL); 34 DEFINE_STUB(spdk_nvmf_qpair_disconnect, int, (struct spdk_nvmf_qpair *qpair, 35 nvmf_qpair_disconnect_cb cb_fn, void *ctx), 0); 36 DEFINE_STUB(spdk_nvmf_qpair_get_listen_trid, int, 37 (struct spdk_nvmf_qpair *qpair, struct spdk_nvme_transport_id *trid), 0); 38 DEFINE_STUB_V(spdk_mem_map_free, (struct spdk_mem_map **pmap)); 39 40 DEFINE_STUB_V(spdk_nvmf_request_exec, (struct spdk_nvmf_request *req)); 41 DEFINE_STUB(spdk_nvmf_request_complete, int, (struct spdk_nvmf_request *req), 0); 42 DEFINE_STUB(spdk_nvme_transport_id_compare, int, (const struct spdk_nvme_transport_id *trid1, 43 const struct spdk_nvme_transport_id *trid2), 0); 44 DEFINE_STUB_V(spdk_nvmf_ctrlr_abort_aer, (struct spdk_nvmf_ctrlr *ctrlr)); 45 DEFINE_STUB(spdk_nvmf_request_get_dif_ctx, bool, (struct spdk_nvmf_request *req, 46 struct spdk_dif_ctx *dif_ctx), false); 47 DEFINE_STUB_V(spdk_nvme_trid_populate_transport, (struct spdk_nvme_transport_id *trid, 48 enum spdk_nvme_transport_type trtype)); 49 DEFINE_STUB_V(spdk_nvmf_tgt_new_qpair, (struct spdk_nvmf_tgt *tgt, struct spdk_nvmf_qpair *qpair)); 50 DEFINE_STUB(nvmf_ctrlr_abort_request, int, (struct spdk_nvmf_request *req), 0); 51 DEFINE_STUB(spdk_nvme_transport_id_adrfam_str, const char *, (enum spdk_nvmf_adrfam adrfam), NULL); 52 DEFINE_STUB(ibv_dereg_mr, int, (struct ibv_mr *mr), 0); 53 DEFINE_STUB(ibv_resize_cq, int, (struct ibv_cq *cq, int cqe), 0); 54 DEFINE_STUB(spdk_mempool_lookup, struct spdk_mempool *, (const char *name), NULL); 55 56 /* ibv_reg_mr can be a macro, need to undefine it */ 57 #ifdef ibv_reg_mr 58 #undef ibv_reg_mr 59 #endif 60 61 DEFINE_RETURN_MOCK(ibv_reg_mr, struct ibv_mr *); 62 struct ibv_mr * 63 ibv_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access) 64 { 65 HANDLE_RETURN_MOCK(ibv_reg_mr); 66 if (length > 0) { 67 return &g_rdma_mr; 68 } else { 69 return NULL; 70 } 71 } 72 73 int 74 ibv_query_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr, 75 int attr_mask, struct ibv_qp_init_attr *init_attr) 76 { 77 if (qp == NULL) { 78 return -1; 79 } else { 80 attr->port_num = 80; 81 82 if (qp->state == IBV_QPS_ERR) { 83 attr->qp_state = 10; 84 } else { 85 attr->qp_state = IBV_QPS_INIT; 86 } 87 88 return 0; 89 } 90 } 91 92 const char * 93 spdk_nvme_transport_id_trtype_str(enum spdk_nvme_transport_type trtype) 94 { 95 switch (trtype) { 96 case SPDK_NVME_TRANSPORT_PCIE: 97 return "PCIe"; 98 case SPDK_NVME_TRANSPORT_RDMA: 99 return "RDMA"; 100 case SPDK_NVME_TRANSPORT_FC: 101 return "FC"; 102 default: 103 return NULL; 104 } 105 } 106 107 int 108 spdk_nvme_transport_id_populate_trstring(struct spdk_nvme_transport_id *trid, const char *trstring) 109 { 110 int len, i; 111 112 if (trstring == NULL) { 113 return -EINVAL; 114 } 115 116 len = strnlen(trstring, SPDK_NVMF_TRSTRING_MAX_LEN); 117 if (len == SPDK_NVMF_TRSTRING_MAX_LEN) { 118 return -EINVAL; 119 } 120 121 /* cast official trstring to uppercase version of input. */ 122 for (i = 0; i < len; i++) { 123 trid->trstring[i] = toupper(trstring[i]); 124 } 125 return 0; 126 } 127 128 static void 129 reset_nvmf_rdma_request(struct spdk_nvmf_rdma_request *rdma_req) 130 { 131 int i; 132 133 rdma_req->req.length = 0; 134 rdma_req->req.data_from_pool = false; 135 rdma_req->data.wr.num_sge = 0; 136 rdma_req->data.wr.wr.rdma.remote_addr = 0; 137 rdma_req->data.wr.wr.rdma.rkey = 0; 138 rdma_req->offset = 0; 139 memset(&rdma_req->req.dif, 0, sizeof(rdma_req->req.dif)); 140 141 for (i = 0; i < SPDK_NVMF_MAX_SGL_ENTRIES; i++) { 142 rdma_req->req.iov[i].iov_base = 0; 143 rdma_req->req.iov[i].iov_len = 0; 144 rdma_req->data.wr.sg_list[i].addr = 0; 145 rdma_req->data.wr.sg_list[i].length = 0; 146 rdma_req->data.wr.sg_list[i].lkey = 0; 147 } 148 rdma_req->req.iovcnt = 0; 149 if (rdma_req->req.stripped_data) { 150 free(rdma_req->req.stripped_data); 151 rdma_req->req.stripped_data = NULL; 152 } 153 } 154 155 static void 156 test_spdk_nvmf_rdma_request_parse_sgl(void) 157 { 158 struct spdk_nvmf_rdma_transport rtransport; 159 struct spdk_nvmf_rdma_device device; 160 struct spdk_nvmf_rdma_request rdma_req = {}; 161 struct spdk_nvmf_rdma_recv recv; 162 struct spdk_nvmf_rdma_poll_group group; 163 struct spdk_nvmf_rdma_qpair rqpair; 164 struct spdk_nvmf_rdma_poller poller; 165 union nvmf_c2h_msg cpl; 166 union nvmf_h2c_msg cmd; 167 struct spdk_nvme_sgl_descriptor *sgl; 168 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 169 struct spdk_nvmf_rdma_request_data data; 170 int rc, i; 171 uint32_t sgl_length; 172 173 data.wr.sg_list = data.sgl; 174 group.group.transport = &rtransport.transport; 175 poller.group = &group; 176 rqpair.poller = &poller; 177 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 178 179 sgl = &cmd.nvme_cmd.dptr.sgl1; 180 rdma_req.recv = &recv; 181 rdma_req.req.cmd = &cmd; 182 rdma_req.req.rsp = &cpl; 183 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 184 rdma_req.req.qpair = &rqpair.qpair; 185 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 186 187 rtransport.transport.opts = g_rdma_ut_transport_opts; 188 rtransport.data_wr_pool = NULL; 189 190 device.attr.device_cap_flags = 0; 191 sgl->keyed.key = 0xEEEE; 192 sgl->address = 0xFFFF; 193 rdma_req.recv->buf = (void *)0xDDDD; 194 195 /* Test 1: sgl type: keyed data block subtype: address */ 196 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 197 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 198 199 /* Part 1: simple I/O, one SGL smaller than the transport io unit size */ 200 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 201 reset_nvmf_rdma_request(&rdma_req); 202 sgl->keyed.length = rtransport.transport.opts.io_unit_size / 2; 203 204 device.map = (void *)0x0; 205 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 206 CU_ASSERT(rc == 0); 207 CU_ASSERT(rdma_req.req.data_from_pool == true); 208 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size / 2); 209 CU_ASSERT((uint64_t)rdma_req.req.iovcnt == 1); 210 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 211 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 212 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 213 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 214 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 215 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 216 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rtransport.transport.opts.io_unit_size / 2); 217 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 218 219 /* Part 2: simple I/O, one SGL larger than the transport io unit size (equal to the max io size) */ 220 reset_nvmf_rdma_request(&rdma_req); 221 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 222 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 223 224 CU_ASSERT(rc == 0); 225 CU_ASSERT(rdma_req.req.data_from_pool == true); 226 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO); 227 CU_ASSERT(rdma_req.data.wr.num_sge == RDMA_UT_UNITS_IN_MAX_IO); 228 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 229 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 230 for (i = 0; i < RDMA_UT_UNITS_IN_MAX_IO; i++) { 231 CU_ASSERT((uint64_t)rdma_req.req.iov[i].iov_base == 0x2000); 232 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 233 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == rtransport.transport.opts.io_unit_size); 234 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 235 } 236 237 /* Part 3: simple I/O one SGL larger than the transport max io size */ 238 reset_nvmf_rdma_request(&rdma_req); 239 sgl->keyed.length = rtransport.transport.opts.max_io_size * 2; 240 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 241 242 CU_ASSERT(rc == -1); 243 244 /* Part 4: Pretend there are no buffer pools */ 245 MOCK_SET(spdk_iobuf_get, NULL); 246 reset_nvmf_rdma_request(&rdma_req); 247 sgl->keyed.length = rtransport.transport.opts.io_unit_size * RDMA_UT_UNITS_IN_MAX_IO; 248 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 249 250 CU_ASSERT(rc == 0); 251 CU_ASSERT(rdma_req.req.data_from_pool == false); 252 CU_ASSERT(rdma_req.req.iovcnt == 0); 253 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 254 CU_ASSERT(rdma_req.req.iov[0].iov_base == NULL); 255 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0); 256 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 0); 257 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == 0); 258 259 rdma_req.recv->buf = (void *)0xDDDD; 260 /* Test 2: sgl type: keyed data block subtype: offset (in capsule data) */ 261 sgl->generic.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 262 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 263 264 /* Part 1: Normal I/O smaller than in capsule data size no offset */ 265 reset_nvmf_rdma_request(&rdma_req); 266 sgl->address = 0; 267 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 268 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 269 270 CU_ASSERT(rc == 0); 271 CU_ASSERT(rdma_req.req.iovcnt == 1); 272 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0xDDDD); 273 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.in_capsule_data_size); 274 CU_ASSERT(rdma_req.req.data_from_pool == false); 275 276 /* Part 2: I/O offset + length too large */ 277 reset_nvmf_rdma_request(&rdma_req); 278 sgl->address = rtransport.transport.opts.in_capsule_data_size; 279 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size; 280 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 281 282 CU_ASSERT(rc == -1); 283 284 /* Part 3: I/O too large */ 285 reset_nvmf_rdma_request(&rdma_req); 286 sgl->address = 0; 287 sgl->unkeyed.length = rtransport.transport.opts.in_capsule_data_size * 2; 288 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 289 290 CU_ASSERT(rc == -1); 291 292 /* Test 3: Multi SGL */ 293 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 294 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 295 sgl->address = 0; 296 rdma_req.recv->buf = (void *)&sgl_desc; 297 MOCK_SET(spdk_iobuf_get, &data); 298 MOCK_SET(spdk_mempool_get, &data); 299 300 /* part 1: 2 segments each with 1 wr. */ 301 reset_nvmf_rdma_request(&rdma_req); 302 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 303 for (i = 0; i < 2; i++) { 304 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 305 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 306 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size; 307 sgl_desc[i].address = 0x4000 + i * rtransport.transport.opts.io_unit_size; 308 sgl_desc[i].keyed.key = 0x44; 309 } 310 311 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 312 313 CU_ASSERT(rc == 0); 314 CU_ASSERT(rdma_req.req.data_from_pool == true); 315 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 2); 316 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 317 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 318 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 319 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 320 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 321 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size); 322 CU_ASSERT(data.wr.num_sge == 1); 323 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 324 325 /* part 2: 2 segments, each with 1 wr containing 8 sge_elements */ 326 reset_nvmf_rdma_request(&rdma_req); 327 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 328 for (i = 0; i < 2; i++) { 329 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 330 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 331 sgl_desc[i].keyed.length = rtransport.transport.opts.io_unit_size * 8; 332 sgl_desc[i].address = 0x4000 + i * 8 * rtransport.transport.opts.io_unit_size; 333 sgl_desc[i].keyed.key = 0x44; 334 } 335 336 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 337 338 CU_ASSERT(rc == 0); 339 CU_ASSERT(rdma_req.req.data_from_pool == true); 340 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 341 CU_ASSERT(rdma_req.req.iovcnt == 16); 342 CU_ASSERT(rdma_req.data.wr.num_sge == 8); 343 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 344 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 345 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 346 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 347 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 8); 348 CU_ASSERT(data.wr.num_sge == 8); 349 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 350 351 /* part 3: 2 segments, one very large, one very small */ 352 reset_nvmf_rdma_request(&rdma_req); 353 for (i = 0; i < 2; i++) { 354 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 355 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 356 sgl_desc[i].keyed.key = 0x44; 357 } 358 359 sgl_desc[0].keyed.length = rtransport.transport.opts.io_unit_size * 15 + 360 rtransport.transport.opts.io_unit_size / 2; 361 sgl_desc[0].address = 0x4000; 362 sgl_desc[1].keyed.length = rtransport.transport.opts.io_unit_size / 2; 363 sgl_desc[1].address = 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 364 rtransport.transport.opts.io_unit_size / 2; 365 366 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 367 368 CU_ASSERT(rc == 0); 369 CU_ASSERT(rdma_req.req.data_from_pool == true); 370 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size * 16); 371 CU_ASSERT(rdma_req.req.iovcnt == 16); 372 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 373 for (i = 0; i < 15; i++) { 374 CU_ASSERT(rdma_req.data.sgl[i].length == rtransport.transport.opts.io_unit_size); 375 } 376 CU_ASSERT(rdma_req.data.sgl[15].length == rtransport.transport.opts.io_unit_size / 2); 377 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 378 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 379 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 380 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 381 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + rtransport.transport.opts.io_unit_size * 15 + 382 rtransport.transport.opts.io_unit_size / 2); 383 CU_ASSERT(data.sgl[0].length == rtransport.transport.opts.io_unit_size / 2); 384 CU_ASSERT(data.wr.num_sge == 1); 385 CU_ASSERT(data.wr.next == &rdma_req.rsp.wr); 386 387 /* part 4: 2 SGL descriptors, each length is transport buffer / 2 388 * 1 transport buffers should be allocated */ 389 reset_nvmf_rdma_request(&rdma_req); 390 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 391 sgl_length = rtransport.transport.opts.io_unit_size / 2; 392 for (i = 0; i < 2; i++) { 393 sgl_desc[i].keyed.length = sgl_length; 394 sgl_desc[i].address = 0x4000 + i * sgl_length; 395 } 396 397 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 398 399 CU_ASSERT(rc == 0); 400 CU_ASSERT(rdma_req.req.data_from_pool == true); 401 CU_ASSERT(rdma_req.req.length == rtransport.transport.opts.io_unit_size); 402 CU_ASSERT(rdma_req.req.iovcnt == 1); 403 404 CU_ASSERT(rdma_req.data.sgl[0].length == sgl_length); 405 /* We mocked mempool_get to return address of data variable. Mempool is used 406 * to get both additional WRs and data buffers, so data points to &data */ 407 CU_ASSERT(rdma_req.data.sgl[0].addr == (uint64_t)&data); 408 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 409 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 410 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 411 CU_ASSERT(rdma_req.data.wr.next == &data.wr); 412 413 CU_ASSERT(data.wr.wr.rdma.rkey == 0x44); 414 CU_ASSERT(data.wr.wr.rdma.remote_addr == 0x4000 + sgl_length); 415 CU_ASSERT(data.sgl[0].length == sgl_length); 416 CU_ASSERT(data.sgl[0].addr == (uint64_t)&data + sgl_length); 417 CU_ASSERT(data.wr.num_sge == 1); 418 419 MOCK_CLEAR(spdk_mempool_get); 420 MOCK_CLEAR(spdk_iobuf_get); 421 422 reset_nvmf_rdma_request(&rdma_req); 423 } 424 425 static struct spdk_nvmf_rdma_recv * 426 create_recv(struct spdk_nvmf_rdma_qpair *rqpair, enum spdk_nvme_nvm_opcode opc) 427 { 428 struct spdk_nvmf_rdma_recv *rdma_recv; 429 union nvmf_h2c_msg *cmd; 430 struct spdk_nvme_sgl_descriptor *sgl; 431 432 rdma_recv = calloc(1, sizeof(*rdma_recv)); 433 rdma_recv->qpair = rqpair; 434 cmd = calloc(1, sizeof(*cmd)); 435 rdma_recv->sgl[0].addr = (uintptr_t)cmd; 436 cmd->nvme_cmd.opc = opc; 437 sgl = &cmd->nvme_cmd.dptr.sgl1; 438 sgl->keyed.key = 0xEEEE; 439 sgl->address = 0xFFFF; 440 sgl->keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 441 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 442 sgl->keyed.length = 1; 443 444 return rdma_recv; 445 } 446 447 static void 448 free_recv(struct spdk_nvmf_rdma_recv *rdma_recv) 449 { 450 free((void *)rdma_recv->sgl[0].addr); 451 free(rdma_recv); 452 } 453 454 static struct spdk_nvmf_rdma_request * 455 create_req(struct spdk_nvmf_rdma_qpair *rqpair, 456 struct spdk_nvmf_rdma_recv *rdma_recv) 457 { 458 struct spdk_nvmf_rdma_request *rdma_req; 459 union nvmf_c2h_msg *cpl; 460 461 rdma_req = calloc(1, sizeof(*rdma_req)); 462 rdma_req->recv = rdma_recv; 463 rdma_req->req.qpair = &rqpair->qpair; 464 rdma_req->state = RDMA_REQUEST_STATE_NEW; 465 rdma_req->data.wr.wr_id = (uintptr_t)&rdma_req->data_wr; 466 rdma_req->data.wr.sg_list = rdma_req->data.sgl; 467 cpl = calloc(1, sizeof(*cpl)); 468 rdma_req->rsp.sgl[0].addr = (uintptr_t)cpl; 469 rdma_req->req.rsp = cpl; 470 471 return rdma_req; 472 } 473 474 static void 475 free_req(struct spdk_nvmf_rdma_request *rdma_req) 476 { 477 free((void *)rdma_req->rsp.sgl[0].addr); 478 free(rdma_req); 479 } 480 481 static void 482 qpair_reset(struct spdk_nvmf_rdma_qpair *rqpair, 483 struct spdk_nvmf_rdma_poller *poller, 484 struct spdk_nvmf_rdma_device *device, 485 struct spdk_nvmf_rdma_resources *resources, 486 struct spdk_nvmf_transport *transport) 487 { 488 memset(rqpair, 0, sizeof(*rqpair)); 489 STAILQ_INIT(&rqpair->pending_rdma_write_queue); 490 STAILQ_INIT(&rqpair->pending_rdma_read_queue); 491 rqpair->poller = poller; 492 rqpair->device = device; 493 rqpair->resources = resources; 494 rqpair->qpair.qid = 1; 495 rqpair->ibv_state = IBV_QPS_RTS; 496 rqpair->qpair.state = SPDK_NVMF_QPAIR_ACTIVE; 497 rqpair->max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 498 rqpair->max_send_depth = 16; 499 rqpair->max_read_depth = 16; 500 rqpair->qpair.transport = transport; 501 } 502 503 static void 504 poller_reset(struct spdk_nvmf_rdma_poller *poller, 505 struct spdk_nvmf_rdma_poll_group *group) 506 { 507 memset(poller, 0, sizeof(*poller)); 508 STAILQ_INIT(&poller->qpairs_pending_recv); 509 STAILQ_INIT(&poller->qpairs_pending_send); 510 poller->group = group; 511 } 512 513 static void 514 test_spdk_nvmf_rdma_request_process(void) 515 { 516 struct spdk_nvmf_rdma_transport rtransport = {}; 517 struct spdk_nvmf_rdma_poll_group group = {}; 518 struct spdk_nvmf_rdma_poller poller = {}; 519 struct spdk_nvmf_rdma_device device = {}; 520 struct spdk_nvmf_rdma_resources resources = {}; 521 struct spdk_nvmf_rdma_qpair rqpair = {}; 522 struct spdk_nvmf_rdma_recv *rdma_recv; 523 struct spdk_nvmf_rdma_request *rdma_req; 524 struct spdk_iobuf_channel ch = {}; 525 bool progress; 526 527 group.group.buf_cache = &ch; 528 529 STAILQ_INIT(&group.group.pending_buf_queue); 530 poller_reset(&poller, &group); 531 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 532 533 rtransport.transport.opts = g_rdma_ut_transport_opts; 534 rtransport.data_wr_pool = spdk_mempool_create("test_wr_pool", 128, 535 sizeof(struct spdk_nvmf_rdma_request_data), 536 0, 0); 537 MOCK_CLEAR(spdk_iobuf_get); 538 539 device.attr.device_cap_flags = 0; 540 device.map = (void *)0x0; 541 542 /* Test 1: single SGL READ request */ 543 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_READ); 544 rdma_req = create_req(&rqpair, rdma_recv); 545 rqpair.current_recv_depth = 1; 546 /* NEW -> EXECUTING */ 547 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 548 CU_ASSERT(progress == true); 549 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 550 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_CONTROLLER_TO_HOST); 551 /* EXECUTED -> TRANSFERRING_C2H */ 552 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 553 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 554 CU_ASSERT(progress == true); 555 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_CONTROLLER_TO_HOST); 556 CU_ASSERT(rdma_req->recv == NULL); 557 /* COMPLETED -> FREE */ 558 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 559 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 560 CU_ASSERT(progress == true); 561 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 562 563 free_recv(rdma_recv); 564 free_req(rdma_req); 565 poller_reset(&poller, &group); 566 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 567 568 /* Test 2: single SGL WRITE request */ 569 rdma_recv = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 570 rdma_req = create_req(&rqpair, rdma_recv); 571 rqpair.current_recv_depth = 1; 572 /* NEW -> TRANSFERRING_H2C */ 573 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 574 CU_ASSERT(progress == true); 575 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 576 CU_ASSERT(rdma_req->req.xfer == SPDK_NVME_DATA_HOST_TO_CONTROLLER); 577 STAILQ_INIT(&poller.qpairs_pending_send); 578 /* READY_TO_EXECUTE -> EXECUTING */ 579 rdma_req->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 580 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 581 CU_ASSERT(progress == true); 582 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_EXECUTING); 583 /* EXECUTED -> COMPLETING */ 584 rdma_req->state = RDMA_REQUEST_STATE_EXECUTED; 585 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 586 CU_ASSERT(progress == true); 587 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_COMPLETING); 588 CU_ASSERT(rdma_req->recv == NULL); 589 /* COMPLETED -> FREE */ 590 rdma_req->state = RDMA_REQUEST_STATE_COMPLETED; 591 progress = nvmf_rdma_request_process(&rtransport, rdma_req); 592 CU_ASSERT(progress == true); 593 CU_ASSERT(rdma_req->state == RDMA_REQUEST_STATE_FREE); 594 595 free_recv(rdma_recv); 596 free_req(rdma_req); 597 poller_reset(&poller, &group); 598 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 599 600 /* Test 3: WRITE+WRITE ibv_send batching */ 601 { 602 struct spdk_nvmf_rdma_recv *recv1, *recv2; 603 struct spdk_nvmf_rdma_request *req1, *req2; 604 recv1 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 605 req1 = create_req(&rqpair, recv1); 606 recv2 = create_recv(&rqpair, SPDK_NVME_OPC_WRITE); 607 req2 = create_req(&rqpair, recv2); 608 609 /* WRITE 1: NEW -> TRANSFERRING_H2C */ 610 rqpair.current_recv_depth = 1; 611 nvmf_rdma_request_process(&rtransport, req1); 612 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 613 614 /* WRITE 2: NEW -> TRANSFERRING_H2C */ 615 rqpair.current_recv_depth = 2; 616 nvmf_rdma_request_process(&rtransport, req2); 617 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_TRANSFERRING_HOST_TO_CONTROLLER); 618 619 STAILQ_INIT(&poller.qpairs_pending_send); 620 621 /* WRITE 1 completes before WRITE 2 has finished RDMA reading */ 622 /* WRITE 1: READY_TO_EXECUTE -> EXECUTING */ 623 req1->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 624 nvmf_rdma_request_process(&rtransport, req1); 625 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_EXECUTING); 626 /* WRITE 1: EXECUTED -> COMPLETING */ 627 req1->state = RDMA_REQUEST_STATE_EXECUTED; 628 nvmf_rdma_request_process(&rtransport, req1); 629 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_COMPLETING); 630 STAILQ_INIT(&poller.qpairs_pending_send); 631 /* WRITE 1: COMPLETED -> FREE */ 632 req1->state = RDMA_REQUEST_STATE_COMPLETED; 633 nvmf_rdma_request_process(&rtransport, req1); 634 CU_ASSERT(req1->state == RDMA_REQUEST_STATE_FREE); 635 636 /* Now WRITE 2 has finished reading and completes */ 637 /* WRITE 2: COMPLETED -> FREE */ 638 /* WRITE 2: READY_TO_EXECUTE -> EXECUTING */ 639 req2->state = RDMA_REQUEST_STATE_READY_TO_EXECUTE; 640 nvmf_rdma_request_process(&rtransport, req2); 641 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_EXECUTING); 642 /* WRITE 1: EXECUTED -> COMPLETING */ 643 req2->state = RDMA_REQUEST_STATE_EXECUTED; 644 nvmf_rdma_request_process(&rtransport, req2); 645 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_COMPLETING); 646 STAILQ_INIT(&poller.qpairs_pending_send); 647 /* WRITE 1: COMPLETED -> FREE */ 648 req2->state = RDMA_REQUEST_STATE_COMPLETED; 649 nvmf_rdma_request_process(&rtransport, req2); 650 CU_ASSERT(req2->state == RDMA_REQUEST_STATE_FREE); 651 652 free_recv(recv1); 653 free_req(req1); 654 free_recv(recv2); 655 free_req(req2); 656 poller_reset(&poller, &group); 657 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 658 } 659 660 /* Test 4, invalid command, check xfer type */ 661 { 662 struct spdk_nvmf_rdma_recv *rdma_recv_inv; 663 struct spdk_nvmf_rdma_request *rdma_req_inv; 664 /* construct an opcode that specifies BIDIRECTIONAL transfer */ 665 uint8_t opc = 0x10 | SPDK_NVME_DATA_BIDIRECTIONAL; 666 667 rdma_recv_inv = create_recv(&rqpair, opc); 668 rdma_req_inv = create_req(&rqpair, rdma_recv_inv); 669 670 /* NEW -> RDMA_REQUEST_STATE_COMPLETING */ 671 rqpair.current_recv_depth = 1; 672 progress = nvmf_rdma_request_process(&rtransport, rdma_req_inv); 673 CU_ASSERT(progress == true); 674 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_COMPLETING); 675 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC); 676 CU_ASSERT(rdma_req_inv->req.rsp->nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_OPCODE); 677 678 /* RDMA_REQUEST_STATE_COMPLETED -> FREE */ 679 rdma_req_inv->state = RDMA_REQUEST_STATE_COMPLETED; 680 nvmf_rdma_request_process(&rtransport, rdma_req_inv); 681 CU_ASSERT(rdma_req_inv->state == RDMA_REQUEST_STATE_FREE); 682 683 free_recv(rdma_recv_inv); 684 free_req(rdma_req_inv); 685 poller_reset(&poller, &group); 686 qpair_reset(&rqpair, &poller, &device, &resources, &rtransport.transport); 687 } 688 689 spdk_mempool_free(rtransport.data_wr_pool); 690 } 691 692 #define TEST_GROUPS_COUNT 5 693 static void 694 test_nvmf_rdma_get_optimal_poll_group(void) 695 { 696 struct spdk_nvmf_rdma_transport rtransport = {}; 697 struct spdk_nvmf_transport *transport = &rtransport.transport; 698 struct spdk_nvmf_rdma_qpair rqpair = {}; 699 struct spdk_nvmf_transport_poll_group *groups[TEST_GROUPS_COUNT]; 700 struct spdk_nvmf_rdma_poll_group *rgroups[TEST_GROUPS_COUNT]; 701 struct spdk_nvmf_transport_poll_group *result; 702 struct spdk_nvmf_poll_group group = {}; 703 uint32_t i; 704 705 rqpair.qpair.transport = transport; 706 TAILQ_INIT(&rtransport.poll_groups); 707 708 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 709 groups[i] = nvmf_rdma_poll_group_create(transport, NULL); 710 CU_ASSERT(groups[i] != NULL); 711 groups[i]->group = &group; 712 rgroups[i] = SPDK_CONTAINEROF(groups[i], struct spdk_nvmf_rdma_poll_group, group); 713 groups[i]->transport = transport; 714 } 715 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[0]); 716 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[0]); 717 718 /* Emulate connection of %TEST_GROUPS_COUNT% initiators - each creates 1 admin and 1 io qp */ 719 for (i = 0; i < TEST_GROUPS_COUNT; i++) { 720 rqpair.qpair.qid = 0; 721 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 722 CU_ASSERT(result == groups[i]); 723 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 724 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i]); 725 726 rqpair.qpair.qid = 1; 727 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 728 CU_ASSERT(result == groups[i]); 729 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 730 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[(i + 1) % TEST_GROUPS_COUNT]); 731 } 732 /* wrap around, admin/io pg point to the first pg 733 Destroy all poll groups except of the last one */ 734 for (i = 0; i < TEST_GROUPS_COUNT - 1; i++) { 735 nvmf_rdma_poll_group_destroy(groups[i]); 736 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[i + 1]); 737 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[i + 1]); 738 } 739 740 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 741 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 742 743 /* Check that pointers to the next admin/io poll groups are not changed */ 744 rqpair.qpair.qid = 0; 745 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 746 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 747 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 748 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 749 750 rqpair.qpair.qid = 1; 751 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 752 CU_ASSERT(result == groups[TEST_GROUPS_COUNT - 1]); 753 CU_ASSERT(rtransport.conn_sched.next_admin_pg == rgroups[TEST_GROUPS_COUNT - 1]); 754 CU_ASSERT(rtransport.conn_sched.next_io_pg == rgroups[TEST_GROUPS_COUNT - 1]); 755 756 /* Remove the last poll group, check that pointers are NULL */ 757 nvmf_rdma_poll_group_destroy(groups[TEST_GROUPS_COUNT - 1]); 758 CU_ASSERT(rtransport.conn_sched.next_admin_pg == NULL); 759 CU_ASSERT(rtransport.conn_sched.next_io_pg == NULL); 760 761 /* Request optimal poll group, result must be NULL */ 762 rqpair.qpair.qid = 0; 763 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 764 CU_ASSERT(result == NULL); 765 766 rqpair.qpair.qid = 1; 767 result = nvmf_rdma_get_optimal_poll_group(&rqpair.qpair); 768 CU_ASSERT(result == NULL); 769 } 770 #undef TEST_GROUPS_COUNT 771 772 static void 773 test_spdk_nvmf_rdma_request_parse_sgl_with_md(void) 774 { 775 struct spdk_nvmf_rdma_transport rtransport; 776 struct spdk_nvmf_rdma_device device; 777 struct spdk_nvmf_rdma_request rdma_req = {}; 778 struct spdk_nvmf_rdma_recv recv; 779 struct spdk_nvmf_rdma_poll_group group; 780 struct spdk_nvmf_rdma_qpair rqpair; 781 struct spdk_nvmf_rdma_poller poller; 782 union nvmf_c2h_msg cpl; 783 union nvmf_h2c_msg cmd; 784 struct spdk_nvme_sgl_descriptor *sgl; 785 struct spdk_nvme_sgl_descriptor sgl_desc[SPDK_NVMF_MAX_SGL_ENTRIES] = {{0}}; 786 char data_buffer[8192]; 787 struct spdk_nvmf_rdma_request_data *data = (struct spdk_nvmf_rdma_request_data *)data_buffer; 788 char data2_buffer[8192]; 789 struct spdk_nvmf_rdma_request_data *data2 = (struct spdk_nvmf_rdma_request_data *)data2_buffer; 790 const uint32_t data_bs = 512; 791 const uint32_t md_size = 8; 792 int rc, i; 793 struct spdk_dif_ctx_init_ext_opts dif_opts; 794 795 MOCK_CLEAR(spdk_mempool_get); 796 MOCK_CLEAR(spdk_iobuf_get); 797 798 data->wr.sg_list = data->sgl; 799 group.group.transport = &rtransport.transport; 800 poller.group = &group; 801 rqpair.poller = &poller; 802 rqpair.max_send_sge = SPDK_NVMF_MAX_SGL_ENTRIES; 803 804 sgl = &cmd.nvme_cmd.dptr.sgl1; 805 rdma_req.recv = &recv; 806 rdma_req.req.cmd = &cmd; 807 rdma_req.req.rsp = &cpl; 808 rdma_req.data.wr.sg_list = rdma_req.data.sgl; 809 rdma_req.req.qpair = &rqpair.qpair; 810 rdma_req.req.xfer = SPDK_NVME_DATA_CONTROLLER_TO_HOST; 811 812 rtransport.transport.opts = g_rdma_ut_transport_opts; 813 rtransport.data_wr_pool = NULL; 814 815 device.attr.device_cap_flags = 0; 816 device.map = NULL; 817 sgl->keyed.key = 0xEEEE; 818 sgl->address = 0xFFFF; 819 rdma_req.recv->buf = (void *)0xDDDD; 820 821 /* Test 1: sgl type: keyed data block subtype: address */ 822 sgl->generic.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 823 sgl->keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 824 825 /* Part 1: simple I/O, one SGL smaller than the transport io unit size, block size 512 */ 826 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 827 reset_nvmf_rdma_request(&rdma_req); 828 dif_opts.size = SPDK_SIZEOF(&dif_opts, dif_pi_format); 829 dif_opts.dif_pi_format = SPDK_DIF_PI_FORMAT_16; 830 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 831 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 832 0, 0, 0, 0, 0, &dif_opts); 833 rdma_req.req.dif_enabled = true; 834 rtransport.transport.opts.io_unit_size = data_bs * 8; 835 rdma_req.req.qpair->transport = &rtransport.transport; 836 sgl->keyed.length = data_bs * 4; 837 838 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 839 840 CU_ASSERT(rc == 0); 841 CU_ASSERT(rdma_req.req.data_from_pool == true); 842 CU_ASSERT(rdma_req.req.length == data_bs * 4); 843 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 844 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 845 CU_ASSERT(rdma_req.req.iovcnt == 1); 846 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 847 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 848 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 849 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 850 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 851 852 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 853 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 854 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 855 856 /* Part 2: simple I/O, one SGL equal to io unit size, io_unit_size is not aligned with md_size, 857 block size 512 */ 858 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 859 reset_nvmf_rdma_request(&rdma_req); 860 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 861 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 862 0, 0, 0, 0, 0, &dif_opts); 863 rdma_req.req.dif_enabled = true; 864 rtransport.transport.opts.io_unit_size = data_bs * 4; 865 sgl->keyed.length = data_bs * 4; 866 867 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 868 869 CU_ASSERT(rc == 0); 870 CU_ASSERT(rdma_req.req.data_from_pool == true); 871 CU_ASSERT(rdma_req.req.length == data_bs * 4); 872 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 873 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 874 CU_ASSERT(rdma_req.req.iovcnt == 2); 875 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 876 CU_ASSERT(rdma_req.data.wr.num_sge == 5); 877 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 878 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 879 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 880 881 for (i = 0; i < 3; ++i) { 882 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 883 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 884 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 885 } 886 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 887 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 888 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 889 890 /* 2nd buffer consumed */ 891 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 892 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 893 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 894 895 /* Part 3: simple I/O, one SGL equal io unit size, io_unit_size is equal to block size 512 bytes */ 896 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 897 reset_nvmf_rdma_request(&rdma_req); 898 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 899 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 900 0, 0, 0, 0, 0, &dif_opts); 901 rdma_req.req.dif_enabled = true; 902 rtransport.transport.opts.io_unit_size = data_bs; 903 sgl->keyed.length = data_bs; 904 905 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 906 907 CU_ASSERT(rc == 0); 908 CU_ASSERT(rdma_req.req.data_from_pool == true); 909 CU_ASSERT(rdma_req.req.length == data_bs); 910 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 911 CU_ASSERT(rdma_req.req.dif.elba_length == data_bs + md_size); 912 CU_ASSERT(rdma_req.req.iovcnt == 2); 913 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 914 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 915 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 916 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 917 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 918 919 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 920 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs); 921 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 922 923 CU_ASSERT(rdma_req.req.iovcnt == 2); 924 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)((unsigned long)0x2000)); 925 CU_ASSERT(rdma_req.req.iov[0].iov_len == data_bs); 926 /* 2nd buffer consumed for metadata */ 927 CU_ASSERT(rdma_req.req.iov[1].iov_base == (void *)((unsigned long)0x2000)); 928 CU_ASSERT(rdma_req.req.iov[1].iov_len == md_size); 929 930 /* Part 4: simple I/O, one SGL equal io unit size, io_unit_size is aligned with md_size, 931 block size 512 */ 932 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 933 reset_nvmf_rdma_request(&rdma_req); 934 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 935 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 936 0, 0, 0, 0, 0, &dif_opts); 937 rdma_req.req.dif_enabled = true; 938 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 939 sgl->keyed.length = data_bs * 4; 940 941 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 942 943 CU_ASSERT(rc == 0); 944 CU_ASSERT(rdma_req.req.data_from_pool == true); 945 CU_ASSERT(rdma_req.req.length == data_bs * 4); 946 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 947 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 948 CU_ASSERT(rdma_req.req.iovcnt == 1); 949 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 950 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 951 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 952 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 953 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 954 955 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 956 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == rdma_req.req.length); 957 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 958 959 /* Part 5: simple I/O, one SGL equal to 2x io unit size, io_unit_size is aligned with md_size, 960 block size 512 */ 961 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 962 reset_nvmf_rdma_request(&rdma_req); 963 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 964 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 965 0, 0, 0, 0, 0, &dif_opts); 966 rdma_req.req.dif_enabled = true; 967 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 2; 968 sgl->keyed.length = data_bs * 4; 969 970 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 971 972 CU_ASSERT(rc == 0); 973 CU_ASSERT(rdma_req.req.data_from_pool == true); 974 CU_ASSERT(rdma_req.req.length == data_bs * 4); 975 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 976 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4); 977 CU_ASSERT(rdma_req.req.iovcnt == 2); 978 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 979 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 980 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 981 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 982 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 983 984 for (i = 0; i < 2; ++i) { 985 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000); 986 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs * 2); 987 } 988 989 /* Part 6: simple I/O, one SGL larger than the transport io unit size, io_unit_size is not aligned to md_size, 990 block size 512 */ 991 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 992 reset_nvmf_rdma_request(&rdma_req); 993 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 994 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 995 0, 0, 0, 0, 0, &dif_opts); 996 rdma_req.req.dif_enabled = true; 997 rtransport.transport.opts.io_unit_size = data_bs * 4; 998 sgl->keyed.length = data_bs * 6; 999 1000 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1001 1002 CU_ASSERT(rc == 0); 1003 CU_ASSERT(rdma_req.req.data_from_pool == true); 1004 CU_ASSERT(rdma_req.req.length == data_bs * 6); 1005 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1006 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 6); 1007 CU_ASSERT(rdma_req.req.iovcnt == 2); 1008 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1009 CU_ASSERT(rdma_req.data.wr.num_sge == 7); 1010 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1011 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1012 CU_ASSERT((uint64_t)rdma_req.req.iov[0].iov_base == 0x2000); 1013 1014 for (i = 0; i < 3; ++i) { 1015 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == 0x2000 + i * (data_bs + md_size)); 1016 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1017 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1018 } 1019 CU_ASSERT(rdma_req.data.wr.sg_list[3].addr == 0x2000 + 3 * (data_bs + md_size)); 1020 CU_ASSERT(rdma_req.data.wr.sg_list[3].length == 488); 1021 CU_ASSERT(rdma_req.data.wr.sg_list[3].lkey == RDMA_UT_LKEY); 1022 1023 /* 2nd IO buffer consumed */ 1024 CU_ASSERT(rdma_req.data.wr.sg_list[4].addr == 0x2000); 1025 CU_ASSERT(rdma_req.data.wr.sg_list[4].length == 24); 1026 CU_ASSERT(rdma_req.data.wr.sg_list[4].lkey == RDMA_UT_LKEY); 1027 1028 CU_ASSERT(rdma_req.data.wr.sg_list[5].addr == 0x2000 + 24 + md_size); 1029 CU_ASSERT(rdma_req.data.wr.sg_list[5].length == 512); 1030 CU_ASSERT(rdma_req.data.wr.sg_list[5].lkey == RDMA_UT_LKEY); 1031 1032 CU_ASSERT(rdma_req.data.wr.sg_list[6].addr == 0x2000 + 24 + 512 + md_size * 2); 1033 CU_ASSERT(rdma_req.data.wr.sg_list[6].length == 512); 1034 CU_ASSERT(rdma_req.data.wr.sg_list[6].lkey == RDMA_UT_LKEY); 1035 1036 /* Part 7: simple I/O, number of SGL entries exceeds the number of entries 1037 one WR can hold. Additional WR is chained */ 1038 MOCK_SET(spdk_iobuf_get, data2_buffer); 1039 MOCK_SET(spdk_mempool_get, data2_buffer); 1040 reset_nvmf_rdma_request(&rdma_req); 1041 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1042 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1043 0, 0, 0, 0, 0, &dif_opts); 1044 rdma_req.req.dif_enabled = true; 1045 rtransport.transport.opts.io_unit_size = data_bs * 16; 1046 sgl->keyed.length = data_bs * 16; 1047 1048 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1049 1050 CU_ASSERT(rc == 0); 1051 CU_ASSERT(rdma_req.req.data_from_pool == true); 1052 CU_ASSERT(rdma_req.req.length == data_bs * 16); 1053 CU_ASSERT(rdma_req.req.iovcnt == 2); 1054 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1055 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 16); 1056 CU_ASSERT(rdma_req.req.iov[0].iov_base == data2_buffer); 1057 CU_ASSERT(rdma_req.data.wr.num_sge == 16); 1058 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1059 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1060 1061 for (i = 0; i < 15; ++i) { 1062 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1063 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == data_bs); 1064 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1065 } 1066 1067 /* 8192 - (512 + 8) * 15 = 392 */ 1068 CU_ASSERT(rdma_req.data.wr.sg_list[i].addr == (uintptr_t)data2_buffer + i * (data_bs + md_size)); 1069 CU_ASSERT(rdma_req.data.wr.sg_list[i].length == 392); 1070 CU_ASSERT(rdma_req.data.wr.sg_list[i].lkey == RDMA_UT_LKEY); 1071 1072 /* additional wr from pool */ 1073 CU_ASSERT(rdma_req.data.wr.next == (void *)&data2->wr); 1074 CU_ASSERT(rdma_req.data.wr.next->num_sge == 1); 1075 CU_ASSERT(rdma_req.data.wr.next->next == &rdma_req.rsp.wr); 1076 /* 2nd IO buffer */ 1077 CU_ASSERT(data2->wr.sg_list[0].addr == (uintptr_t)data2_buffer); 1078 CU_ASSERT(data2->wr.sg_list[0].length == 120); 1079 CU_ASSERT(data2->wr.sg_list[0].lkey == RDMA_UT_LKEY); 1080 1081 /* Part 8: simple I/O, data with metadata do not fit to 1 io_buffer */ 1082 MOCK_SET(spdk_iobuf_get, (void *)0x2000); 1083 reset_nvmf_rdma_request(&rdma_req); 1084 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1085 SPDK_DIF_TYPE1, SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1086 0, 0, 0, 0, 0, &dif_opts); 1087 rdma_req.req.dif_enabled = true; 1088 rtransport.transport.opts.io_unit_size = 516; 1089 sgl->keyed.length = data_bs * 2; 1090 1091 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1092 1093 CU_ASSERT(rc == 0); 1094 CU_ASSERT(rdma_req.req.data_from_pool == true); 1095 CU_ASSERT(rdma_req.req.length == data_bs * 2); 1096 CU_ASSERT(rdma_req.req.iovcnt == 3); 1097 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1098 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 2); 1099 CU_ASSERT(rdma_req.req.iov[0].iov_base == (void *)0x2000); 1100 CU_ASSERT(rdma_req.data.wr.num_sge == 2); 1101 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0xEEEE); 1102 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0xFFFF); 1103 1104 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == 0x2000); 1105 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == 512); 1106 CU_ASSERT(rdma_req.data.wr.sg_list[0].lkey == RDMA_UT_LKEY); 1107 1108 /* 2nd IO buffer consumed, offset 4 bytes due to part of the metadata 1109 is located at the beginning of that buffer */ 1110 CU_ASSERT(rdma_req.data.wr.sg_list[1].addr == 0x2000 + 4); 1111 CU_ASSERT(rdma_req.data.wr.sg_list[1].length == 512); 1112 CU_ASSERT(rdma_req.data.wr.sg_list[1].lkey == RDMA_UT_LKEY); 1113 1114 /* Test 2: Multi SGL */ 1115 sgl->generic.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1116 sgl->unkeyed.subtype = SPDK_NVME_SGL_SUBTYPE_OFFSET; 1117 sgl->address = 0; 1118 rdma_req.recv->buf = (void *)&sgl_desc; 1119 MOCK_SET(spdk_mempool_get, data_buffer); 1120 MOCK_SET(spdk_iobuf_get, data_buffer); 1121 1122 /* part 1: 2 segments each with 1 wr. io_unit_size is aligned with data_bs + md_size */ 1123 reset_nvmf_rdma_request(&rdma_req); 1124 spdk_dif_ctx_init(&rdma_req.req.dif.dif_ctx, data_bs + md_size, md_size, true, false, 1125 SPDK_DIF_TYPE1, 1126 SPDK_DIF_FLAGS_GUARD_CHECK | SPDK_DIF_FLAGS_REFTAG_CHECK, 1127 0, 0, 0, 0, 0, &dif_opts); 1128 rdma_req.req.dif_enabled = true; 1129 rtransport.transport.opts.io_unit_size = (data_bs + md_size) * 4; 1130 sgl->unkeyed.length = 2 * sizeof(struct spdk_nvme_sgl_descriptor); 1131 1132 for (i = 0; i < 2; i++) { 1133 sgl_desc[i].keyed.type = SPDK_NVME_SGL_TYPE_KEYED_DATA_BLOCK; 1134 sgl_desc[i].keyed.subtype = SPDK_NVME_SGL_SUBTYPE_ADDRESS; 1135 sgl_desc[i].keyed.length = data_bs * 4; 1136 sgl_desc[i].address = 0x4000 + i * data_bs * 4; 1137 sgl_desc[i].keyed.key = 0x44; 1138 } 1139 1140 rc = nvmf_rdma_request_parse_sgl(&rtransport, &device, &rdma_req); 1141 1142 CU_ASSERT(rc == 0); 1143 CU_ASSERT(rdma_req.req.data_from_pool == true); 1144 CU_ASSERT(rdma_req.req.length == data_bs * 4 * 2); 1145 CU_ASSERT(rdma_req.req.dif.orig_length == rdma_req.req.length); 1146 CU_ASSERT(rdma_req.req.dif.elba_length == (data_bs + md_size) * 4 * 2); 1147 CU_ASSERT(rdma_req.data.wr.num_sge == 1); 1148 CU_ASSERT(rdma_req.data.wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1149 CU_ASSERT(rdma_req.data.wr.sg_list[0].length == data_bs * 4); 1150 1151 CU_ASSERT(rdma_req.data.wr.wr.rdma.rkey == 0x44); 1152 CU_ASSERT(rdma_req.data.wr.wr.rdma.remote_addr == 0x4000); 1153 CU_ASSERT(rdma_req.data.wr.next == &data->wr); 1154 CU_ASSERT(data->wr.wr.rdma.rkey == 0x44); 1155 CU_ASSERT(data->wr.wr.rdma.remote_addr == 0x4000 + data_bs * 4); 1156 CU_ASSERT(data->wr.num_sge == 1); 1157 CU_ASSERT(data->wr.sg_list[0].addr == (uintptr_t)(data_buffer)); 1158 CU_ASSERT(data->wr.sg_list[0].length == data_bs * 4); 1159 1160 CU_ASSERT(data->wr.next == &rdma_req.rsp.wr); 1161 reset_nvmf_rdma_request(&rdma_req); 1162 } 1163 1164 static void 1165 test_nvmf_rdma_opts_init(void) 1166 { 1167 struct spdk_nvmf_transport_opts opts = {}; 1168 1169 nvmf_rdma_opts_init(&opts); 1170 CU_ASSERT(opts.max_queue_depth == SPDK_NVMF_RDMA_DEFAULT_MAX_QUEUE_DEPTH); 1171 CU_ASSERT(opts.max_qpairs_per_ctrlr == SPDK_NVMF_RDMA_DEFAULT_MAX_QPAIRS_PER_CTRLR); 1172 CU_ASSERT(opts.in_capsule_data_size == SPDK_NVMF_RDMA_DEFAULT_IN_CAPSULE_DATA_SIZE); 1173 CU_ASSERT(opts.max_io_size == SPDK_NVMF_RDMA_DEFAULT_MAX_IO_SIZE); 1174 CU_ASSERT(opts.io_unit_size == SPDK_NVMF_RDMA_MIN_IO_BUFFER_SIZE); 1175 CU_ASSERT(opts.max_aq_depth == SPDK_NVMF_RDMA_DEFAULT_AQ_DEPTH); 1176 CU_ASSERT(opts.num_shared_buffers == SPDK_NVMF_RDMA_DEFAULT_NUM_SHARED_BUFFERS); 1177 CU_ASSERT(opts.buf_cache_size == SPDK_NVMF_RDMA_DEFAULT_BUFFER_CACHE_SIZE); 1178 CU_ASSERT(opts.dif_insert_or_strip == SPDK_NVMF_RDMA_DIF_INSERT_OR_STRIP); 1179 CU_ASSERT(opts.abort_timeout_sec == SPDK_NVMF_RDMA_DEFAULT_ABORT_TIMEOUT_SEC); 1180 CU_ASSERT(opts.transport_specific == NULL); 1181 } 1182 1183 static void 1184 test_nvmf_rdma_request_free_data(void) 1185 { 1186 struct spdk_nvmf_rdma_request rdma_req = {}; 1187 struct spdk_nvmf_rdma_transport rtransport = {}; 1188 struct spdk_nvmf_rdma_request_data *next_request_data = NULL; 1189 1190 MOCK_CLEAR(spdk_mempool_get); 1191 rtransport.data_wr_pool = spdk_mempool_create("spdk_nvmf_rdma_wr_data", 1192 SPDK_NVMF_MAX_SGL_ENTRIES, 1193 sizeof(struct spdk_nvmf_rdma_request_data), 1194 SPDK_MEMPOOL_DEFAULT_CACHE_SIZE, 1195 SPDK_ENV_SOCKET_ID_ANY); 1196 next_request_data = spdk_mempool_get(rtransport.data_wr_pool); 1197 SPDK_CU_ASSERT_FATAL(((struct test_mempool *)rtransport.data_wr_pool)->count == 1198 SPDK_NVMF_MAX_SGL_ENTRIES - 1); 1199 next_request_data->wr.wr_id = (uint64_t)&rdma_req.data_wr; 1200 next_request_data->wr.num_sge = 2; 1201 next_request_data->wr.next = NULL; 1202 rdma_req.data.wr.next = &next_request_data->wr; 1203 rdma_req.data.wr.wr_id = (uint64_t)&rdma_req.data_wr; 1204 rdma_req.data.wr.num_sge = 2; 1205 rdma_req.transfer_wr = &rdma_req.data.wr; 1206 1207 nvmf_rdma_request_free_data(&rdma_req, &rtransport); 1208 /* Check if next_request_data put into memory pool */ 1209 CU_ASSERT(((struct test_mempool *)rtransport.data_wr_pool)->count == SPDK_NVMF_MAX_SGL_ENTRIES); 1210 CU_ASSERT(rdma_req.data.wr.num_sge == 0); 1211 1212 spdk_mempool_free(rtransport.data_wr_pool); 1213 } 1214 1215 static void 1216 test_nvmf_rdma_update_ibv_state(void) 1217 { 1218 struct spdk_nvmf_rdma_qpair rqpair = {}; 1219 struct spdk_rdma_qp rdma_qp = {}; 1220 struct ibv_qp qp = {}; 1221 int rc = 0; 1222 1223 rqpair.rdma_qp = &rdma_qp; 1224 1225 /* Case 1: Failed to get updated RDMA queue pair state */ 1226 rqpair.ibv_state = IBV_QPS_INIT; 1227 rqpair.rdma_qp->qp = NULL; 1228 1229 rc = nvmf_rdma_update_ibv_state(&rqpair); 1230 CU_ASSERT(rc == IBV_QPS_ERR + 1); 1231 1232 /* Case 2: Bad state updated */ 1233 rqpair.rdma_qp->qp = &qp; 1234 qp.state = IBV_QPS_ERR; 1235 rc = nvmf_rdma_update_ibv_state(&rqpair); 1236 CU_ASSERT(rqpair.ibv_state == 10); 1237 CU_ASSERT(rc == IBV_QPS_ERR + 1); 1238 1239 /* Case 3: Pass */ 1240 qp.state = IBV_QPS_INIT; 1241 rc = nvmf_rdma_update_ibv_state(&rqpair); 1242 CU_ASSERT(rqpair.ibv_state == IBV_QPS_INIT); 1243 CU_ASSERT(rc == IBV_QPS_INIT); 1244 } 1245 1246 static void 1247 test_nvmf_rdma_resources_create(void) 1248 { 1249 static struct spdk_nvmf_rdma_resources *rdma_resource; 1250 struct spdk_nvmf_rdma_resource_opts opts = {}; 1251 struct spdk_nvmf_rdma_qpair qpair = {}; 1252 struct spdk_nvmf_rdma_recv *recv = NULL; 1253 struct spdk_nvmf_rdma_request *req = NULL; 1254 const int DEPTH = 128; 1255 1256 opts.max_queue_depth = DEPTH; 1257 opts.in_capsule_data_size = 4096; 1258 opts.shared = true; 1259 opts.qpair = &qpair; 1260 1261 rdma_resource = nvmf_rdma_resources_create(&opts); 1262 CU_ASSERT(rdma_resource != NULL); 1263 /* Just check first and last entry */ 1264 recv = &rdma_resource->recvs[0]; 1265 req = &rdma_resource->reqs[0]; 1266 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1267 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs)); 1268 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[0]); 1269 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[0])); 1270 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1271 CU_ASSERT(recv->wr.num_sge == 2); 1272 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[0].rdma_wr); 1273 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[0].sgl); 1274 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[0]); 1275 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[0]); 1276 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[0])); 1277 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1278 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1279 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].rsp_wr); 1280 CU_ASSERT(req->rsp.wr.next == NULL); 1281 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1282 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1283 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[0].rsp.sgl); 1284 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1285 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1286 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&rdma_resource->reqs[0].data_wr); 1287 CU_ASSERT(req->data.wr.next == NULL); 1288 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1289 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[0].data.sgl); 1290 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1291 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1292 1293 recv = &rdma_resource->recvs[DEPTH - 1]; 1294 req = &rdma_resource->reqs[DEPTH - 1]; 1295 CU_ASSERT(recv->rdma_wr.type == RDMA_WR_TYPE_RECV); 1296 CU_ASSERT((uintptr_t)recv->buf == (uintptr_t)(rdma_resource->bufs + 1297 (DEPTH - 1) * 4096)); 1298 CU_ASSERT(recv->sgl[0].addr == (uintptr_t)&rdma_resource->cmds[DEPTH - 1]); 1299 CU_ASSERT(recv->sgl[0].length == sizeof(rdma_resource->cmds[DEPTH - 1])); 1300 CU_ASSERT(recv->sgl[0].lkey == RDMA_UT_LKEY); 1301 CU_ASSERT(recv->wr.num_sge == 2); 1302 CU_ASSERT(recv->wr.wr_id == (uintptr_t)&rdma_resource->recvs[DEPTH - 1].rdma_wr); 1303 CU_ASSERT(recv->wr.sg_list == rdma_resource->recvs[DEPTH - 1].sgl); 1304 CU_ASSERT(req->req.rsp == &rdma_resource->cpls[DEPTH - 1]); 1305 CU_ASSERT(req->rsp.sgl[0].addr == (uintptr_t)&rdma_resource->cpls[DEPTH - 1]); 1306 CU_ASSERT(req->rsp.sgl[0].length == sizeof(rdma_resource->cpls[DEPTH - 1])); 1307 CU_ASSERT(req->rsp.sgl[0].lkey == RDMA_UT_LKEY); 1308 CU_ASSERT(req->rsp_wr.type == RDMA_WR_TYPE_SEND); 1309 CU_ASSERT(req->rsp.wr.wr_id == (uintptr_t)&req->rsp_wr); 1310 CU_ASSERT(req->rsp.wr.next == NULL); 1311 CU_ASSERT(req->rsp.wr.opcode == IBV_WR_SEND); 1312 CU_ASSERT(req->rsp.wr.send_flags == IBV_SEND_SIGNALED); 1313 CU_ASSERT(req->rsp.wr.sg_list == rdma_resource->reqs[DEPTH - 1].rsp.sgl); 1314 CU_ASSERT(req->rsp.wr.num_sge == NVMF_DEFAULT_RSP_SGE); 1315 CU_ASSERT(req->data_wr.type == RDMA_WR_TYPE_DATA); 1316 CU_ASSERT(req->data.wr.wr_id == (uintptr_t)&req->data_wr); 1317 CU_ASSERT(req->data.wr.next == NULL); 1318 CU_ASSERT(req->data.wr.send_flags == IBV_SEND_SIGNALED); 1319 CU_ASSERT(req->data.wr.sg_list == rdma_resource->reqs[DEPTH - 1].data.sgl); 1320 CU_ASSERT(req->data.wr.num_sge == SPDK_NVMF_MAX_SGL_ENTRIES); 1321 CU_ASSERT(req->state == RDMA_REQUEST_STATE_FREE); 1322 1323 nvmf_rdma_resources_destroy(rdma_resource); 1324 } 1325 1326 static void 1327 test_nvmf_rdma_qpair_compare(void) 1328 { 1329 struct spdk_nvmf_rdma_qpair rqpair1 = {}, rqpair2 = {}; 1330 1331 rqpair1.qp_num = 0; 1332 rqpair2.qp_num = UINT32_MAX; 1333 1334 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair1, &rqpair2) < 0); 1335 CU_ASSERT(nvmf_rdma_qpair_compare(&rqpair2, &rqpair1) > 0); 1336 } 1337 1338 static void 1339 test_nvmf_rdma_resize_cq(void) 1340 { 1341 int rc = -1; 1342 int tnum_wr = 0; 1343 int tnum_cqe = 0; 1344 struct spdk_nvmf_rdma_qpair rqpair = {}; 1345 struct spdk_nvmf_rdma_poller rpoller = {}; 1346 struct spdk_nvmf_rdma_device rdevice = {}; 1347 struct ibv_context ircontext = {}; 1348 struct ibv_device idevice = {}; 1349 1350 rdevice.context = &ircontext; 1351 rqpair.poller = &rpoller; 1352 ircontext.device = &idevice; 1353 1354 /* Test1: Current capacity support required size. */ 1355 rpoller.required_num_wr = 10; 1356 rpoller.num_cqe = 20; 1357 rqpair.max_queue_depth = 2; 1358 tnum_wr = rpoller.required_num_wr; 1359 tnum_cqe = rpoller.num_cqe; 1360 1361 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1362 CU_ASSERT(rc == 0); 1363 CU_ASSERT(rpoller.required_num_wr == 10 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1364 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1365 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1366 1367 /* Test2: iWARP doesn't support CQ resize. */ 1368 tnum_wr = rpoller.required_num_wr; 1369 tnum_cqe = rpoller.num_cqe; 1370 idevice.transport_type = IBV_TRANSPORT_IWARP; 1371 1372 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1373 CU_ASSERT(rc == -1); 1374 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1375 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1376 1377 1378 /* Test3: RDMA CQE requirement exceeds device max_cqe limitation. */ 1379 tnum_wr = rpoller.required_num_wr; 1380 tnum_cqe = rpoller.num_cqe; 1381 idevice.transport_type = IBV_TRANSPORT_UNKNOWN; 1382 rdevice.attr.max_cqe = 3; 1383 1384 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1385 CU_ASSERT(rc == -1); 1386 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1387 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1388 1389 /* Test4: RDMA CQ resize failed. */ 1390 tnum_wr = rpoller.required_num_wr; 1391 tnum_cqe = rpoller.num_cqe; 1392 idevice.transport_type = IBV_TRANSPORT_IB; 1393 rdevice.attr.max_cqe = 30; 1394 MOCK_SET(ibv_resize_cq, -1); 1395 1396 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1397 CU_ASSERT(rc == -1); 1398 CU_ASSERT(rpoller.required_num_wr == tnum_wr); 1399 CU_ASSERT(rpoller.num_cqe == tnum_cqe); 1400 1401 /* Test5: RDMA CQ resize success. rsize = MIN(MAX(num_cqe * 2, required_num_wr), device->attr.max_cqe). */ 1402 tnum_wr = rpoller.required_num_wr; 1403 tnum_cqe = rpoller.num_cqe; 1404 MOCK_SET(ibv_resize_cq, 0); 1405 1406 rc = nvmf_rdma_resize_cq(&rqpair, &rdevice); 1407 CU_ASSERT(rc == 0); 1408 CU_ASSERT(rpoller.num_cqe = 30); 1409 CU_ASSERT(rpoller.required_num_wr == 18 + MAX_WR_PER_QP(rqpair.max_queue_depth)); 1410 CU_ASSERT(rpoller.required_num_wr > tnum_wr); 1411 CU_ASSERT(rpoller.num_cqe > tnum_cqe); 1412 } 1413 1414 int 1415 main(int argc, char **argv) 1416 { 1417 CU_pSuite suite = NULL; 1418 unsigned int num_failures; 1419 1420 CU_initialize_registry(); 1421 1422 suite = CU_add_suite("nvmf", NULL, NULL); 1423 1424 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl); 1425 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_process); 1426 CU_ADD_TEST(suite, test_nvmf_rdma_get_optimal_poll_group); 1427 CU_ADD_TEST(suite, test_spdk_nvmf_rdma_request_parse_sgl_with_md); 1428 CU_ADD_TEST(suite, test_nvmf_rdma_opts_init); 1429 CU_ADD_TEST(suite, test_nvmf_rdma_request_free_data); 1430 CU_ADD_TEST(suite, test_nvmf_rdma_update_ibv_state); 1431 CU_ADD_TEST(suite, test_nvmf_rdma_resources_create); 1432 CU_ADD_TEST(suite, test_nvmf_rdma_qpair_compare); 1433 CU_ADD_TEST(suite, test_nvmf_rdma_resize_cq); 1434 1435 num_failures = spdk_ut_run_tests(argc, argv, NULL); 1436 CU_cleanup_registry(); 1437 return num_failures; 1438 } 1439