xref: /spdk/test/unit/lib/nvmf/ctrlr_bdev.c/ctrlr_bdev_ut.c (revision 7506a7aa53d239f533af3bc768f0d2af55e735fe)
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright (c) Intel Corporation.
5  *   All rights reserved.
6  *   Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
7  *
8  *   Redistribution and use in source and binary forms, with or without
9  *   modification, are permitted provided that the following conditions
10  *   are met:
11  *
12  *     * Redistributions of source code must retain the above copyright
13  *       notice, this list of conditions and the following disclaimer.
14  *     * Redistributions in binary form must reproduce the above copyright
15  *       notice, this list of conditions and the following disclaimer in
16  *       the documentation and/or other materials provided with the
17  *       distribution.
18  *     * Neither the name of Intel Corporation nor the names of its
19  *       contributors may be used to endorse or promote products derived
20  *       from this software without specific prior written permission.
21  *
22  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include "spdk/stdinc.h"
36 
37 #include "spdk_cunit.h"
38 
39 #include "spdk_internal/mock.h"
40 #include "thread/thread_internal.h"
41 
42 #include "nvmf/ctrlr_bdev.c"
43 
44 #include "spdk/bdev_module.h"
45 
46 SPDK_LOG_REGISTER_COMPONENT(nvmf)
47 
48 DEFINE_STUB(spdk_nvmf_request_complete, int, (struct spdk_nvmf_request *req), -1);
49 
50 DEFINE_STUB(spdk_bdev_get_name, const char *, (const struct spdk_bdev *bdev), "test");
51 
52 DEFINE_STUB(spdk_bdev_get_physical_block_size, uint32_t,
53 	    (const struct spdk_bdev *bdev), 4096);
54 
55 DEFINE_STUB(nvmf_ctrlr_process_admin_cmd, int, (struct spdk_nvmf_request *req), 0);
56 
57 DEFINE_STUB(spdk_bdev_comparev_blocks, int, (struct spdk_bdev_desc *desc,
58 		struct spdk_io_channel *ch, struct iovec *iov, int iovcnt,
59 		uint64_t offset_blocks, uint64_t num_blocks,
60 		spdk_bdev_io_completion_cb cb, void *cb_arg), 0);
61 
62 DEFINE_STUB(spdk_bdev_nvme_admin_passthru, int,
63 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
64 	     const struct spdk_nvme_cmd *cmd, void *buf, size_t nbytes,
65 	     spdk_bdev_io_completion_cb cb, void *cb_arg), 0);
66 
67 DEFINE_STUB(spdk_bdev_abort, int,
68 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
69 	     void *bio_cb_arg, spdk_bdev_io_completion_cb cb, void *cb_arg), 0);
70 
71 DEFINE_STUB_V(spdk_bdev_io_get_iovec,
72 	      (struct spdk_bdev_io *bdev_io, struct iovec **iovp, int *iovcntp));
73 
74 uint32_t
75 spdk_bdev_get_optimal_io_boundary(const struct spdk_bdev *bdev)
76 {
77 	return bdev->optimal_io_boundary;
78 }
79 
80 uint32_t
81 spdk_bdev_get_md_size(const struct spdk_bdev *bdev)
82 {
83 	return bdev->md_len;
84 }
85 
86 bool
87 spdk_bdev_is_md_interleaved(const struct spdk_bdev *bdev)
88 {
89 	return (bdev->md_len != 0) && bdev->md_interleave;
90 }
91 
92 enum spdk_dif_type spdk_bdev_get_dif_type(const struct spdk_bdev *bdev)
93 {
94 	if (bdev->md_len != 0) {
95 		return bdev->dif_type;
96 	} else {
97 		return SPDK_DIF_DISABLE;
98 	}
99 }
100 
101 bool
102 spdk_bdev_is_dif_head_of_md(const struct spdk_bdev *bdev)
103 {
104 	if (spdk_bdev_get_dif_type(bdev) != SPDK_DIF_DISABLE) {
105 		return bdev->dif_is_head_of_md;
106 	} else {
107 		return false;
108 	}
109 }
110 
111 uint32_t
112 spdk_bdev_get_data_block_size(const struct spdk_bdev *bdev)
113 {
114 	if (spdk_bdev_is_md_interleaved(bdev)) {
115 		return bdev->blocklen - bdev->md_len;
116 	} else {
117 		return bdev->blocklen;
118 	}
119 }
120 
121 uint16_t
122 spdk_bdev_get_acwu(const struct spdk_bdev *bdev)
123 {
124 	return bdev->acwu;
125 }
126 
127 uint32_t
128 spdk_bdev_get_block_size(const struct spdk_bdev *bdev)
129 {
130 	return bdev->blocklen;
131 }
132 
133 uint64_t
134 spdk_bdev_get_num_blocks(const struct spdk_bdev *bdev)
135 {
136 	return bdev->blockcnt;
137 }
138 
139 DEFINE_STUB(spdk_bdev_comparev_and_writev_blocks, int,
140 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
141 	     struct iovec *compare_iov, int compare_iovcnt,
142 	     struct iovec *write_iov, int write_iovcnt,
143 	     uint64_t offset_blocks, uint64_t num_blocks,
144 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
145 	    0);
146 
147 DEFINE_STUB(nvmf_ctrlr_process_io_cmd, int, (struct spdk_nvmf_request *req), 0);
148 
149 DEFINE_STUB_V(spdk_bdev_io_get_nvme_fused_status, (const struct spdk_bdev_io *bdev_io,
150 		uint32_t *cdw0, int *cmp_sct, int *cmp_sc, int *wr_sct, int *wr_sc));
151 
152 DEFINE_STUB(spdk_bdev_is_dif_check_enabled, bool,
153 	    (const struct spdk_bdev *bdev, enum spdk_dif_check_type check_type), false);
154 
155 DEFINE_STUB(spdk_bdev_get_io_channel, struct spdk_io_channel *,
156 	    (struct spdk_bdev_desc *desc), NULL);
157 
158 DEFINE_STUB(spdk_bdev_flush_blocks, int,
159 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
160 	     uint64_t offset_blocks, uint64_t num_blocks,
161 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
162 	    0);
163 
164 DEFINE_STUB(spdk_bdev_unmap_blocks, int,
165 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
166 	     uint64_t offset_blocks, uint64_t num_blocks,
167 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
168 	    0);
169 
170 DEFINE_STUB(spdk_bdev_io_type_supported, bool,
171 	    (struct spdk_bdev *bdev, enum spdk_bdev_io_type io_type), false);
172 
173 DEFINE_STUB(spdk_bdev_queue_io_wait, int,
174 	    (struct spdk_bdev *bdev, struct spdk_io_channel *ch,
175 	     struct spdk_bdev_io_wait_entry *entry),
176 	    0);
177 
178 DEFINE_STUB(spdk_bdev_write_blocks, int,
179 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch, void *buf,
180 	     uint64_t offset_blocks, uint64_t num_blocks,
181 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
182 	    0);
183 
184 DEFINE_STUB(spdk_bdev_writev_blocks, int,
185 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
186 	     struct iovec *iov, int iovcnt, uint64_t offset_blocks, uint64_t num_blocks,
187 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
188 	    0);
189 
190 DEFINE_STUB(spdk_bdev_read_blocks, int,
191 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch, void *buf,
192 	     uint64_t offset_blocks, uint64_t num_blocks,
193 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
194 	    0);
195 
196 DEFINE_STUB(spdk_bdev_readv_blocks, int,
197 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
198 	     struct iovec *iov, int iovcnt, uint64_t offset_blocks, uint64_t num_blocks,
199 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
200 	    0);
201 
202 DEFINE_STUB(spdk_bdev_write_zeroes_blocks, int,
203 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
204 	     uint64_t offset_blocks, uint64_t num_blocks,
205 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
206 	    0);
207 
208 DEFINE_STUB(spdk_bdev_nvme_io_passthru, int,
209 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
210 	     const struct spdk_nvme_cmd *cmd, void *buf, size_t nbytes,
211 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
212 	    0);
213 
214 DEFINE_STUB_V(spdk_bdev_free_io, (struct spdk_bdev_io *bdev_io));
215 
216 DEFINE_STUB(spdk_nvmf_subsystem_get_nqn, const char *,
217 	    (const struct spdk_nvmf_subsystem *subsystem), NULL);
218 
219 DEFINE_STUB(spdk_bdev_zcopy_start, int,
220 	    (struct spdk_bdev_desc *desc, struct spdk_io_channel *ch,
221 	     struct iovec *iov, int iovcnt,
222 	     uint64_t offset_blocks, uint64_t num_blocks,
223 	     bool populate,
224 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
225 	    0);
226 
227 DEFINE_STUB(spdk_bdev_zcopy_end, int,
228 	    (struct spdk_bdev_io *bdev_io, bool commit,
229 	     spdk_bdev_io_completion_cb cb, void *cb_arg),
230 	    0);
231 
232 struct spdk_nvmf_ns *
233 spdk_nvmf_subsystem_get_ns(struct spdk_nvmf_subsystem *subsystem, uint32_t nsid)
234 {
235 	abort();
236 	return NULL;
237 }
238 
239 struct spdk_nvmf_ns *
240 spdk_nvmf_subsystem_get_first_ns(struct spdk_nvmf_subsystem *subsystem)
241 {
242 	abort();
243 	return NULL;
244 }
245 
246 struct spdk_nvmf_ns *
247 spdk_nvmf_subsystem_get_next_ns(struct spdk_nvmf_subsystem *subsystem, struct spdk_nvmf_ns *prev_ns)
248 {
249 	abort();
250 	return NULL;
251 }
252 
253 int
254 spdk_dif_ctx_init(struct spdk_dif_ctx *ctx, uint32_t block_size, uint32_t md_size,
255 		  bool md_interleave, bool dif_loc, enum spdk_dif_type dif_type, uint32_t dif_flags,
256 		  uint32_t init_ref_tag, uint16_t apptag_mask, uint16_t app_tag,
257 		  uint32_t data_offset, uint16_t guard_seed)
258 {
259 	ctx->block_size = block_size;
260 	ctx->md_size = md_size;
261 	ctx->init_ref_tag = init_ref_tag;
262 
263 	return 0;
264 }
265 
266 static uint32_t g_bdev_nvme_status_cdw0;
267 static uint32_t g_bdev_nvme_status_sct = SPDK_NVME_SCT_GENERIC;
268 static uint32_t g_bdev_nvme_status_sc = SPDK_NVME_SC_SUCCESS;
269 
270 static void reset_bdev_nvme_status(void)
271 {
272 	g_bdev_nvme_status_cdw0 = 0;
273 	g_bdev_nvme_status_sct = SPDK_NVME_SCT_GENERIC;
274 	g_bdev_nvme_status_sc = SPDK_NVME_SC_SUCCESS;
275 }
276 
277 void spdk_bdev_io_get_nvme_status(const struct spdk_bdev_io *bdev_io, uint32_t *cdw0, int *sct,
278 				  int *sc)
279 {
280 	*cdw0 = g_bdev_nvme_status_cdw0;
281 	*sct = g_bdev_nvme_status_sct;
282 	*sc = g_bdev_nvme_status_sc;
283 }
284 
285 static void
286 test_get_rw_params(void)
287 {
288 	struct spdk_nvme_cmd cmd = {0};
289 	uint64_t lba;
290 	uint64_t count;
291 
292 	lba = 0;
293 	count = 0;
294 	to_le64(&cmd.cdw10, 0x1234567890ABCDEF);
295 	to_le32(&cmd.cdw12, 0x9875 | SPDK_NVME_IO_FLAGS_FORCE_UNIT_ACCESS);
296 	nvmf_bdev_ctrlr_get_rw_params(&cmd, &lba, &count);
297 	CU_ASSERT(lba == 0x1234567890ABCDEF);
298 	CU_ASSERT(count == 0x9875 + 1); /* NOTE: this field is 0's based, hence the +1 */
299 }
300 
301 static void
302 test_lba_in_range(void)
303 {
304 	/* Trivial cases (no overflow) */
305 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 0, 1) == true);
306 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 0, 1000) == true);
307 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 0, 1001) == false);
308 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 1, 999) == true);
309 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 1, 1000) == false);
310 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 999, 1) == true);
311 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 1000, 1) == false);
312 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(1000, 1001, 1) == false);
313 
314 	/* Overflow edge cases */
315 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(UINT64_MAX, 0, UINT64_MAX) == true);
316 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(UINT64_MAX, 1, UINT64_MAX) == false);
317 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(UINT64_MAX, UINT64_MAX - 1, 1) == true);
318 	CU_ASSERT(nvmf_bdev_ctrlr_lba_in_range(UINT64_MAX, UINT64_MAX, 1) == false);
319 }
320 
321 static void
322 test_get_dif_ctx(void)
323 {
324 	struct spdk_bdev bdev = {};
325 	struct spdk_nvme_cmd cmd = {};
326 	struct spdk_dif_ctx dif_ctx = {};
327 	bool ret;
328 
329 	bdev.md_len = 0;
330 
331 	ret = nvmf_bdev_ctrlr_get_dif_ctx(&bdev, &cmd, &dif_ctx);
332 	CU_ASSERT(ret == false);
333 
334 	to_le64(&cmd.cdw10, 0x1234567890ABCDEF);
335 	bdev.blocklen = 520;
336 	bdev.md_len = 8;
337 
338 	ret = nvmf_bdev_ctrlr_get_dif_ctx(&bdev, &cmd, &dif_ctx);
339 	CU_ASSERT(ret == true);
340 	CU_ASSERT(dif_ctx.block_size = 520);
341 	CU_ASSERT(dif_ctx.md_size == 8);
342 	CU_ASSERT(dif_ctx.init_ref_tag == 0x90ABCDEF);
343 }
344 
345 static void
346 test_spdk_nvmf_bdev_ctrlr_compare_and_write_cmd(void)
347 {
348 	int rc;
349 	struct spdk_bdev bdev = {};
350 	struct spdk_bdev_desc *desc = NULL;
351 	struct spdk_io_channel ch = {};
352 
353 	struct spdk_nvmf_request cmp_req = {};
354 	union nvmf_c2h_msg cmp_rsp = {};
355 
356 	struct spdk_nvmf_request write_req = {};
357 	union nvmf_c2h_msg write_rsp = {};
358 
359 	struct spdk_nvmf_qpair qpair = {};
360 
361 	struct spdk_nvme_cmd cmp_cmd = {};
362 	struct spdk_nvme_cmd write_cmd = {};
363 
364 	struct spdk_nvmf_ctrlr ctrlr = {};
365 	struct spdk_nvmf_subsystem subsystem = {};
366 	struct spdk_nvmf_ns ns = {};
367 	struct spdk_nvmf_ns *subsys_ns[1] = {};
368 
369 	struct spdk_nvmf_poll_group group = {};
370 	struct spdk_nvmf_subsystem_poll_group sgroups = {};
371 	struct spdk_nvmf_subsystem_pg_ns_info ns_info = {};
372 
373 	bdev.blocklen = 512;
374 	bdev.blockcnt = 10;
375 	ns.bdev = &bdev;
376 
377 	subsystem.id = 0;
378 	subsystem.max_nsid = 1;
379 	subsys_ns[0] = &ns;
380 	subsystem.ns = (struct spdk_nvmf_ns **)&subsys_ns;
381 
382 	/* Enable controller */
383 	ctrlr.vcprop.cc.bits.en = 1;
384 	ctrlr.subsys = &subsystem;
385 
386 	group.num_sgroups = 1;
387 	sgroups.num_ns = 1;
388 	sgroups.ns_info = &ns_info;
389 	group.sgroups = &sgroups;
390 
391 	qpair.ctrlr = &ctrlr;
392 	qpair.group = &group;
393 
394 	cmp_req.qpair = &qpair;
395 	cmp_req.cmd = (union nvmf_h2c_msg *)&cmp_cmd;
396 	cmp_req.rsp = &cmp_rsp;
397 
398 	cmp_cmd.nsid = 1;
399 	cmp_cmd.fuse = SPDK_NVME_CMD_FUSE_FIRST;
400 	cmp_cmd.opc = SPDK_NVME_OPC_COMPARE;
401 
402 	write_req.qpair = &qpair;
403 	write_req.cmd = (union nvmf_h2c_msg *)&write_cmd;
404 	write_req.rsp = &write_rsp;
405 
406 	write_cmd.nsid = 1;
407 	write_cmd.fuse = SPDK_NVME_CMD_FUSE_SECOND;
408 	write_cmd.opc = SPDK_NVME_OPC_WRITE;
409 
410 	/* 1. SUCCESS */
411 	cmp_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
412 	cmp_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
413 
414 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
415 	write_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
416 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen;
417 
418 	rc = nvmf_bdev_ctrlr_compare_and_write_cmd(&bdev, desc, &ch, &cmp_req, &write_req);
419 
420 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
421 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sct == 0);
422 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sc == 0);
423 	CU_ASSERT(write_rsp.nvme_cpl.status.sct == 0);
424 	CU_ASSERT(write_rsp.nvme_cpl.status.sc == 0);
425 
426 	/* 2. Fused command start lba / num blocks mismatch */
427 	cmp_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
428 	cmp_cmd.cdw12 = 2;	/* NLB: CDW12 bits 15:00, 0's based */
429 
430 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
431 	write_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
432 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen;
433 
434 	rc = nvmf_bdev_ctrlr_compare_and_write_cmd(&bdev, desc, &ch, &cmp_req, &write_req);
435 
436 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
437 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sct == 0);
438 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sc == 0);
439 	CU_ASSERT(write_rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
440 	CU_ASSERT(write_rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_FIELD);
441 
442 	/* 3. SPDK_NVME_SC_LBA_OUT_OF_RANGE */
443 	cmp_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
444 	cmp_cmd.cdw12 = 100;	/* NLB: CDW12 bits 15:00, 0's based */
445 
446 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
447 	write_cmd.cdw12 = 100;	/* NLB: CDW12 bits 15:00, 0's based */
448 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen;
449 
450 	rc = nvmf_bdev_ctrlr_compare_and_write_cmd(&bdev, desc, &ch, &cmp_req, &write_req);
451 
452 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
453 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sct == 0);
454 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sc == 0);
455 	CU_ASSERT(write_rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
456 	CU_ASSERT(write_rsp.nvme_cpl.status.sc == SPDK_NVME_SC_LBA_OUT_OF_RANGE);
457 
458 	/* 4. SPDK_NVME_SC_DATA_SGL_LENGTH_INVALID */
459 	cmp_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
460 	cmp_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
461 
462 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
463 	write_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
464 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen - 1;
465 
466 	rc = nvmf_bdev_ctrlr_compare_and_write_cmd(&bdev, desc, &ch, &cmp_req, &write_req);
467 
468 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
469 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sct == 0);
470 	CU_ASSERT(cmp_rsp.nvme_cpl.status.sc == 0);
471 	CU_ASSERT(write_rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
472 	CU_ASSERT(write_rsp.nvme_cpl.status.sc == SPDK_NVME_SC_DATA_SGL_LENGTH_INVALID);
473 }
474 
475 static void
476 test_nvmf_bdev_ctrlr_identify_ns(void)
477 {
478 	struct spdk_nvmf_ns ns = {};
479 	struct spdk_nvme_ns_data nsdata = {};
480 	struct spdk_bdev bdev = {};
481 	uint8_t ns_g_id[16] = "abcdefgh";
482 	uint8_t eui64[8] = "12345678";
483 
484 	ns.bdev = &bdev;
485 	ns.ptpl_file = (void *)0xDEADBEEF;
486 	memcpy(ns.opts.nguid, ns_g_id, 16);
487 	memcpy(ns.opts.eui64, eui64, 8);
488 
489 	bdev.blockcnt = 10;
490 	bdev.acwu = 1;
491 	bdev.md_len = 512;
492 	bdev.dif_type = SPDK_DIF_TYPE1;
493 	bdev.blocklen = 4096;
494 	bdev.md_interleave = 0;
495 	bdev.optimal_io_boundary = BDEV_IO_NUM_CHILD_IOV;
496 	bdev.dif_is_head_of_md = true;
497 
498 	nvmf_bdev_ctrlr_identify_ns(&ns, &nsdata, false);
499 	CU_ASSERT(nsdata.nsze == 10);
500 	CU_ASSERT(nsdata.ncap == 10);
501 	CU_ASSERT(nsdata.nuse == 10);
502 	CU_ASSERT(nsdata.nlbaf == 0);
503 	CU_ASSERT(nsdata.flbas.format == 0);
504 	CU_ASSERT(nsdata.nacwu == 0);
505 	CU_ASSERT(nsdata.lbaf[0].lbads == spdk_u32log2(4096));
506 	CU_ASSERT(nsdata.lbaf[0].ms == 512);
507 	CU_ASSERT(nsdata.dpc.pit1 == 1);
508 	CU_ASSERT(nsdata.dps.pit == SPDK_NVME_FMT_NVM_PROTECTION_TYPE1);
509 	CU_ASSERT(nsdata.noiob == BDEV_IO_NUM_CHILD_IOV);
510 	CU_ASSERT(nsdata.nmic.can_share == 1);
511 	CU_ASSERT(nsdata.nsrescap.rescap.persist == 1);
512 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive == 1);
513 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access == 1);
514 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive_reg_only == 1);
515 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access_reg_only == 1);
516 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive_all_reg == 1);
517 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access_all_reg == 1);
518 	CU_ASSERT(nsdata.nsrescap.rescap.ignore_existing_key == 1);
519 	CU_ASSERT(nsdata.flbas.extended == 1);
520 	CU_ASSERT(nsdata.mc.extended == 1);
521 	CU_ASSERT(nsdata.mc.pointer == 0);
522 	CU_ASSERT(nsdata.dps.md_start == true);
523 	CU_ASSERT(!strncmp(nsdata.nguid, ns_g_id, 16));
524 	CU_ASSERT(!strncmp((uint8_t *)&nsdata.eui64, eui64, 8));
525 
526 	memset(&nsdata, 0, sizeof(nsdata));
527 	nvmf_bdev_ctrlr_identify_ns(&ns, &nsdata, true);
528 	CU_ASSERT(nsdata.nsze == 10);
529 	CU_ASSERT(nsdata.ncap == 10);
530 	CU_ASSERT(nsdata.nuse == 10);
531 	CU_ASSERT(nsdata.nlbaf == 0);
532 	CU_ASSERT(nsdata.flbas.format == 0);
533 	CU_ASSERT(nsdata.nacwu == 0);
534 	CU_ASSERT(nsdata.lbaf[0].lbads == spdk_u32log2(4096));
535 	CU_ASSERT(nsdata.noiob == BDEV_IO_NUM_CHILD_IOV);
536 	CU_ASSERT(nsdata.nmic.can_share == 1);
537 	CU_ASSERT(nsdata.lbaf[0].ms == 0);
538 	CU_ASSERT(nsdata.nsrescap.rescap.persist == 1);
539 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive == 1);
540 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access == 1);
541 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive_reg_only == 1);
542 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access_reg_only == 1);
543 	CU_ASSERT(nsdata.nsrescap.rescap.write_exclusive_all_reg == 1);
544 	CU_ASSERT(nsdata.nsrescap.rescap.exclusive_access_all_reg == 1);
545 	CU_ASSERT(nsdata.nsrescap.rescap.ignore_existing_key == 1);
546 	CU_ASSERT(!strncmp(nsdata.nguid, ns_g_id, 16));
547 	CU_ASSERT(!strncmp((uint8_t *)&nsdata.eui64, eui64, 8));
548 }
549 
550 static void
551 test_nvmf_bdev_ctrlr_zcopy_start(void)
552 {
553 	int rc;
554 	struct spdk_bdev bdev = {};
555 	struct spdk_bdev_desc *desc = NULL;
556 	struct spdk_io_channel ch = {};
557 
558 	struct spdk_nvmf_request write_req = {};
559 	union nvmf_c2h_msg write_rsp = {};
560 
561 	struct spdk_nvmf_qpair qpair = {};
562 
563 	struct spdk_nvme_cmd write_cmd = {};
564 
565 	struct spdk_nvmf_ctrlr ctrlr = {};
566 	struct spdk_nvmf_subsystem subsystem = {};
567 	struct spdk_nvmf_ns ns = {};
568 	struct spdk_nvmf_ns *subsys_ns[1] = {};
569 
570 	struct spdk_nvmf_poll_group group = {};
571 	struct spdk_nvmf_subsystem_poll_group sgroups = {};
572 	struct spdk_nvmf_subsystem_pg_ns_info ns_info = {};
573 
574 	bdev.blocklen = 512;
575 	bdev.blockcnt = 10;
576 	ns.bdev = &bdev;
577 
578 	subsystem.id = 0;
579 	subsystem.max_nsid = 1;
580 	subsys_ns[0] = &ns;
581 	subsystem.ns = (struct spdk_nvmf_ns **)&subsys_ns;
582 
583 	/* Enable controller */
584 	ctrlr.vcprop.cc.bits.en = 1;
585 	ctrlr.subsys = &subsystem;
586 
587 	group.num_sgroups = 1;
588 	sgroups.num_ns = 1;
589 	sgroups.ns_info = &ns_info;
590 	group.sgroups = &sgroups;
591 
592 	qpair.ctrlr = &ctrlr;
593 	qpair.group = &group;
594 
595 	write_req.qpair = &qpair;
596 	write_req.cmd = (union nvmf_h2c_msg *)&write_cmd;
597 	write_req.rsp = &write_rsp;
598 
599 	write_cmd.nsid = 1;
600 	write_cmd.opc = SPDK_NVME_OPC_WRITE;
601 
602 	/* 1. SUCCESS */
603 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
604 	write_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
605 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen;
606 
607 	rc = nvmf_bdev_ctrlr_zcopy_start(&bdev, desc, &ch, &write_req);
608 
609 	CU_ASSERT_EQUAL(rc, SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
610 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sct, SPDK_NVME_SCT_GENERIC);
611 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sc, SPDK_NVME_SC_SUCCESS);
612 
613 	/* 2. SPDK_NVME_SC_LBA_OUT_OF_RANGE */
614 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
615 	write_cmd.cdw12 = 100;	/* NLB: CDW12 bits 15:00, 0's based */
616 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen;
617 
618 	rc = nvmf_bdev_ctrlr_zcopy_start(&bdev, desc, &ch, &write_req);
619 
620 	CU_ASSERT_EQUAL(rc, SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
621 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sct, SPDK_NVME_SCT_GENERIC);
622 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sc, SPDK_NVME_SC_LBA_OUT_OF_RANGE);
623 
624 	/* 3. SPDK_NVME_SC_DATA_SGL_LENGTH_INVALID */
625 	write_cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
626 	write_cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
627 	write_req.length = (write_cmd.cdw12 + 1) * bdev.blocklen - 1;
628 
629 	rc = nvmf_bdev_ctrlr_zcopy_start(&bdev, desc, &ch, &write_req);
630 
631 	CU_ASSERT_EQUAL(rc, SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
632 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sct, SPDK_NVME_SCT_GENERIC);
633 	CU_ASSERT_EQUAL(write_rsp.nvme_cpl.status.sc, SPDK_NVME_SC_DATA_SGL_LENGTH_INVALID);
634 }
635 
636 static void
637 test_nvmf_bdev_ctrlr_cmd(void)
638 {
639 	int rc;
640 	struct spdk_bdev bdev = {};
641 	struct spdk_io_channel ch = {};
642 	struct spdk_nvmf_request req = {};
643 	struct spdk_nvmf_qpair qpair = {};
644 	union nvmf_h2c_msg cmd = {};
645 	union nvmf_c2h_msg rsp = {};
646 
647 	req.cmd = &cmd;
648 	req.rsp = &rsp;
649 	req.qpair = &qpair;
650 	req.length = 4096;
651 	bdev.blocklen = 512;
652 	bdev.blockcnt = 3;
653 	cmd.nvme_cmd.cdw10 = 0;
654 	cmd.nvme_cmd.cdw12 = 2;
655 
656 	/* Compare status asynchronous */
657 	rc = nvmf_bdev_ctrlr_compare_cmd(&bdev, NULL, &ch, &req);
658 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
659 
660 	/* SLBA out of range */
661 	cmd.nvme_cmd.cdw10 = 3;
662 
663 	rc = nvmf_bdev_ctrlr_compare_cmd(&bdev, NULL, &ch, &req);
664 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
665 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
666 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_LBA_OUT_OF_RANGE);
667 
668 	/* SGL length invalid */
669 	cmd.nvme_cmd.cdw10 = 0;
670 	req.length = 512;
671 	memset(&rsp, 0, sizeof(rsp));
672 
673 	rc = nvmf_bdev_ctrlr_compare_cmd(&bdev, NULL, &ch, &req);
674 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
675 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
676 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_DATA_SGL_LENGTH_INVALID);
677 
678 	/* Device error */
679 	req.length = 4096;
680 	memset(&rsp, 0, sizeof(rsp));
681 	MOCK_SET(spdk_bdev_comparev_blocks, -1);
682 
683 	rc = nvmf_bdev_ctrlr_compare_cmd(&bdev, NULL, &ch, &req);
684 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
685 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
686 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INTERNAL_DEVICE_ERROR);
687 
688 	/* bdev not support flush */
689 	MOCK_SET(spdk_bdev_io_type_supported, false);
690 	memset(&rsp, 0, sizeof(rsp));
691 
692 	rc = nvmf_bdev_ctrlr_flush_cmd(&bdev, NULL, &ch, &req);
693 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
694 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
695 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_SUCCESS);
696 
697 	/*  Flush error */
698 	MOCK_SET(spdk_bdev_io_type_supported, true);
699 	MOCK_SET(spdk_bdev_flush_blocks, -1);
700 	memset(&rsp, 0, sizeof(rsp));
701 
702 	rc = nvmf_bdev_ctrlr_flush_cmd(&bdev, NULL, &ch, &req);
703 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
704 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
705 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INTERNAL_DEVICE_ERROR);
706 
707 	/* Flush blocks status asynchronous */
708 	MOCK_SET(spdk_bdev_flush_blocks, 0);
709 
710 	rc = nvmf_bdev_ctrlr_flush_cmd(&bdev, NULL, &ch, &req);
711 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
712 	MOCK_CLEAR(spdk_bdev_io_type_supported);
713 	MOCK_CLEAR(spdk_bdev_flush_blocks);
714 
715 	/* Write zeroes blocks status asynchronous */
716 	rc = nvmf_bdev_ctrlr_write_zeroes_cmd(&bdev, NULL, &ch, &req);
717 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
718 
719 	/* SLBA out of range */
720 	cmd.nvme_cmd.cdw10 = 3;
721 	memset(&rsp, 0, sizeof(rsp));
722 
723 	rc = nvmf_bdev_ctrlr_write_zeroes_cmd(&bdev, NULL, &ch, &req);
724 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
725 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
726 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_LBA_OUT_OF_RANGE);
727 
728 	/* Write block error */
729 	MOCK_SET(spdk_bdev_write_zeroes_blocks, -1);
730 	cmd.nvme_cmd.cdw10 = 0;
731 	memset(&rsp, 0, sizeof(rsp));
732 
733 	rc = nvmf_bdev_ctrlr_write_zeroes_cmd(&bdev, NULL, &ch, &req);
734 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
735 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
736 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INTERNAL_DEVICE_ERROR);
737 }
738 
739 static void
740 test_nvmf_bdev_ctrlr_read_write_cmd(void)
741 {
742 	struct spdk_bdev bdev = {};
743 	struct spdk_nvmf_request req = {};
744 	union nvmf_c2h_msg rsp = {};
745 	union nvmf_h2c_msg cmd = {};
746 	int rc;
747 
748 	req.cmd = &cmd;
749 	req.rsp = &rsp;
750 
751 	/* Read two blocks, block size 4096 */
752 	cmd.nvme_cmd.cdw12 = 1;
753 	bdev.blockcnt = 100;
754 	bdev.blocklen = 4096;
755 	req.length = 8192;
756 	req.zcopy_phase = NVMF_ZCOPY_PHASE_NONE;
757 
758 	rc = nvmf_bdev_ctrlr_read_cmd(&bdev, NULL, NULL, &req);
759 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
760 
761 	/* Write two blocks, block size 4096 */
762 	cmd.nvme_cmd.cdw12 = 1;
763 	bdev.blockcnt = 100;
764 	bdev.blocklen = 4096;
765 	req.length = 8192;
766 	req.zcopy_phase = NVMF_ZCOPY_PHASE_NONE;
767 
768 	rc = nvmf_bdev_ctrlr_write_cmd(&bdev, NULL, NULL, &req);
769 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
770 }
771 
772 static void
773 test_nvmf_bdev_ctrlr_nvme_passthru(void)
774 {
775 	int rc;
776 	struct spdk_bdev bdev = {};
777 	struct spdk_bdev_desc *desc = NULL;
778 	struct spdk_io_channel ch = {};
779 	struct spdk_nvmf_qpair qpair = {};
780 	struct spdk_nvmf_poll_group group = {};
781 
782 	struct spdk_nvmf_request req = {};
783 	union nvmf_c2h_msg rsp = {};
784 	struct spdk_nvme_cmd cmd = {};
785 	struct spdk_bdev_io bdev_io;
786 
787 	bdev.blocklen = 512;
788 	bdev.blockcnt = 10;
789 
790 	qpair.group = &group;
791 
792 	req.qpair = &qpair;
793 	req.cmd = (union nvmf_h2c_msg *)&cmd;
794 	req.rsp = &rsp;
795 
796 	cmd.nsid = 1;
797 	cmd.opc = 0xFF;
798 
799 	cmd.cdw10 = 1;	/* SLBA: CDW10 and CDW11 */
800 	cmd.cdw12 = 1;	/* NLB: CDW12 bits 15:00, 0's based */
801 
802 	/* NVME_IO success */
803 	memset(&rsp, 0, sizeof(rsp));
804 	rc = nvmf_bdev_ctrlr_nvme_passthru_io(&bdev, desc, &ch, &req);
805 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
806 	nvmf_bdev_ctrlr_complete_cmd(&bdev_io, true, &req);
807 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
808 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_SUCCESS);
809 
810 	/* NVME_IO fail */
811 	memset(&rsp, 0, sizeof(rsp));
812 	rc = nvmf_bdev_ctrlr_nvme_passthru_io(&bdev, desc, &ch, &req);
813 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
814 	g_bdev_nvme_status_sc = SPDK_NVME_SC_INTERNAL_DEVICE_ERROR;
815 	nvmf_bdev_ctrlr_complete_cmd(&bdev_io, false, &req);
816 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
817 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INTERNAL_DEVICE_ERROR);
818 	reset_bdev_nvme_status();
819 
820 	/* NVME_IO not supported */
821 	memset(&rsp, 0, sizeof(rsp));
822 	MOCK_SET(spdk_bdev_nvme_io_passthru, -ENOTSUP);
823 	rc = nvmf_bdev_ctrlr_nvme_passthru_io(&bdev, desc, &ch, &req);
824 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
825 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
826 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_OPCODE);
827 	CU_ASSERT(rsp.nvme_cpl.status.dnr == 1);
828 
829 	/* NVME_IO no channel - queue IO */
830 	memset(&rsp, 0, sizeof(rsp));
831 	MOCK_SET(spdk_bdev_nvme_io_passthru, -ENOMEM);
832 	rc = nvmf_bdev_ctrlr_nvme_passthru_io(&bdev, desc, &ch, &req);
833 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
834 	CU_ASSERT(group.stat.pending_bdev_io == 1);
835 
836 	MOCK_SET(spdk_bdev_nvme_io_passthru, 0);
837 
838 	/* NVME_ADMIN success */
839 	memset(&rsp, 0, sizeof(rsp));
840 	rc = spdk_nvmf_bdev_ctrlr_nvme_passthru_admin(&bdev, desc, &ch, &req, NULL);
841 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
842 	nvmf_bdev_ctrlr_complete_admin_cmd(&bdev_io, true, &req);
843 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
844 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_SUCCESS);
845 
846 	/* NVME_ADMIN fail */
847 	memset(&rsp, 0, sizeof(rsp));
848 	rc = spdk_nvmf_bdev_ctrlr_nvme_passthru_admin(&bdev, desc, &ch, &req, NULL);
849 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
850 	g_bdev_nvme_status_sc = SPDK_NVME_SC_INTERNAL_DEVICE_ERROR;
851 	nvmf_bdev_ctrlr_complete_admin_cmd(&bdev_io, true, &req);
852 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
853 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INTERNAL_DEVICE_ERROR);
854 	reset_bdev_nvme_status();
855 
856 	/* NVME_ADMIN not supported */
857 	memset(&rsp, 0, sizeof(rsp));
858 	MOCK_SET(spdk_bdev_nvme_admin_passthru, -ENOTSUP);
859 	rc = spdk_nvmf_bdev_ctrlr_nvme_passthru_admin(&bdev, desc, &ch, &req, NULL);
860 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_COMPLETE);
861 	CU_ASSERT(rsp.nvme_cpl.status.sct == SPDK_NVME_SCT_GENERIC);
862 	CU_ASSERT(rsp.nvme_cpl.status.sc == SPDK_NVME_SC_INVALID_OPCODE);
863 	CU_ASSERT(rsp.nvme_cpl.status.dnr == 1);
864 
865 	/* NVME_ADMIN no channel - queue IO */
866 	memset(&rsp, 0, sizeof(rsp));
867 	MOCK_SET(spdk_bdev_nvme_admin_passthru, -ENOMEM);
868 	rc = spdk_nvmf_bdev_ctrlr_nvme_passthru_admin(&bdev, desc, &ch, &req, NULL);
869 	CU_ASSERT(rc == SPDK_NVMF_REQUEST_EXEC_STATUS_ASYNCHRONOUS);
870 	CU_ASSERT(group.stat.pending_bdev_io == 2);
871 
872 	MOCK_SET(spdk_bdev_nvme_admin_passthru, 0);
873 }
874 
875 int main(int argc, char **argv)
876 {
877 	CU_pSuite	suite = NULL;
878 	unsigned int	num_failures;
879 
880 	CU_set_error_action(CUEA_ABORT);
881 	CU_initialize_registry();
882 
883 	suite = CU_add_suite("nvmf", NULL, NULL);
884 
885 	CU_ADD_TEST(suite, test_get_rw_params);
886 	CU_ADD_TEST(suite, test_lba_in_range);
887 	CU_ADD_TEST(suite, test_get_dif_ctx);
888 	CU_ADD_TEST(suite, test_nvmf_bdev_ctrlr_identify_ns);
889 	CU_ADD_TEST(suite, test_spdk_nvmf_bdev_ctrlr_compare_and_write_cmd);
890 	CU_ADD_TEST(suite, test_nvmf_bdev_ctrlr_zcopy_start);
891 	CU_ADD_TEST(suite, test_nvmf_bdev_ctrlr_cmd);
892 	CU_ADD_TEST(suite, test_nvmf_bdev_ctrlr_read_write_cmd);
893 	CU_ADD_TEST(suite, test_nvmf_bdev_ctrlr_nvme_passthru);
894 
895 	CU_basic_set_mode(CU_BRM_VERBOSE);
896 	CU_basic_run_tests();
897 	num_failures = CU_get_number_of_failures();
898 	CU_cleanup_registry();
899 	return num_failures;
900 }
901