1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) Intel Corporation. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include "spdk/stdinc.h" 35 36 #include "CUnit/Basic.h" 37 38 #include "ioat/ioat.c" 39 40 void * 41 spdk_dma_zmalloc(size_t size, size_t align, uint64_t *phys_addr) 42 { 43 return calloc(1, size); 44 } 45 46 void spdk_dma_free(void *buf) 47 { 48 free(buf); 49 } 50 51 uint64_t spdk_vtophys(void *buf) 52 { 53 return (uint64_t)buf; 54 } 55 56 void spdk_delay_us(unsigned int us) 57 { 58 59 } 60 61 int 62 spdk_pci_ioat_enumerate(spdk_pci_enum_cb enum_cb, void *enum_ctx) 63 { 64 return -1; 65 } 66 67 int 68 spdk_pci_device_map_bar(struct spdk_pci_device *dev, uint32_t bar, 69 void **mapped_addr, uint64_t *phys_addr, uint64_t *size) 70 { 71 *mapped_addr = NULL; 72 *phys_addr = 0; 73 *size = 0; 74 return 0; 75 } 76 77 int 78 spdk_pci_device_unmap_bar(struct spdk_pci_device *dev, uint32_t bar, void *addr) 79 { 80 return 0; 81 } 82 83 int 84 spdk_pci_device_cfg_read32(struct spdk_pci_device *dev, uint32_t *value, 85 uint32_t offset) 86 { 87 *value = 0xFFFFFFFFu; 88 return 0; 89 } 90 91 int 92 spdk_pci_device_cfg_write32(struct spdk_pci_device *dev, uint32_t value, 93 uint32_t offset) 94 { 95 return 0; 96 } 97 98 static void ioat_state_check(void) 99 { 100 /* 101 * CHANSTS's STATUS field is 3 bits (8 possible values), but only has 5 valid states: 102 * ACTIVE 0x0 103 * IDLE 0x1 104 * SUSPENDED 0x2 105 * HALTED 0x3 106 * ARMED 0x4 107 */ 108 109 CU_ASSERT(is_ioat_active(0) == 1); /* ACTIVE */ 110 CU_ASSERT(is_ioat_active(1) == 0); /* IDLE */ 111 CU_ASSERT(is_ioat_active(2) == 0); /* SUSPENDED */ 112 CU_ASSERT(is_ioat_active(3) == 0); /* HALTED */ 113 CU_ASSERT(is_ioat_active(4) == 0); /* ARMED */ 114 CU_ASSERT(is_ioat_active(5) == 0); /* reserved */ 115 CU_ASSERT(is_ioat_active(6) == 0); /* reserved */ 116 CU_ASSERT(is_ioat_active(7) == 0); /* reserved */ 117 118 CU_ASSERT(is_ioat_idle(0) == 0); /* ACTIVE */ 119 CU_ASSERT(is_ioat_idle(1) == 1); /* IDLE */ 120 CU_ASSERT(is_ioat_idle(2) == 0); /* SUSPENDED */ 121 CU_ASSERT(is_ioat_idle(3) == 0); /* HALTED */ 122 CU_ASSERT(is_ioat_idle(4) == 0); /* ARMED */ 123 CU_ASSERT(is_ioat_idle(5) == 0); /* reserved */ 124 CU_ASSERT(is_ioat_idle(6) == 0); /* reserved */ 125 CU_ASSERT(is_ioat_idle(7) == 0); /* reserved */ 126 127 CU_ASSERT(is_ioat_suspended(0) == 0); /* ACTIVE */ 128 CU_ASSERT(is_ioat_suspended(1) == 0); /* IDLE */ 129 CU_ASSERT(is_ioat_suspended(2) == 1); /* SUSPENDED */ 130 CU_ASSERT(is_ioat_suspended(3) == 0); /* HALTED */ 131 CU_ASSERT(is_ioat_suspended(4) == 0); /* ARMED */ 132 CU_ASSERT(is_ioat_suspended(5) == 0); /* reserved */ 133 CU_ASSERT(is_ioat_suspended(6) == 0); /* reserved */ 134 CU_ASSERT(is_ioat_suspended(7) == 0); /* reserved */ 135 136 CU_ASSERT(is_ioat_halted(0) == 0); /* ACTIVE */ 137 CU_ASSERT(is_ioat_halted(1) == 0); /* IDLE */ 138 CU_ASSERT(is_ioat_halted(2) == 0); /* SUSPENDED */ 139 CU_ASSERT(is_ioat_halted(3) == 1); /* HALTED */ 140 CU_ASSERT(is_ioat_halted(4) == 0); /* ARMED */ 141 CU_ASSERT(is_ioat_halted(5) == 0); /* reserved */ 142 CU_ASSERT(is_ioat_halted(6) == 0); /* reserved */ 143 CU_ASSERT(is_ioat_halted(7) == 0); /* reserved */ 144 } 145 146 int main(int argc, char **argv) 147 { 148 CU_pSuite suite = NULL; 149 unsigned int num_failures; 150 151 if (CU_initialize_registry() != CUE_SUCCESS) { 152 return CU_get_error(); 153 } 154 155 suite = CU_add_suite("ioat", NULL, NULL); 156 if (suite == NULL) { 157 CU_cleanup_registry(); 158 return CU_get_error(); 159 } 160 161 if ( 162 CU_add_test(suite, "ioat_state_check", ioat_state_check) == NULL) { 163 CU_cleanup_registry(); 164 return CU_get_error(); 165 } 166 167 CU_basic_set_mode(CU_BRM_VERBOSE); 168 CU_basic_run_tests(); 169 num_failures = CU_get_number_of_failures(); 170 CU_cleanup_registry(); 171 return num_failures; 172 } 173