1@@ -68,60 +68,6 @@ void rte_pci_unmap_device(struct rte_pci_device *dev); 2 */ 3 void rte_pci_dump(FILE *f); 4 5-/** 6- * Check whether this device has a PCI capability list. 7- * 8- * @param dev 9- * A pointer to rte_pci_device structure. 10- * 11- * @return 12- * true/false 13- */ 14-__rte_experimental 15-bool rte_pci_has_capability_list(const struct rte_pci_device *dev); 16- 17-/** 18- * Find device's PCI capability. 19- * 20- * @param dev 21- * A pointer to rte_pci_device structure. 22- * 23- * @param cap 24- * Capability to be found, which can be any from 25- * RTE_PCI_CAP_ID_*, defined in librte_pci. 26- * 27- * @return 28- * > 0: The offset of the next matching capability structure 29- * within the device's PCI configuration space. 30- * < 0: An error in PCI config space read. 31- * = 0: Device does not support it. 32- */ 33-__rte_experimental 34-off_t rte_pci_find_capability(const struct rte_pci_device *dev, uint8_t cap); 35- 36-/** 37- * Find device's PCI capability starting from a previous offset in PCI 38- * configuration space. 39- * 40- * @param dev 41- * A pointer to rte_pci_device structure. 42- * 43- * @param cap 44- * Capability to be found, which can be any from 45- * RTE_PCI_CAP_ID_*, defined in librte_pci. 46- * @param offset 47- * An offset in the PCI configuration space from which the capability is 48- * looked for. 49- * 50- * @return 51- * > 0: The offset of the next matching capability structure 52- * within the device's PCI configuration space. 53- * < 0: An error in PCI config space read. 54- * = 0: Device does not support it. 55- */ 56-__rte_experimental 57-off_t rte_pci_find_next_capability(const struct rte_pci_device *dev, uint8_t cap, off_t offset); 58- 59 /** 60 * Find device's extended PCI capability. 61 * 62@@ -139,7 +85,7 @@ off_t rte_pci_find_next_capability(const struct rte_pci_device *dev, uint8_t cap 63 * = 0: Device does not support it. 64 */ 65 __rte_experimental 66-off_t rte_pci_find_ext_capability(const struct rte_pci_device *dev, uint32_t cap); 67+off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap); 68 69 /** 70 * Enables/Disables Bus Master for device's PCI command register. 71@@ -153,24 +99,7 @@ off_t rte_pci_find_ext_capability(const struct rte_pci_device *dev, uint32_t cap 72 * 0 on success, -1 on error in PCI config space read/write. 73 */ 74 __rte_experimental 75-int rte_pci_set_bus_master(const struct rte_pci_device *dev, bool enable); 76- 77-/** 78- * Enable/Disable PASID (Process Address Space ID). 79- * 80- * @param dev 81- * A pointer to a rte_pci_device structure. 82- * @param offset 83- * Offset of the PASID external capability structure. 84- * @param enable 85- * Flag to enable or disable PASID. 86- * 87- * @return 88- * 0 on success, -1 on error in PCI config space read/write. 89- */ 90-__rte_internal 91-int rte_pci_pasid_set_state(const struct rte_pci_device *dev, 92- off_t offset, bool enable); 93+int rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable); 94 95 /** 96 * Read PCI config space. 97@@ -206,54 +135,6 @@ int rte_pci_read_config(const struct rte_pci_device *device, 98 int rte_pci_write_config(const struct rte_pci_device *device, 99 const void *buf, size_t len, off_t offset); 100 101-/** 102- * @warning 103- * @b EXPERIMENTAL: this API may change without prior notice. 104- * 105- * Read from a MMIO PCI resource. 106- * 107- * @param device 108- * A pointer to a rte_pci_device structure describing the device 109- * to use. 110- * @param bar 111- * Index of the IO PCI resource we want to access. 112- * @param buf 113- * A data buffer where the bytes should be read into. 114- * @param len 115- * The length of the data buffer. 116- * @param offset 117- * The offset into MMIO space described by @bar. 118- * @return 119- * Number of bytes read on success, negative on error. 120- */ 121-__rte_experimental 122-int rte_pci_mmio_read(const struct rte_pci_device *device, int bar, 123- void *buf, size_t len, off_t offset); 124- 125-/** 126- * @warning 127- * @b EXPERIMENTAL: this API may change without prior notice. 128- * 129- * Write to a MMIO PCI resource. 130- * 131- * @param device 132- * A pointer to a rte_pci_device structure describing the device 133- * to use. 134- * @param bar 135- * Index of the IO PCI resource we want to access. 136- * @param buf 137- * A data buffer containing the bytes should be written. 138- * @param len 139- * The length of the data buffer. 140- * @param offset 141- * The offset into MMIO space described by @bar. 142- * @return 143- * Number of bytes written on success, negative on error. 144- */ 145-__rte_experimental 146-int rte_pci_mmio_write(const struct rte_pci_device *device, int bar, 147- const void *buf, size_t len, off_t offset); 148- 149 /** 150 * Initialize a rte_pci_ioport object for a pci device io resource. 151 * 152