1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (C) 2021 Intel Corporation. All rights reserved. 3 * Copyright (c) 2021 Mellanox Technologies LTD. All rights reserved. 4 * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 5 */ 6 7 /* 8 * NVMe over PCIe common library 9 */ 10 11 #include "spdk/stdinc.h" 12 #include "spdk/likely.h" 13 #include "spdk/string.h" 14 #include "nvme_internal.h" 15 #include "nvme_pcie_internal.h" 16 #include "spdk/trace.h" 17 18 #include "spdk_internal/trace_defs.h" 19 20 __thread struct nvme_pcie_ctrlr *g_thread_mmio_ctrlr = NULL; 21 22 static struct spdk_nvme_pcie_stat g_dummy_stat = {}; 23 24 static void nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, 25 struct nvme_tracker *tr); 26 27 static inline uint64_t 28 nvme_pcie_vtophys(struct spdk_nvme_ctrlr *ctrlr, const void *buf, uint64_t *size) 29 { 30 if (spdk_likely(ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE)) { 31 return spdk_vtophys(buf, size); 32 } else { 33 /* vfio-user address translation with IOVA=VA mode */ 34 return (uint64_t)(uintptr_t)buf; 35 } 36 } 37 38 int 39 nvme_pcie_qpair_reset(struct spdk_nvme_qpair *qpair) 40 { 41 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 42 uint32_t i; 43 44 /* all head/tail vals are set to 0 */ 45 pqpair->last_sq_tail = pqpair->sq_tail = pqpair->sq_head = pqpair->cq_head = 0; 46 47 /* 48 * First time through the completion queue, HW will set phase 49 * bit on completions to 1. So set this to 1 here, indicating 50 * we're looking for a 1 to know which entries have completed. 51 * we'll toggle the bit each time when the completion queue 52 * rolls over. 53 */ 54 pqpair->flags.phase = 1; 55 for (i = 0; i < pqpair->num_entries; i++) { 56 pqpair->cpl[i].status.p = 0; 57 } 58 59 return 0; 60 } 61 62 static void 63 nvme_qpair_construct_tracker(struct nvme_tracker *tr, uint16_t cid, uint64_t phys_addr) 64 { 65 tr->prp_sgl_bus_addr = phys_addr + offsetof(struct nvme_tracker, u.prp); 66 tr->cid = cid; 67 tr->req = NULL; 68 } 69 70 static void * 71 nvme_pcie_ctrlr_alloc_cmb(struct spdk_nvme_ctrlr *ctrlr, uint64_t size, uint64_t alignment, 72 uint64_t *phys_addr) 73 { 74 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 75 uintptr_t addr; 76 77 if (pctrlr->cmb.mem_register_addr != NULL) { 78 /* BAR is mapped for data */ 79 return NULL; 80 } 81 82 addr = (uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.current_offset; 83 addr = (addr + (alignment - 1)) & ~(alignment - 1); 84 85 /* CMB may only consume part of the BAR, calculate accordingly */ 86 if (addr + size > ((uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.size)) { 87 SPDK_ERRLOG("Tried to allocate past valid CMB range!\n"); 88 return NULL; 89 } 90 *phys_addr = pctrlr->cmb.bar_pa + addr - (uintptr_t)pctrlr->cmb.bar_va; 91 92 pctrlr->cmb.current_offset = (addr + size) - (uintptr_t)pctrlr->cmb.bar_va; 93 94 return (void *)addr; 95 } 96 97 int 98 nvme_pcie_qpair_construct(struct spdk_nvme_qpair *qpair, 99 const struct spdk_nvme_io_qpair_opts *opts) 100 { 101 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 102 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 103 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 104 struct nvme_tracker *tr; 105 uint16_t i; 106 uint16_t num_trackers; 107 size_t page_align = sysconf(_SC_PAGESIZE); 108 size_t queue_align, queue_len; 109 uint32_t flags = SPDK_MALLOC_DMA; 110 uint64_t sq_paddr = 0; 111 uint64_t cq_paddr = 0; 112 113 if (opts) { 114 pqpair->sq_vaddr = opts->sq.vaddr; 115 pqpair->cq_vaddr = opts->cq.vaddr; 116 sq_paddr = opts->sq.paddr; 117 cq_paddr = opts->cq.paddr; 118 } 119 120 pqpair->retry_count = ctrlr->opts.transport_retry_count; 121 122 /* 123 * Limit the maximum number of completions to return per call to prevent wraparound, 124 * and calculate how many trackers can be submitted at once without overflowing the 125 * completion queue. 126 */ 127 pqpair->max_completions_cap = pqpair->num_entries / 4; 128 pqpair->max_completions_cap = spdk_max(pqpair->max_completions_cap, NVME_MIN_COMPLETIONS); 129 pqpair->max_completions_cap = spdk_min(pqpair->max_completions_cap, NVME_MAX_COMPLETIONS); 130 num_trackers = pqpair->num_entries - pqpair->max_completions_cap; 131 132 SPDK_INFOLOG(nvme, "max_completions_cap = %" PRIu16 " num_trackers = %" PRIu16 "\n", 133 pqpair->max_completions_cap, num_trackers); 134 135 assert(num_trackers != 0); 136 137 pqpair->sq_in_cmb = false; 138 139 if (nvme_qpair_is_admin_queue(&pqpair->qpair)) { 140 flags |= SPDK_MALLOC_SHARE; 141 } 142 143 /* cmd and cpl rings must be aligned on page size boundaries. */ 144 if (ctrlr->opts.use_cmb_sqs) { 145 pqpair->cmd = nvme_pcie_ctrlr_alloc_cmb(ctrlr, pqpair->num_entries * sizeof(struct spdk_nvme_cmd), 146 page_align, &pqpair->cmd_bus_addr); 147 if (pqpair->cmd != NULL) { 148 pqpair->sq_in_cmb = true; 149 } 150 } 151 152 if (pqpair->sq_in_cmb == false) { 153 if (pqpair->sq_vaddr) { 154 pqpair->cmd = pqpair->sq_vaddr; 155 } else { 156 /* To ensure physical address contiguity we make each ring occupy 157 * a single hugepage only. See MAX_IO_QUEUE_ENTRIES. 158 */ 159 queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cmd); 160 queue_align = spdk_max(spdk_align32pow2(queue_len), page_align); 161 pqpair->cmd = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags); 162 if (pqpair->cmd == NULL) { 163 SPDK_ERRLOG("alloc qpair_cmd failed\n"); 164 return -ENOMEM; 165 } 166 } 167 if (sq_paddr) { 168 assert(pqpair->sq_vaddr != NULL); 169 pqpair->cmd_bus_addr = sq_paddr; 170 } else { 171 pqpair->cmd_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cmd, NULL); 172 if (pqpair->cmd_bus_addr == SPDK_VTOPHYS_ERROR) { 173 SPDK_ERRLOG("spdk_vtophys(pqpair->cmd) failed\n"); 174 return -EFAULT; 175 } 176 } 177 } 178 179 if (pqpair->cq_vaddr) { 180 pqpair->cpl = pqpair->cq_vaddr; 181 } else { 182 queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cpl); 183 queue_align = spdk_max(spdk_align32pow2(queue_len), page_align); 184 pqpair->cpl = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags); 185 if (pqpair->cpl == NULL) { 186 SPDK_ERRLOG("alloc qpair_cpl failed\n"); 187 return -ENOMEM; 188 } 189 } 190 if (cq_paddr) { 191 assert(pqpair->cq_vaddr != NULL); 192 pqpair->cpl_bus_addr = cq_paddr; 193 } else { 194 pqpair->cpl_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cpl, NULL); 195 if (pqpair->cpl_bus_addr == SPDK_VTOPHYS_ERROR) { 196 SPDK_ERRLOG("spdk_vtophys(pqpair->cpl) failed\n"); 197 return -EFAULT; 198 } 199 } 200 201 pqpair->sq_tdbl = pctrlr->doorbell_base + (2 * qpair->id + 0) * pctrlr->doorbell_stride_u32; 202 pqpair->cq_hdbl = pctrlr->doorbell_base + (2 * qpair->id + 1) * pctrlr->doorbell_stride_u32; 203 204 /* 205 * Reserve space for all of the trackers in a single allocation. 206 * struct nvme_tracker must be padded so that its size is already a power of 2. 207 * This ensures the PRP list embedded in the nvme_tracker object will not span a 208 * 4KB boundary, while allowing access to trackers in tr[] via normal array indexing. 209 */ 210 pqpair->tr = spdk_zmalloc(num_trackers * sizeof(*tr), sizeof(*tr), NULL, 211 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 212 if (pqpair->tr == NULL) { 213 SPDK_ERRLOG("nvme_tr failed\n"); 214 return -ENOMEM; 215 } 216 217 TAILQ_INIT(&pqpair->free_tr); 218 TAILQ_INIT(&pqpair->outstanding_tr); 219 220 for (i = 0; i < num_trackers; i++) { 221 tr = &pqpair->tr[i]; 222 nvme_qpair_construct_tracker(tr, i, nvme_pcie_vtophys(ctrlr, tr, NULL)); 223 TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list); 224 } 225 226 nvme_pcie_qpair_reset(qpair); 227 228 return 0; 229 } 230 231 int 232 nvme_pcie_ctrlr_construct_admin_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t num_entries) 233 { 234 struct nvme_pcie_qpair *pqpair; 235 int rc; 236 237 pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 238 if (pqpair == NULL) { 239 return -ENOMEM; 240 } 241 242 pqpair->num_entries = num_entries; 243 pqpair->flags.delay_cmd_submit = 0; 244 pqpair->pcie_state = NVME_PCIE_QPAIR_READY; 245 246 ctrlr->adminq = &pqpair->qpair; 247 248 rc = nvme_qpair_init(ctrlr->adminq, 249 0, /* qpair ID */ 250 ctrlr, 251 SPDK_NVME_QPRIO_URGENT, 252 num_entries, 253 false); 254 if (rc != 0) { 255 return rc; 256 } 257 258 pqpair->stat = spdk_zmalloc(sizeof(*pqpair->stat), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, 259 SPDK_MALLOC_SHARE); 260 if (!pqpair->stat) { 261 SPDK_ERRLOG("Failed to allocate admin qpair statistics\n"); 262 return -ENOMEM; 263 } 264 265 return nvme_pcie_qpair_construct(ctrlr->adminq, NULL); 266 } 267 268 /** 269 * Note: the ctrlr_lock must be held when calling this function. 270 */ 271 void 272 nvme_pcie_qpair_insert_pending_admin_request(struct spdk_nvme_qpair *qpair, 273 struct nvme_request *req, struct spdk_nvme_cpl *cpl) 274 { 275 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 276 struct nvme_request *active_req = req; 277 struct spdk_nvme_ctrlr_process *active_proc; 278 279 /* 280 * The admin request is from another process. Move to the per 281 * process list for that process to handle it later. 282 */ 283 assert(nvme_qpair_is_admin_queue(qpair)); 284 assert(active_req->pid != getpid()); 285 286 active_proc = nvme_ctrlr_get_process(ctrlr, active_req->pid); 287 if (active_proc) { 288 /* Save the original completion information */ 289 memcpy(&active_req->cpl, cpl, sizeof(*cpl)); 290 STAILQ_INSERT_TAIL(&active_proc->active_reqs, active_req, stailq); 291 } else { 292 SPDK_ERRLOG("The owning process (pid %d) is not found. Dropping the request.\n", 293 active_req->pid); 294 295 nvme_free_request(active_req); 296 } 297 } 298 299 /** 300 * Note: the ctrlr_lock must be held when calling this function. 301 */ 302 void 303 nvme_pcie_qpair_complete_pending_admin_request(struct spdk_nvme_qpair *qpair) 304 { 305 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 306 struct nvme_request *req, *tmp_req; 307 pid_t pid = getpid(); 308 struct spdk_nvme_ctrlr_process *proc; 309 310 /* 311 * Check whether there is any pending admin request from 312 * other active processes. 313 */ 314 assert(nvme_qpair_is_admin_queue(qpair)); 315 316 proc = nvme_ctrlr_get_current_process(ctrlr); 317 if (!proc) { 318 SPDK_ERRLOG("the active process (pid %d) is not found for this controller.\n", pid); 319 assert(proc); 320 return; 321 } 322 323 STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) { 324 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq); 325 326 assert(req->pid == pid); 327 328 nvme_complete_request(req->cb_fn, req->cb_arg, qpair, req, &req->cpl); 329 nvme_free_request(req); 330 } 331 } 332 333 int 334 nvme_pcie_ctrlr_cmd_create_io_cq(struct spdk_nvme_ctrlr *ctrlr, 335 struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, 336 void *cb_arg) 337 { 338 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que); 339 struct nvme_request *req; 340 struct spdk_nvme_cmd *cmd; 341 342 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 343 if (req == NULL) { 344 return -ENOMEM; 345 } 346 347 cmd = &req->cmd; 348 cmd->opc = SPDK_NVME_OPC_CREATE_IO_CQ; 349 350 cmd->cdw10_bits.create_io_q.qid = io_que->id; 351 cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1; 352 353 cmd->cdw11_bits.create_io_cq.pc = 1; 354 cmd->dptr.prp.prp1 = pqpair->cpl_bus_addr; 355 356 return nvme_ctrlr_submit_admin_request(ctrlr, req); 357 } 358 359 int 360 nvme_pcie_ctrlr_cmd_create_io_sq(struct spdk_nvme_ctrlr *ctrlr, 361 struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, void *cb_arg) 362 { 363 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que); 364 struct nvme_request *req; 365 struct spdk_nvme_cmd *cmd; 366 367 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 368 if (req == NULL) { 369 return -ENOMEM; 370 } 371 372 cmd = &req->cmd; 373 cmd->opc = SPDK_NVME_OPC_CREATE_IO_SQ; 374 375 cmd->cdw10_bits.create_io_q.qid = io_que->id; 376 cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1; 377 cmd->cdw11_bits.create_io_sq.pc = 1; 378 cmd->cdw11_bits.create_io_sq.qprio = io_que->qprio; 379 cmd->cdw11_bits.create_io_sq.cqid = io_que->id; 380 cmd->dptr.prp.prp1 = pqpair->cmd_bus_addr; 381 382 return nvme_ctrlr_submit_admin_request(ctrlr, req); 383 } 384 385 int 386 nvme_pcie_ctrlr_cmd_delete_io_cq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 387 spdk_nvme_cmd_cb cb_fn, void *cb_arg) 388 { 389 struct nvme_request *req; 390 struct spdk_nvme_cmd *cmd; 391 392 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 393 if (req == NULL) { 394 return -ENOMEM; 395 } 396 397 cmd = &req->cmd; 398 cmd->opc = SPDK_NVME_OPC_DELETE_IO_CQ; 399 cmd->cdw10_bits.delete_io_q.qid = qpair->id; 400 401 return nvme_ctrlr_submit_admin_request(ctrlr, req); 402 } 403 404 int 405 nvme_pcie_ctrlr_cmd_delete_io_sq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 406 spdk_nvme_cmd_cb cb_fn, void *cb_arg) 407 { 408 struct nvme_request *req; 409 struct spdk_nvme_cmd *cmd; 410 411 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 412 if (req == NULL) { 413 return -ENOMEM; 414 } 415 416 cmd = &req->cmd; 417 cmd->opc = SPDK_NVME_OPC_DELETE_IO_SQ; 418 cmd->cdw10_bits.delete_io_q.qid = qpair->id; 419 420 return nvme_ctrlr_submit_admin_request(ctrlr, req); 421 } 422 423 static void 424 nvme_completion_sq_error_delete_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 425 { 426 struct spdk_nvme_qpair *qpair = arg; 427 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 428 429 if (spdk_nvme_cpl_is_error(cpl)) { 430 SPDK_ERRLOG("delete_io_cq failed!\n"); 431 } 432 433 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 434 } 435 436 static void 437 nvme_completion_create_sq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 438 { 439 struct spdk_nvme_qpair *qpair = arg; 440 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 441 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 442 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 443 int rc; 444 445 if (pqpair->flags.defer_destruction) { 446 /* This qpair was deleted by the application while the 447 * connection was still in progress. We had to wait 448 * to free the qpair resources until this outstanding 449 * command was completed. Now that we have the completion 450 * free it now. 451 */ 452 nvme_pcie_qpair_destroy(qpair); 453 return; 454 } 455 456 if (spdk_nvme_cpl_is_error(cpl)) { 457 SPDK_ERRLOG("nvme_create_io_sq failed, deleting cq!\n"); 458 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb, 459 qpair); 460 if (rc != 0) { 461 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 462 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 463 } 464 return; 465 } 466 pqpair->pcie_state = NVME_PCIE_QPAIR_READY; 467 if (ctrlr->shadow_doorbell) { 468 pqpair->shadow_doorbell.sq_tdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 0) * 469 pctrlr->doorbell_stride_u32; 470 pqpair->shadow_doorbell.cq_hdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 1) * 471 pctrlr->doorbell_stride_u32; 472 pqpair->shadow_doorbell.sq_eventidx = ctrlr->eventidx + (2 * qpair->id + 0) * 473 pctrlr->doorbell_stride_u32; 474 pqpair->shadow_doorbell.cq_eventidx = ctrlr->eventidx + (2 * qpair->id + 1) * 475 pctrlr->doorbell_stride_u32; 476 pqpair->flags.has_shadow_doorbell = 1; 477 } else { 478 pqpair->flags.has_shadow_doorbell = 0; 479 } 480 nvme_pcie_qpair_reset(qpair); 481 482 } 483 484 static void 485 nvme_completion_create_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 486 { 487 struct spdk_nvme_qpair *qpair = arg; 488 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 489 int rc; 490 491 if (pqpair->flags.defer_destruction) { 492 /* This qpair was deleted by the application while the 493 * connection was still in progress. We had to wait 494 * to free the qpair resources until this outstanding 495 * command was completed. Now that we have the completion 496 * free it now. 497 */ 498 nvme_pcie_qpair_destroy(qpair); 499 return; 500 } 501 502 if (spdk_nvme_cpl_is_error(cpl)) { 503 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 504 SPDK_ERRLOG("nvme_create_io_cq failed!\n"); 505 return; 506 } 507 508 rc = nvme_pcie_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair, nvme_completion_create_sq_cb, qpair); 509 510 if (rc != 0) { 511 SPDK_ERRLOG("Failed to send request to create_io_sq, deleting cq!\n"); 512 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb, 513 qpair); 514 if (rc != 0) { 515 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 516 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 517 } 518 return; 519 } 520 pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_SQ; 521 } 522 523 static int 524 _nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 525 uint16_t qid) 526 { 527 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 528 int rc; 529 530 /* Statistics may already be allocated in the case of controller reset */ 531 if (!pqpair->stat) { 532 if (qpair->poll_group) { 533 struct nvme_pcie_poll_group *group = SPDK_CONTAINEROF(qpair->poll_group, 534 struct nvme_pcie_poll_group, group); 535 536 pqpair->stat = &group->stats; 537 pqpair->shared_stats = true; 538 } else { 539 pqpair->stat = calloc(1, sizeof(*pqpair->stat)); 540 if (!pqpair->stat) { 541 SPDK_ERRLOG("Failed to allocate qpair statistics\n"); 542 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 543 return -ENOMEM; 544 } 545 } 546 } 547 548 549 rc = nvme_pcie_ctrlr_cmd_create_io_cq(ctrlr, qpair, nvme_completion_create_cq_cb, qpair); 550 551 if (rc != 0) { 552 SPDK_ERRLOG("Failed to send request to create_io_cq\n"); 553 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 554 return rc; 555 } 556 pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_CQ; 557 return 0; 558 } 559 560 int 561 nvme_pcie_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 562 { 563 int rc = 0; 564 565 if (!nvme_qpair_is_admin_queue(qpair)) { 566 rc = _nvme_pcie_ctrlr_create_io_qpair(ctrlr, qpair, qpair->id); 567 } else { 568 nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED); 569 } 570 571 return rc; 572 } 573 574 void 575 nvme_pcie_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 576 { 577 if (!nvme_qpair_is_admin_queue(qpair) || !ctrlr->is_disconnecting) { 578 nvme_transport_ctrlr_disconnect_qpair_done(qpair); 579 } else { 580 /* If this function is called for the admin qpair via spdk_nvme_ctrlr_reset() 581 * or spdk_nvme_ctrlr_disconnect(), initiate a Controller Level Reset. 582 * Then we can abort trackers safely because the Controller Level Reset deletes 583 * all I/O SQ/CQs. 584 */ 585 nvme_ctrlr_disable(ctrlr); 586 } 587 } 588 589 /* Used when dst points to MMIO (i.e. CMB) in a virtual machine - in these cases we must 590 * not use wide instructions because QEMU will not emulate such instructions to MMIO space. 591 * So this function ensures we only copy 8 bytes at a time. 592 */ 593 static inline void 594 nvme_pcie_copy_command_mmio(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src) 595 { 596 uint64_t *dst64 = (uint64_t *)dst; 597 const uint64_t *src64 = (const uint64_t *)src; 598 uint32_t i; 599 600 for (i = 0; i < sizeof(*dst) / 8; i++) { 601 dst64[i] = src64[i]; 602 } 603 } 604 605 static inline void 606 nvme_pcie_copy_command(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src) 607 { 608 /* dst and src are known to be non-overlapping and 64-byte aligned. */ 609 #if defined(__SSE2__) 610 __m128i *d128 = (__m128i *)dst; 611 const __m128i *s128 = (const __m128i *)src; 612 613 _mm_stream_si128(&d128[0], _mm_load_si128(&s128[0])); 614 _mm_stream_si128(&d128[1], _mm_load_si128(&s128[1])); 615 _mm_stream_si128(&d128[2], _mm_load_si128(&s128[2])); 616 _mm_stream_si128(&d128[3], _mm_load_si128(&s128[3])); 617 #else 618 *dst = *src; 619 #endif 620 } 621 622 void 623 nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr) 624 { 625 struct nvme_request *req; 626 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 627 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 628 629 req = tr->req; 630 assert(req != NULL); 631 632 spdk_trace_record(TRACE_NVME_PCIE_SUBMIT, qpair->id, 0, (uintptr_t)req, req->cb_arg, 633 (uint32_t)req->cmd.cid, (uint32_t)req->cmd.opc, 634 req->cmd.cdw10, req->cmd.cdw11, req->cmd.cdw12); 635 636 if (req->cmd.fuse) { 637 /* 638 * Keep track of the fuse operation sequence so that we ring the doorbell only 639 * after the second fuse is submitted. 640 */ 641 qpair->last_fuse = req->cmd.fuse; 642 } 643 644 /* Don't use wide instructions to copy NVMe command, this is limited by QEMU 645 * virtual NVMe controller, the maximum access width is 8 Bytes for one time. 646 */ 647 if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH) && pqpair->sq_in_cmb)) { 648 nvme_pcie_copy_command_mmio(&pqpair->cmd[pqpair->sq_tail], &req->cmd); 649 } else { 650 /* Copy the command from the tracker to the submission queue. */ 651 nvme_pcie_copy_command(&pqpair->cmd[pqpair->sq_tail], &req->cmd); 652 } 653 654 if (spdk_unlikely(++pqpair->sq_tail == pqpair->num_entries)) { 655 pqpair->sq_tail = 0; 656 } 657 658 if (spdk_unlikely(pqpair->sq_tail == pqpair->sq_head)) { 659 SPDK_ERRLOG("sq_tail is passing sq_head!\n"); 660 } 661 662 if (!pqpair->flags.delay_cmd_submit) { 663 nvme_pcie_qpair_ring_sq_doorbell(qpair); 664 } 665 } 666 667 void 668 nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr, 669 struct spdk_nvme_cpl *cpl, bool print_on_error) 670 { 671 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 672 struct nvme_request *req; 673 bool retry, error; 674 bool req_from_current_proc = true; 675 bool print_error; 676 677 req = tr->req; 678 679 spdk_trace_record(TRACE_NVME_PCIE_COMPLETE, qpair->id, 0, (uintptr_t)req, req->cb_arg, 680 (uint32_t)req->cmd.cid, (uint32_t)cpl->status_raw); 681 682 assert(req != NULL); 683 684 error = spdk_nvme_cpl_is_error(cpl); 685 retry = error && nvme_completion_is_retry(cpl) && 686 req->retries < pqpair->retry_count; 687 print_error = error && print_on_error && !qpair->ctrlr->opts.disable_error_logging; 688 689 if (print_error) { 690 spdk_nvme_qpair_print_command(qpair, &req->cmd); 691 } 692 693 if (print_error || SPDK_DEBUGLOG_FLAG_ENABLED("nvme")) { 694 spdk_nvme_qpair_print_completion(qpair, cpl); 695 } 696 697 assert(cpl->cid == req->cmd.cid); 698 699 if (retry) { 700 req->retries++; 701 nvme_pcie_qpair_submit_tracker(qpair, tr); 702 } else { 703 TAILQ_REMOVE(&pqpair->outstanding_tr, tr, tq_list); 704 705 /* Only check admin requests from different processes. */ 706 if (nvme_qpair_is_admin_queue(qpair) && req->pid != getpid()) { 707 req_from_current_proc = false; 708 nvme_pcie_qpair_insert_pending_admin_request(qpair, req, cpl); 709 } else { 710 nvme_complete_request(tr->cb_fn, tr->cb_arg, qpair, req, cpl); 711 } 712 713 if (req_from_current_proc == true) { 714 nvme_qpair_free_request(qpair, req); 715 } 716 717 tr->req = NULL; 718 719 TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list); 720 } 721 } 722 723 void 724 nvme_pcie_qpair_manual_complete_tracker(struct spdk_nvme_qpair *qpair, 725 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 726 bool print_on_error) 727 { 728 struct spdk_nvme_cpl cpl; 729 730 memset(&cpl, 0, sizeof(cpl)); 731 cpl.sqid = qpair->id; 732 cpl.cid = tr->cid; 733 cpl.status.sct = sct; 734 cpl.status.sc = sc; 735 cpl.status.dnr = dnr; 736 nvme_pcie_qpair_complete_tracker(qpair, tr, &cpl, print_on_error); 737 } 738 739 void 740 nvme_pcie_qpair_abort_trackers(struct spdk_nvme_qpair *qpair, uint32_t dnr) 741 { 742 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 743 struct nvme_tracker *tr, *temp, *last; 744 745 last = TAILQ_LAST(&pqpair->outstanding_tr, nvme_outstanding_tr_head); 746 747 /* Abort previously submitted (outstanding) trs */ 748 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, temp) { 749 if (!qpair->ctrlr->opts.disable_error_logging) { 750 SPDK_ERRLOG("aborting outstanding command\n"); 751 } 752 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC, 753 SPDK_NVME_SC_ABORTED_BY_REQUEST, dnr, true); 754 755 if (tr == last) { 756 break; 757 } 758 } 759 } 760 761 void 762 nvme_pcie_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair) 763 { 764 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 765 struct nvme_tracker *tr; 766 767 tr = TAILQ_FIRST(&pqpair->outstanding_tr); 768 while (tr != NULL) { 769 assert(tr->req != NULL); 770 if (tr->req->cmd.opc == SPDK_NVME_OPC_ASYNC_EVENT_REQUEST) { 771 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, 772 SPDK_NVME_SCT_GENERIC, SPDK_NVME_SC_ABORTED_SQ_DELETION, 0, 773 false); 774 tr = TAILQ_FIRST(&pqpair->outstanding_tr); 775 } else { 776 tr = TAILQ_NEXT(tr, tq_list); 777 } 778 } 779 } 780 781 void 782 nvme_pcie_admin_qpair_destroy(struct spdk_nvme_qpair *qpair) 783 { 784 nvme_pcie_admin_qpair_abort_aers(qpair); 785 } 786 787 void 788 nvme_pcie_qpair_abort_reqs(struct spdk_nvme_qpair *qpair, uint32_t dnr) 789 { 790 nvme_pcie_qpair_abort_trackers(qpair, dnr); 791 } 792 793 static void 794 nvme_pcie_qpair_check_timeout(struct spdk_nvme_qpair *qpair) 795 { 796 uint64_t t02; 797 struct nvme_tracker *tr, *tmp; 798 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 799 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 800 struct spdk_nvme_ctrlr_process *active_proc; 801 802 /* Don't check timeouts during controller initialization. */ 803 if (ctrlr->state != NVME_CTRLR_STATE_READY) { 804 return; 805 } 806 807 if (nvme_qpair_is_admin_queue(qpair)) { 808 active_proc = nvme_ctrlr_get_current_process(ctrlr); 809 } else { 810 active_proc = qpair->active_proc; 811 } 812 813 /* Only check timeouts if the current process has a timeout callback. */ 814 if (active_proc == NULL || active_proc->timeout_cb_fn == NULL) { 815 return; 816 } 817 818 t02 = spdk_get_ticks(); 819 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) { 820 assert(tr->req != NULL); 821 822 if (nvme_request_check_timeout(tr->req, tr->cid, active_proc, t02)) { 823 /* 824 * The requests are in order, so as soon as one has not timed out, 825 * stop iterating. 826 */ 827 break; 828 } 829 } 830 } 831 832 int32_t 833 nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_completions) 834 { 835 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 836 struct nvme_tracker *tr; 837 struct spdk_nvme_cpl *cpl, *next_cpl; 838 uint32_t num_completions = 0; 839 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 840 uint16_t next_cq_head; 841 uint8_t next_phase; 842 bool next_is_valid = false; 843 int rc; 844 845 if (spdk_unlikely(pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED)) { 846 return -ENXIO; 847 } 848 849 if (spdk_unlikely(nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING)) { 850 if (pqpair->pcie_state == NVME_PCIE_QPAIR_READY) { 851 /* It is possible that another thread set the pcie_state to 852 * QPAIR_READY, if it polled the adminq and processed the SQ 853 * completion for this qpair. So check for that condition 854 * here and then update the qpair's state to CONNECTED, since 855 * we can only set the qpair state from the qpair's thread. 856 * (Note: this fixed issue #2157.) 857 */ 858 nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED); 859 } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) { 860 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 861 return -ENXIO; 862 } else { 863 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 864 if (rc < 0) { 865 return rc; 866 } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) { 867 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 868 return -ENXIO; 869 } 870 } 871 return 0; 872 } 873 874 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 875 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 876 } 877 878 if (max_completions == 0 || max_completions > pqpair->max_completions_cap) { 879 /* 880 * max_completions == 0 means unlimited, but complete at most 881 * max_completions_cap batch of I/O at a time so that the completion 882 * queue doorbells don't wrap around. 883 */ 884 max_completions = pqpair->max_completions_cap; 885 } 886 887 pqpair->stat->polls++; 888 889 while (1) { 890 cpl = &pqpair->cpl[pqpair->cq_head]; 891 892 if (!next_is_valid && cpl->status.p != pqpair->flags.phase) { 893 break; 894 } 895 896 if (spdk_likely(pqpair->cq_head + 1 != pqpair->num_entries)) { 897 next_cq_head = pqpair->cq_head + 1; 898 next_phase = pqpair->flags.phase; 899 } else { 900 next_cq_head = 0; 901 next_phase = !pqpair->flags.phase; 902 } 903 next_cpl = &pqpair->cpl[next_cq_head]; 904 next_is_valid = (next_cpl->status.p == next_phase); 905 if (next_is_valid) { 906 __builtin_prefetch(&pqpair->tr[next_cpl->cid]); 907 } 908 909 #if defined(__PPC64__) || defined(__riscv) 910 /* 911 * This memory barrier prevents reordering of: 912 * - load after store from/to tr 913 * - load after load cpl phase and cpl cid 914 */ 915 spdk_mb(); 916 #elif defined(__aarch64__) 917 __asm volatile("dmb oshld" ::: "memory"); 918 #endif 919 920 if (spdk_unlikely(++pqpair->cq_head == pqpair->num_entries)) { 921 pqpair->cq_head = 0; 922 pqpair->flags.phase = !pqpair->flags.phase; 923 } 924 925 tr = &pqpair->tr[cpl->cid]; 926 /* Prefetch the req's STAILQ_ENTRY since we'll need to access it 927 * as part of putting the req back on the qpair's free list. 928 */ 929 __builtin_prefetch(&tr->req->stailq); 930 pqpair->sq_head = cpl->sqhd; 931 932 if (tr->req) { 933 nvme_pcie_qpair_complete_tracker(qpair, tr, cpl, true); 934 } else { 935 SPDK_ERRLOG("cpl does not map to outstanding cmd\n"); 936 spdk_nvme_qpair_print_completion(qpair, cpl); 937 assert(0); 938 } 939 940 if (++num_completions == max_completions) { 941 break; 942 } 943 } 944 945 if (num_completions > 0) { 946 pqpair->stat->completions += num_completions; 947 nvme_pcie_qpair_ring_cq_doorbell(qpair); 948 } else { 949 pqpair->stat->idle_polls++; 950 } 951 952 if (pqpair->flags.delay_cmd_submit) { 953 if (pqpair->last_sq_tail != pqpair->sq_tail) { 954 nvme_pcie_qpair_ring_sq_doorbell(qpair); 955 pqpair->last_sq_tail = pqpair->sq_tail; 956 } 957 } 958 959 if (spdk_unlikely(ctrlr->timeout_enabled)) { 960 /* 961 * User registered for timeout callback 962 */ 963 nvme_pcie_qpair_check_timeout(qpair); 964 } 965 966 /* Before returning, complete any pending admin request or 967 * process the admin qpair disconnection. 968 */ 969 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 970 nvme_pcie_qpair_complete_pending_admin_request(qpair); 971 972 if (nvme_qpair_get_state(qpair) == NVME_QPAIR_DISCONNECTING) { 973 rc = nvme_ctrlr_disable_poll(qpair->ctrlr); 974 if (rc == 0) { 975 nvme_transport_ctrlr_disconnect_qpair_done(qpair); 976 } 977 } 978 979 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 980 } 981 982 if (spdk_unlikely(pqpair->flags.has_pending_vtophys_failures)) { 983 struct nvme_tracker *tr, *tmp; 984 985 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) { 986 if (tr->bad_vtophys) { 987 tr->bad_vtophys = 0; 988 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 989 } 990 } 991 pqpair->flags.has_pending_vtophys_failures = 0; 992 } 993 994 return num_completions; 995 } 996 997 int 998 nvme_pcie_qpair_destroy(struct spdk_nvme_qpair *qpair) 999 { 1000 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1001 1002 if (nvme_qpair_is_admin_queue(qpair)) { 1003 nvme_pcie_admin_qpair_destroy(qpair); 1004 } 1005 /* 1006 * We check sq_vaddr and cq_vaddr to see if the user specified the memory 1007 * buffers when creating the I/O queue. 1008 * If the user specified them, we cannot free that memory. 1009 * Nor do we free it if it's in the CMB. 1010 */ 1011 if (!pqpair->sq_vaddr && pqpair->cmd && !pqpair->sq_in_cmb) { 1012 spdk_free(pqpair->cmd); 1013 } 1014 if (!pqpair->cq_vaddr && pqpair->cpl) { 1015 spdk_free(pqpair->cpl); 1016 } 1017 if (pqpair->tr) { 1018 spdk_free(pqpair->tr); 1019 } 1020 1021 nvme_qpair_deinit(qpair); 1022 1023 if (!pqpair->shared_stats && (qpair->active_proc == nvme_ctrlr_get_current_process(qpair->ctrlr))) { 1024 if (qpair->id) { 1025 free(pqpair->stat); 1026 } else { 1027 /* statistics of admin qpair are allocates from huge pages because 1028 * admin qpair is shared for multi-process */ 1029 spdk_free(pqpair->stat); 1030 } 1031 1032 } 1033 1034 spdk_free(pqpair); 1035 1036 return 0; 1037 } 1038 1039 struct spdk_nvme_qpair * 1040 nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid, 1041 const struct spdk_nvme_io_qpair_opts *opts) 1042 { 1043 struct nvme_pcie_qpair *pqpair; 1044 struct spdk_nvme_qpair *qpair; 1045 int rc; 1046 1047 assert(ctrlr != NULL); 1048 1049 pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, 1050 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 1051 if (pqpair == NULL) { 1052 return NULL; 1053 } 1054 1055 pqpair->num_entries = opts->io_queue_size; 1056 pqpair->flags.delay_cmd_submit = opts->delay_cmd_submit; 1057 1058 qpair = &pqpair->qpair; 1059 1060 rc = nvme_qpair_init(qpair, qid, ctrlr, opts->qprio, opts->io_queue_requests, opts->async_mode); 1061 if (rc != 0) { 1062 nvme_pcie_qpair_destroy(qpair); 1063 return NULL; 1064 } 1065 1066 rc = nvme_pcie_qpair_construct(qpair, opts); 1067 1068 if (rc != 0) { 1069 nvme_pcie_qpair_destroy(qpair); 1070 return NULL; 1071 } 1072 1073 return qpair; 1074 } 1075 1076 int 1077 nvme_pcie_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 1078 { 1079 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1080 struct nvme_completion_poll_status *status; 1081 int rc; 1082 1083 assert(ctrlr != NULL); 1084 1085 if (ctrlr->is_removed) { 1086 goto free; 1087 } 1088 1089 if (ctrlr->prepare_for_reset) { 1090 if (nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING) { 1091 pqpair->flags.defer_destruction = true; 1092 } 1093 goto clear_shadow_doorbells; 1094 } 1095 1096 /* If attempting to delete a qpair that's still being connected, we have to wait until it's 1097 * finished, so that we don't free it while it's waiting for the create cq/sq callbacks. 1098 */ 1099 while (pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_CQ || 1100 pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_SQ) { 1101 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 1102 if (rc < 0) { 1103 break; 1104 } 1105 } 1106 1107 status = calloc(1, sizeof(*status)); 1108 if (!status) { 1109 SPDK_ERRLOG("Failed to allocate status tracker\n"); 1110 goto free; 1111 } 1112 1113 /* Delete the I/O submission queue */ 1114 rc = nvme_pcie_ctrlr_cmd_delete_io_sq(ctrlr, qpair, nvme_completion_poll_cb, status); 1115 if (rc != 0) { 1116 SPDK_ERRLOG("Failed to send request to delete_io_sq with rc=%d\n", rc); 1117 free(status); 1118 goto free; 1119 } 1120 if (nvme_wait_for_completion(ctrlr->adminq, status)) { 1121 if (!status->timed_out) { 1122 free(status); 1123 } 1124 goto free; 1125 } 1126 1127 /* Now that the submission queue is deleted, the device is supposed to have 1128 * completed any outstanding I/O. Try to complete them. If they don't complete, 1129 * they'll be marked as aborted and completed below. */ 1130 if (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr)) { 1131 nvme_pcie_qpair_process_completions(qpair, 0); 1132 } 1133 1134 memset(status, 0, sizeof(*status)); 1135 /* Delete the completion queue */ 1136 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(ctrlr, qpair, nvme_completion_poll_cb, status); 1137 if (rc != 0) { 1138 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 1139 free(status); 1140 goto free; 1141 } 1142 if (nvme_wait_for_completion(ctrlr->adminq, status)) { 1143 if (!status->timed_out) { 1144 free(status); 1145 } 1146 goto free; 1147 } 1148 free(status); 1149 1150 clear_shadow_doorbells: 1151 if (pqpair->flags.has_shadow_doorbell) { 1152 *pqpair->shadow_doorbell.sq_tdbl = 0; 1153 *pqpair->shadow_doorbell.cq_hdbl = 0; 1154 *pqpair->shadow_doorbell.sq_eventidx = 0; 1155 *pqpair->shadow_doorbell.cq_eventidx = 0; 1156 } 1157 free: 1158 if (qpair->no_deletion_notification_needed == 0) { 1159 /* Abort the rest of the I/O */ 1160 nvme_pcie_qpair_abort_trackers(qpair, 1); 1161 } 1162 1163 if (!pqpair->flags.defer_destruction) { 1164 nvme_pcie_qpair_destroy(qpair); 1165 } 1166 return 0; 1167 } 1168 1169 static void 1170 nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr) 1171 { 1172 if (!qpair->in_completion_context) { 1173 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1174 1175 tr->bad_vtophys = 1; 1176 pqpair->flags.has_pending_vtophys_failures = 1; 1177 return; 1178 } 1179 1180 /* 1181 * Bad vtophys translation, so abort this request and return 1182 * immediately. 1183 */ 1184 SPDK_ERRLOG("vtophys or other payload buffer related error\n"); 1185 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC, 1186 SPDK_NVME_SC_INVALID_FIELD, 1187 1 /* do not retry */, true); 1188 } 1189 1190 /* 1191 * Append PRP list entries to describe a virtually contiguous buffer starting at virt_addr of len bytes. 1192 * 1193 * *prp_index will be updated to account for the number of PRP entries used. 1194 */ 1195 static inline int 1196 nvme_pcie_prp_list_append(struct spdk_nvme_ctrlr *ctrlr, struct nvme_tracker *tr, 1197 uint32_t *prp_index, void *virt_addr, size_t len, 1198 uint32_t page_size) 1199 { 1200 struct spdk_nvme_cmd *cmd = &tr->req->cmd; 1201 uintptr_t page_mask = page_size - 1; 1202 uint64_t phys_addr; 1203 uint32_t i; 1204 1205 SPDK_DEBUGLOG(nvme, "prp_index:%u virt_addr:%p len:%u\n", 1206 *prp_index, virt_addr, (uint32_t)len); 1207 1208 if (spdk_unlikely(((uintptr_t)virt_addr & 3) != 0)) { 1209 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1210 return -EFAULT; 1211 } 1212 1213 i = *prp_index; 1214 while (len) { 1215 uint32_t seg_len; 1216 1217 /* 1218 * prp_index 0 is stored in prp1, and the rest are stored in the prp[] array, 1219 * so prp_index == count is valid. 1220 */ 1221 if (spdk_unlikely(i > SPDK_COUNTOF(tr->u.prp))) { 1222 SPDK_ERRLOG("out of PRP entries\n"); 1223 return -EFAULT; 1224 } 1225 1226 phys_addr = nvme_pcie_vtophys(ctrlr, virt_addr, NULL); 1227 if (spdk_unlikely(phys_addr == SPDK_VTOPHYS_ERROR)) { 1228 SPDK_ERRLOG("vtophys(%p) failed\n", virt_addr); 1229 return -EFAULT; 1230 } 1231 1232 if (i == 0) { 1233 SPDK_DEBUGLOG(nvme, "prp1 = %p\n", (void *)phys_addr); 1234 cmd->dptr.prp.prp1 = phys_addr; 1235 seg_len = page_size - ((uintptr_t)virt_addr & page_mask); 1236 } else { 1237 if ((phys_addr & page_mask) != 0) { 1238 SPDK_ERRLOG("PRP %u not page aligned (%p)\n", i, virt_addr); 1239 return -EFAULT; 1240 } 1241 1242 SPDK_DEBUGLOG(nvme, "prp[%u] = %p\n", i - 1, (void *)phys_addr); 1243 tr->u.prp[i - 1] = phys_addr; 1244 seg_len = page_size; 1245 } 1246 1247 seg_len = spdk_min(seg_len, len); 1248 virt_addr += seg_len; 1249 len -= seg_len; 1250 i++; 1251 } 1252 1253 cmd->psdt = SPDK_NVME_PSDT_PRP; 1254 if (i <= 1) { 1255 cmd->dptr.prp.prp2 = 0; 1256 } else if (i == 2) { 1257 cmd->dptr.prp.prp2 = tr->u.prp[0]; 1258 SPDK_DEBUGLOG(nvme, "prp2 = %p\n", (void *)cmd->dptr.prp.prp2); 1259 } else { 1260 cmd->dptr.prp.prp2 = tr->prp_sgl_bus_addr; 1261 SPDK_DEBUGLOG(nvme, "prp2 = %p (PRP list)\n", (void *)cmd->dptr.prp.prp2); 1262 } 1263 1264 *prp_index = i; 1265 return 0; 1266 } 1267 1268 static int 1269 nvme_pcie_qpair_build_request_invalid(struct spdk_nvme_qpair *qpair, 1270 struct nvme_request *req, struct nvme_tracker *tr, bool dword_aligned) 1271 { 1272 assert(0); 1273 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1274 return -EINVAL; 1275 } 1276 1277 /** 1278 * Build PRP list describing physically contiguous payload buffer. 1279 */ 1280 static int 1281 nvme_pcie_qpair_build_contig_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1282 struct nvme_tracker *tr, bool dword_aligned) 1283 { 1284 uint32_t prp_index = 0; 1285 int rc; 1286 1287 rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, 1288 req->payload.contig_or_cb_arg + req->payload_offset, 1289 req->payload_size, qpair->ctrlr->page_size); 1290 if (rc) { 1291 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1292 } 1293 1294 return rc; 1295 } 1296 1297 /** 1298 * Build an SGL describing a physically contiguous payload buffer. 1299 * 1300 * This is more efficient than using PRP because large buffers can be 1301 * described this way. 1302 */ 1303 static int 1304 nvme_pcie_qpair_build_contig_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1305 struct nvme_tracker *tr, bool dword_aligned) 1306 { 1307 void *virt_addr; 1308 uint64_t phys_addr, mapping_length; 1309 uint32_t length; 1310 struct spdk_nvme_sgl_descriptor *sgl; 1311 uint32_t nseg = 0; 1312 1313 assert(req->payload_size != 0); 1314 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_CONTIG); 1315 1316 sgl = tr->u.sgl; 1317 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG; 1318 req->cmd.dptr.sgl1.unkeyed.subtype = 0; 1319 1320 length = req->payload_size; 1321 virt_addr = req->payload.contig_or_cb_arg + req->payload_offset; 1322 1323 while (length > 0) { 1324 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1325 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1326 return -EFAULT; 1327 } 1328 1329 if (dword_aligned && ((uintptr_t)virt_addr & 3)) { 1330 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1331 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1332 return -EFAULT; 1333 } 1334 1335 mapping_length = length; 1336 phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length); 1337 if (phys_addr == SPDK_VTOPHYS_ERROR) { 1338 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1339 return -EFAULT; 1340 } 1341 1342 mapping_length = spdk_min(length, mapping_length); 1343 1344 length -= mapping_length; 1345 virt_addr += mapping_length; 1346 1347 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1348 sgl->unkeyed.length = mapping_length; 1349 sgl->address = phys_addr; 1350 sgl->unkeyed.subtype = 0; 1351 1352 sgl++; 1353 nseg++; 1354 } 1355 1356 if (nseg == 1) { 1357 /* 1358 * The whole transfer can be described by a single SGL descriptor. 1359 * Use the special case described by the spec where SGL1's type is Data Block. 1360 * This means the SGL in the tracker is not used at all, so copy the first (and only) 1361 * SGL element into SGL1. 1362 */ 1363 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1364 req->cmd.dptr.sgl1.address = tr->u.sgl[0].address; 1365 req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length; 1366 } else { 1367 /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because 1368 * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page. 1369 */ 1370 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1371 req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr; 1372 req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor); 1373 } 1374 1375 return 0; 1376 } 1377 1378 /** 1379 * Build SGL list describing scattered payload buffer. 1380 */ 1381 static int 1382 nvme_pcie_qpair_build_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1383 struct nvme_tracker *tr, bool dword_aligned) 1384 { 1385 int rc; 1386 void *virt_addr; 1387 uint64_t phys_addr, mapping_length; 1388 uint32_t remaining_transfer_len, remaining_user_sge_len, length; 1389 struct spdk_nvme_sgl_descriptor *sgl; 1390 uint32_t nseg = 0; 1391 1392 /* 1393 * Build scattered payloads. 1394 */ 1395 assert(req->payload_size != 0); 1396 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL); 1397 assert(req->payload.reset_sgl_fn != NULL); 1398 assert(req->payload.next_sge_fn != NULL); 1399 req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset); 1400 1401 sgl = tr->u.sgl; 1402 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG; 1403 req->cmd.dptr.sgl1.unkeyed.subtype = 0; 1404 1405 remaining_transfer_len = req->payload_size; 1406 1407 while (remaining_transfer_len > 0) { 1408 rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, 1409 &virt_addr, &remaining_user_sge_len); 1410 if (rc) { 1411 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1412 return -EFAULT; 1413 } 1414 1415 /* Bit Bucket SGL descriptor */ 1416 if ((uint64_t)virt_addr == UINT64_MAX) { 1417 /* TODO: enable WRITE and COMPARE when necessary */ 1418 if (req->cmd.opc != SPDK_NVME_OPC_READ) { 1419 SPDK_ERRLOG("Only READ command can be supported\n"); 1420 goto exit; 1421 } 1422 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1423 SPDK_ERRLOG("Too many SGL entries\n"); 1424 goto exit; 1425 } 1426 1427 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_BIT_BUCKET; 1428 /* If the SGL describes a destination data buffer, the length of data 1429 * buffer shall be discarded by controller, and the length is included 1430 * in Number of Logical Blocks (NLB) parameter. Otherwise, the length 1431 * is not included in the NLB parameter. 1432 */ 1433 remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len); 1434 remaining_transfer_len -= remaining_user_sge_len; 1435 1436 sgl->unkeyed.length = remaining_user_sge_len; 1437 sgl->address = 0; 1438 sgl->unkeyed.subtype = 0; 1439 1440 sgl++; 1441 nseg++; 1442 1443 continue; 1444 } 1445 1446 remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len); 1447 remaining_transfer_len -= remaining_user_sge_len; 1448 while (remaining_user_sge_len > 0) { 1449 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1450 SPDK_ERRLOG("Too many SGL entries\n"); 1451 goto exit; 1452 } 1453 1454 if (dword_aligned && ((uintptr_t)virt_addr & 3)) { 1455 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1456 goto exit; 1457 } 1458 1459 mapping_length = remaining_user_sge_len; 1460 phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length); 1461 if (phys_addr == SPDK_VTOPHYS_ERROR) { 1462 goto exit; 1463 } 1464 1465 length = spdk_min(remaining_user_sge_len, mapping_length); 1466 remaining_user_sge_len -= length; 1467 virt_addr += length; 1468 1469 if (nseg > 0 && phys_addr == 1470 (*(sgl - 1)).address + (*(sgl - 1)).unkeyed.length) { 1471 /* extend previous entry */ 1472 (*(sgl - 1)).unkeyed.length += length; 1473 continue; 1474 } 1475 1476 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1477 sgl->unkeyed.length = length; 1478 sgl->address = phys_addr; 1479 sgl->unkeyed.subtype = 0; 1480 1481 sgl++; 1482 nseg++; 1483 } 1484 } 1485 1486 if (nseg == 1) { 1487 /* 1488 * The whole transfer can be described by a single SGL descriptor. 1489 * Use the special case described by the spec where SGL1's type is Data Block. 1490 * This means the SGL in the tracker is not used at all, so copy the first (and only) 1491 * SGL element into SGL1. 1492 */ 1493 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1494 req->cmd.dptr.sgl1.address = tr->u.sgl[0].address; 1495 req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length; 1496 } else { 1497 /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because 1498 * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page. 1499 */ 1500 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1501 req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr; 1502 req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor); 1503 } 1504 1505 return 0; 1506 1507 exit: 1508 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1509 return -EFAULT; 1510 } 1511 1512 /** 1513 * Build PRP list describing scattered payload buffer. 1514 */ 1515 static int 1516 nvme_pcie_qpair_build_prps_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1517 struct nvme_tracker *tr, bool dword_aligned) 1518 { 1519 int rc; 1520 void *virt_addr; 1521 uint32_t remaining_transfer_len, length; 1522 uint32_t prp_index = 0; 1523 uint32_t page_size = qpair->ctrlr->page_size; 1524 1525 /* 1526 * Build scattered payloads. 1527 */ 1528 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL); 1529 assert(req->payload.reset_sgl_fn != NULL); 1530 req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset); 1531 1532 remaining_transfer_len = req->payload_size; 1533 while (remaining_transfer_len > 0) { 1534 assert(req->payload.next_sge_fn != NULL); 1535 rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, &virt_addr, &length); 1536 if (rc) { 1537 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1538 return -EFAULT; 1539 } 1540 1541 length = spdk_min(remaining_transfer_len, length); 1542 1543 /* 1544 * Any incompatible sges should have been handled up in the splitting routine, 1545 * but assert here as an additional check. 1546 * 1547 * All SGEs except last must end on a page boundary. 1548 */ 1549 assert((length == remaining_transfer_len) || 1550 _is_page_aligned((uintptr_t)virt_addr + length, page_size)); 1551 1552 rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, virt_addr, length, page_size); 1553 if (rc) { 1554 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1555 return rc; 1556 } 1557 1558 remaining_transfer_len -= length; 1559 } 1560 1561 return 0; 1562 } 1563 1564 typedef int(*build_req_fn)(struct spdk_nvme_qpair *, struct nvme_request *, struct nvme_tracker *, 1565 bool); 1566 1567 static build_req_fn const g_nvme_pcie_build_req_table[][2] = { 1568 [NVME_PAYLOAD_TYPE_INVALID] = { 1569 nvme_pcie_qpair_build_request_invalid, /* PRP */ 1570 nvme_pcie_qpair_build_request_invalid /* SGL */ 1571 }, 1572 [NVME_PAYLOAD_TYPE_CONTIG] = { 1573 nvme_pcie_qpair_build_contig_request, /* PRP */ 1574 nvme_pcie_qpair_build_contig_hw_sgl_request /* SGL */ 1575 }, 1576 [NVME_PAYLOAD_TYPE_SGL] = { 1577 nvme_pcie_qpair_build_prps_sgl_request, /* PRP */ 1578 nvme_pcie_qpair_build_hw_sgl_request /* SGL */ 1579 } 1580 }; 1581 1582 static int 1583 nvme_pcie_qpair_build_metadata(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr, 1584 bool sgl_supported, bool dword_aligned) 1585 { 1586 void *md_payload; 1587 struct nvme_request *req = tr->req; 1588 uint64_t mapping_length; 1589 1590 if (req->payload.md) { 1591 md_payload = req->payload.md + req->md_offset; 1592 if (dword_aligned && ((uintptr_t)md_payload & 3)) { 1593 SPDK_ERRLOG("virt_addr %p not dword aligned\n", md_payload); 1594 goto exit; 1595 } 1596 1597 mapping_length = req->md_size; 1598 if (sgl_supported && dword_aligned) { 1599 assert(req->cmd.psdt == SPDK_NVME_PSDT_SGL_MPTR_CONTIG); 1600 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_SGL; 1601 1602 tr->meta_sgl.address = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length); 1603 if (tr->meta_sgl.address == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) { 1604 goto exit; 1605 } 1606 tr->meta_sgl.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1607 tr->meta_sgl.unkeyed.length = req->md_size; 1608 tr->meta_sgl.unkeyed.subtype = 0; 1609 req->cmd.mptr = tr->prp_sgl_bus_addr - sizeof(struct spdk_nvme_sgl_descriptor); 1610 } else { 1611 req->cmd.mptr = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length); 1612 if (req->cmd.mptr == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) { 1613 goto exit; 1614 } 1615 } 1616 } 1617 1618 return 0; 1619 1620 exit: 1621 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1622 return -EINVAL; 1623 } 1624 1625 int 1626 nvme_pcie_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req) 1627 { 1628 struct nvme_tracker *tr; 1629 int rc = 0; 1630 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 1631 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1632 enum nvme_payload_type payload_type; 1633 bool sgl_supported; 1634 bool dword_aligned = true; 1635 1636 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 1637 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1638 } 1639 1640 tr = TAILQ_FIRST(&pqpair->free_tr); 1641 1642 if (tr == NULL) { 1643 pqpair->stat->queued_requests++; 1644 /* Inform the upper layer to try again later. */ 1645 rc = -EAGAIN; 1646 goto exit; 1647 } 1648 1649 pqpair->stat->submitted_requests++; 1650 TAILQ_REMOVE(&pqpair->free_tr, tr, tq_list); /* remove tr from free_tr */ 1651 TAILQ_INSERT_TAIL(&pqpair->outstanding_tr, tr, tq_list); 1652 tr->req = req; 1653 tr->cb_fn = req->cb_fn; 1654 tr->cb_arg = req->cb_arg; 1655 req->cmd.cid = tr->cid; 1656 1657 if (req->payload_size != 0) { 1658 payload_type = nvme_payload_type(&req->payload); 1659 /* According to the specification, PRPs shall be used for all 1660 * Admin commands for NVMe over PCIe implementations. 1661 */ 1662 sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) != 0 && 1663 !nvme_qpair_is_admin_queue(qpair); 1664 1665 if (sgl_supported) { 1666 /* Don't use SGL for DSM command */ 1667 if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_NO_SGL_FOR_DSM) && 1668 (req->cmd.opc == SPDK_NVME_OPC_DATASET_MANAGEMENT))) { 1669 sgl_supported = false; 1670 } 1671 } 1672 1673 if (sgl_supported && !(ctrlr->flags & SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT)) { 1674 dword_aligned = false; 1675 } 1676 1677 /* If we fail to build the request or the metadata, do not return the -EFAULT back up 1678 * the stack. This ensures that we always fail these types of requests via a 1679 * completion callback, and never in the context of the submission. 1680 */ 1681 rc = g_nvme_pcie_build_req_table[payload_type][sgl_supported](qpair, req, tr, dword_aligned); 1682 if (rc < 0) { 1683 assert(rc == -EFAULT); 1684 rc = 0; 1685 goto exit; 1686 } 1687 1688 rc = nvme_pcie_qpair_build_metadata(qpair, tr, sgl_supported, dword_aligned); 1689 if (rc < 0) { 1690 assert(rc == -EFAULT); 1691 rc = 0; 1692 goto exit; 1693 } 1694 } 1695 1696 nvme_pcie_qpair_submit_tracker(qpair, tr); 1697 1698 exit: 1699 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 1700 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1701 } 1702 1703 return rc; 1704 } 1705 1706 struct spdk_nvme_transport_poll_group * 1707 nvme_pcie_poll_group_create(void) 1708 { 1709 struct nvme_pcie_poll_group *group = calloc(1, sizeof(*group)); 1710 1711 if (group == NULL) { 1712 SPDK_ERRLOG("Unable to allocate poll group.\n"); 1713 return NULL; 1714 } 1715 1716 return &group->group; 1717 } 1718 1719 int 1720 nvme_pcie_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair) 1721 { 1722 return 0; 1723 } 1724 1725 int 1726 nvme_pcie_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair) 1727 { 1728 return 0; 1729 } 1730 1731 int 1732 nvme_pcie_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup, 1733 struct spdk_nvme_qpair *qpair) 1734 { 1735 return 0; 1736 } 1737 1738 int 1739 nvme_pcie_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup, 1740 struct spdk_nvme_qpair *qpair) 1741 { 1742 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1743 1744 pqpair->stat = &g_dummy_stat; 1745 return 0; 1746 } 1747 1748 int64_t 1749 nvme_pcie_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup, 1750 uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb) 1751 { 1752 struct spdk_nvme_qpair *qpair, *tmp_qpair; 1753 int32_t local_completions = 0; 1754 int64_t total_completions = 0; 1755 1756 STAILQ_FOREACH_SAFE(qpair, &tgroup->disconnected_qpairs, poll_group_stailq, tmp_qpair) { 1757 disconnected_qpair_cb(qpair, tgroup->group->ctx); 1758 } 1759 1760 STAILQ_FOREACH_SAFE(qpair, &tgroup->connected_qpairs, poll_group_stailq, tmp_qpair) { 1761 local_completions = spdk_nvme_qpair_process_completions(qpair, completions_per_qpair); 1762 if (spdk_unlikely(local_completions < 0)) { 1763 disconnected_qpair_cb(qpair, tgroup->group->ctx); 1764 total_completions = -ENXIO; 1765 } else if (spdk_likely(total_completions >= 0)) { 1766 total_completions += local_completions; 1767 } 1768 } 1769 1770 return total_completions; 1771 } 1772 1773 int 1774 nvme_pcie_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup) 1775 { 1776 if (!STAILQ_EMPTY(&tgroup->connected_qpairs) || !STAILQ_EMPTY(&tgroup->disconnected_qpairs)) { 1777 return -EBUSY; 1778 } 1779 1780 free(tgroup); 1781 1782 return 0; 1783 } 1784 1785 int 1786 nvme_pcie_poll_group_get_stats(struct spdk_nvme_transport_poll_group *tgroup, 1787 struct spdk_nvme_transport_poll_group_stat **_stats) 1788 { 1789 struct nvme_pcie_poll_group *group; 1790 struct spdk_nvme_transport_poll_group_stat *stats; 1791 1792 if (tgroup == NULL || _stats == NULL) { 1793 SPDK_ERRLOG("Invalid stats or group pointer\n"); 1794 return -EINVAL; 1795 } 1796 1797 stats = calloc(1, sizeof(*stats)); 1798 if (!stats) { 1799 SPDK_ERRLOG("Can't allocate memory for RDMA stats\n"); 1800 return -ENOMEM; 1801 } 1802 stats->trtype = SPDK_NVME_TRANSPORT_PCIE; 1803 group = SPDK_CONTAINEROF(tgroup, struct nvme_pcie_poll_group, group); 1804 memcpy(&stats->pcie, &group->stats, sizeof(group->stats)); 1805 1806 *_stats = stats; 1807 1808 return 0; 1809 } 1810 1811 void 1812 nvme_pcie_poll_group_free_stats(struct spdk_nvme_transport_poll_group *tgroup, 1813 struct spdk_nvme_transport_poll_group_stat *stats) 1814 { 1815 free(stats); 1816 } 1817 1818 SPDK_TRACE_REGISTER_FN(nvme_pcie, "nvme_pcie", TRACE_GROUP_NVME_PCIE) 1819 { 1820 struct spdk_trace_tpoint_opts opts[] = { 1821 { 1822 "NVME_PCIE_SUBMIT", TRACE_NVME_PCIE_SUBMIT, 1823 OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 1, 1824 { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 }, 1825 { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 }, 1826 { "opc", SPDK_TRACE_ARG_TYPE_INT, 4 }, 1827 { "dw10", SPDK_TRACE_ARG_TYPE_PTR, 4 }, 1828 { "dw11", SPDK_TRACE_ARG_TYPE_PTR, 4 }, 1829 { "dw12", SPDK_TRACE_ARG_TYPE_PTR, 4 } 1830 } 1831 }, 1832 { 1833 "NVME_PCIE_COMPLETE", TRACE_NVME_PCIE_COMPLETE, 1834 OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 0, 1835 { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 }, 1836 { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 }, 1837 { "cpl", SPDK_TRACE_ARG_TYPE_PTR, 4 } 1838 } 1839 }, 1840 }; 1841 1842 spdk_trace_register_object(OBJECT_NVME_PCIE_REQ, 'p'); 1843 spdk_trace_register_owner(OWNER_NVME_PCIE_QP, 'q'); 1844 spdk_trace_register_description_ext(opts, SPDK_COUNTOF(opts)); 1845 } 1846