1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) Intel Corporation. All rights reserved. 5 * Copyright (c) 2021 Mellanox Technologies LTD. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * NVMe over PCIe common library 36 */ 37 38 #include "spdk/stdinc.h" 39 #include "spdk/likely.h" 40 #include "spdk/string.h" 41 #include "nvme_internal.h" 42 #include "nvme_pcie_internal.h" 43 #include "spdk/trace.h" 44 45 #include "spdk_internal/trace_defs.h" 46 47 __thread struct nvme_pcie_ctrlr *g_thread_mmio_ctrlr = NULL; 48 49 static void 50 nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr); 51 52 static inline uint64_t 53 nvme_pcie_vtophys(struct spdk_nvme_ctrlr *ctrlr, const void *buf, uint64_t *size) 54 { 55 if (spdk_likely(ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE)) { 56 return spdk_vtophys(buf, size); 57 } else { 58 /* vfio-user address translation with IOVA=VA mode */ 59 return (uint64_t)(uintptr_t)buf; 60 } 61 } 62 63 int 64 nvme_pcie_qpair_reset(struct spdk_nvme_qpair *qpair) 65 { 66 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 67 uint32_t i; 68 69 /* all head/tail vals are set to 0 */ 70 pqpair->last_sq_tail = pqpair->sq_tail = pqpair->sq_head = pqpair->cq_head = 0; 71 72 /* 73 * First time through the completion queue, HW will set phase 74 * bit on completions to 1. So set this to 1 here, indicating 75 * we're looking for a 1 to know which entries have completed. 76 * we'll toggle the bit each time when the completion queue 77 * rolls over. 78 */ 79 pqpair->flags.phase = 1; 80 for (i = 0; i < pqpair->num_entries; i++) { 81 pqpair->cpl[i].status.p = 0; 82 } 83 84 return 0; 85 } 86 87 static void 88 nvme_qpair_construct_tracker(struct nvme_tracker *tr, uint16_t cid, uint64_t phys_addr) 89 { 90 tr->prp_sgl_bus_addr = phys_addr + offsetof(struct nvme_tracker, u.prp); 91 tr->cid = cid; 92 tr->req = NULL; 93 } 94 95 static void * 96 nvme_pcie_ctrlr_alloc_cmb(struct spdk_nvme_ctrlr *ctrlr, uint64_t size, uint64_t alignment, 97 uint64_t *phys_addr) 98 { 99 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 100 uintptr_t addr; 101 102 if (pctrlr->cmb.mem_register_addr != NULL) { 103 /* BAR is mapped for data */ 104 return NULL; 105 } 106 107 addr = (uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.current_offset; 108 addr = (addr + (alignment - 1)) & ~(alignment - 1); 109 110 /* CMB may only consume part of the BAR, calculate accordingly */ 111 if (addr + size > ((uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.size)) { 112 SPDK_ERRLOG("Tried to allocate past valid CMB range!\n"); 113 return NULL; 114 } 115 *phys_addr = pctrlr->cmb.bar_pa + addr - (uintptr_t)pctrlr->cmb.bar_va; 116 117 pctrlr->cmb.current_offset = (addr + size) - (uintptr_t)pctrlr->cmb.bar_va; 118 119 return (void *)addr; 120 } 121 122 int 123 nvme_pcie_qpair_construct(struct spdk_nvme_qpair *qpair, 124 const struct spdk_nvme_io_qpair_opts *opts) 125 { 126 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 127 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 128 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 129 struct nvme_tracker *tr; 130 uint16_t i; 131 uint16_t num_trackers; 132 size_t page_align = sysconf(_SC_PAGESIZE); 133 size_t queue_align, queue_len; 134 uint32_t flags = SPDK_MALLOC_DMA; 135 uint64_t sq_paddr = 0; 136 uint64_t cq_paddr = 0; 137 138 if (opts) { 139 pqpair->sq_vaddr = opts->sq.vaddr; 140 pqpair->cq_vaddr = opts->cq.vaddr; 141 sq_paddr = opts->sq.paddr; 142 cq_paddr = opts->cq.paddr; 143 } 144 145 pqpair->retry_count = ctrlr->opts.transport_retry_count; 146 147 /* 148 * Limit the maximum number of completions to return per call to prevent wraparound, 149 * and calculate how many trackers can be submitted at once without overflowing the 150 * completion queue. 151 */ 152 pqpair->max_completions_cap = pqpair->num_entries / 4; 153 pqpair->max_completions_cap = spdk_max(pqpair->max_completions_cap, NVME_MIN_COMPLETIONS); 154 pqpair->max_completions_cap = spdk_min(pqpair->max_completions_cap, NVME_MAX_COMPLETIONS); 155 num_trackers = pqpair->num_entries - pqpair->max_completions_cap; 156 157 SPDK_INFOLOG(nvme, "max_completions_cap = %" PRIu16 " num_trackers = %" PRIu16 "\n", 158 pqpair->max_completions_cap, num_trackers); 159 160 assert(num_trackers != 0); 161 162 pqpair->sq_in_cmb = false; 163 164 if (nvme_qpair_is_admin_queue(&pqpair->qpair)) { 165 flags |= SPDK_MALLOC_SHARE; 166 } 167 168 /* cmd and cpl rings must be aligned on page size boundaries. */ 169 if (ctrlr->opts.use_cmb_sqs) { 170 pqpair->cmd = nvme_pcie_ctrlr_alloc_cmb(ctrlr, pqpair->num_entries * sizeof(struct spdk_nvme_cmd), 171 page_align, &pqpair->cmd_bus_addr); 172 if (pqpair->cmd != NULL) { 173 pqpair->sq_in_cmb = true; 174 } 175 } 176 177 if (pqpair->sq_in_cmb == false) { 178 if (pqpair->sq_vaddr) { 179 pqpair->cmd = pqpair->sq_vaddr; 180 } else { 181 /* To ensure physical address contiguity we make each ring occupy 182 * a single hugepage only. See MAX_IO_QUEUE_ENTRIES. 183 */ 184 queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cmd); 185 queue_align = spdk_max(spdk_align32pow2(queue_len), page_align); 186 pqpair->cmd = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags); 187 if (pqpair->cmd == NULL) { 188 SPDK_ERRLOG("alloc qpair_cmd failed\n"); 189 return -ENOMEM; 190 } 191 } 192 if (sq_paddr) { 193 assert(pqpair->sq_vaddr != NULL); 194 pqpair->cmd_bus_addr = sq_paddr; 195 } else { 196 pqpair->cmd_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cmd, NULL); 197 if (pqpair->cmd_bus_addr == SPDK_VTOPHYS_ERROR) { 198 SPDK_ERRLOG("spdk_vtophys(pqpair->cmd) failed\n"); 199 return -EFAULT; 200 } 201 } 202 } 203 204 if (pqpair->cq_vaddr) { 205 pqpair->cpl = pqpair->cq_vaddr; 206 } else { 207 queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cpl); 208 queue_align = spdk_max(spdk_align32pow2(queue_len), page_align); 209 pqpair->cpl = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags); 210 if (pqpair->cpl == NULL) { 211 SPDK_ERRLOG("alloc qpair_cpl failed\n"); 212 return -ENOMEM; 213 } 214 } 215 if (cq_paddr) { 216 assert(pqpair->cq_vaddr != NULL); 217 pqpair->cpl_bus_addr = cq_paddr; 218 } else { 219 pqpair->cpl_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cpl, NULL); 220 if (pqpair->cpl_bus_addr == SPDK_VTOPHYS_ERROR) { 221 SPDK_ERRLOG("spdk_vtophys(pqpair->cpl) failed\n"); 222 return -EFAULT; 223 } 224 } 225 226 pqpair->sq_tdbl = pctrlr->doorbell_base + (2 * qpair->id + 0) * pctrlr->doorbell_stride_u32; 227 pqpair->cq_hdbl = pctrlr->doorbell_base + (2 * qpair->id + 1) * pctrlr->doorbell_stride_u32; 228 229 /* 230 * Reserve space for all of the trackers in a single allocation. 231 * struct nvme_tracker must be padded so that its size is already a power of 2. 232 * This ensures the PRP list embedded in the nvme_tracker object will not span a 233 * 4KB boundary, while allowing access to trackers in tr[] via normal array indexing. 234 */ 235 pqpair->tr = spdk_zmalloc(num_trackers * sizeof(*tr), sizeof(*tr), NULL, 236 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 237 if (pqpair->tr == NULL) { 238 SPDK_ERRLOG("nvme_tr failed\n"); 239 return -ENOMEM; 240 } 241 242 TAILQ_INIT(&pqpair->free_tr); 243 TAILQ_INIT(&pqpair->outstanding_tr); 244 245 for (i = 0; i < num_trackers; i++) { 246 tr = &pqpair->tr[i]; 247 nvme_qpair_construct_tracker(tr, i, nvme_pcie_vtophys(ctrlr, tr, NULL)); 248 TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list); 249 } 250 251 nvme_pcie_qpair_reset(qpair); 252 253 return 0; 254 } 255 256 int 257 nvme_pcie_ctrlr_construct_admin_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t num_entries) 258 { 259 struct nvme_pcie_qpair *pqpair; 260 int rc; 261 262 pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 263 if (pqpair == NULL) { 264 return -ENOMEM; 265 } 266 267 pqpair->num_entries = num_entries; 268 pqpair->flags.delay_cmd_submit = 0; 269 pqpair->pcie_state = NVME_PCIE_QPAIR_READY; 270 271 ctrlr->adminq = &pqpair->qpair; 272 273 rc = nvme_qpair_init(ctrlr->adminq, 274 0, /* qpair ID */ 275 ctrlr, 276 SPDK_NVME_QPRIO_URGENT, 277 num_entries, 278 false); 279 if (rc != 0) { 280 return rc; 281 } 282 283 pqpair->stat = spdk_zmalloc(sizeof(*pqpair->stat), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, 284 SPDK_MALLOC_SHARE); 285 if (!pqpair->stat) { 286 SPDK_ERRLOG("Failed to allocate admin qpair statistics\n"); 287 return -ENOMEM; 288 } 289 290 return nvme_pcie_qpair_construct(ctrlr->adminq, NULL); 291 } 292 293 /** 294 * Note: the ctrlr_lock must be held when calling this function. 295 */ 296 void 297 nvme_pcie_qpair_insert_pending_admin_request(struct spdk_nvme_qpair *qpair, 298 struct nvme_request *req, struct spdk_nvme_cpl *cpl) 299 { 300 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 301 struct nvme_request *active_req = req; 302 struct spdk_nvme_ctrlr_process *active_proc; 303 304 /* 305 * The admin request is from another process. Move to the per 306 * process list for that process to handle it later. 307 */ 308 assert(nvme_qpair_is_admin_queue(qpair)); 309 assert(active_req->pid != getpid()); 310 311 active_proc = nvme_ctrlr_get_process(ctrlr, active_req->pid); 312 if (active_proc) { 313 /* Save the original completion information */ 314 memcpy(&active_req->cpl, cpl, sizeof(*cpl)); 315 STAILQ_INSERT_TAIL(&active_proc->active_reqs, active_req, stailq); 316 } else { 317 SPDK_ERRLOG("The owning process (pid %d) is not found. Dropping the request.\n", 318 active_req->pid); 319 320 nvme_free_request(active_req); 321 } 322 } 323 324 /** 325 * Note: the ctrlr_lock must be held when calling this function. 326 */ 327 void 328 nvme_pcie_qpair_complete_pending_admin_request(struct spdk_nvme_qpair *qpair) 329 { 330 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 331 struct nvme_request *req, *tmp_req; 332 pid_t pid = getpid(); 333 struct spdk_nvme_ctrlr_process *proc; 334 335 /* 336 * Check whether there is any pending admin request from 337 * other active processes. 338 */ 339 assert(nvme_qpair_is_admin_queue(qpair)); 340 341 proc = nvme_ctrlr_get_current_process(ctrlr); 342 if (!proc) { 343 SPDK_ERRLOG("the active process (pid %d) is not found for this controller.\n", pid); 344 assert(proc); 345 return; 346 } 347 348 STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) { 349 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq); 350 351 assert(req->pid == pid); 352 353 nvme_complete_request(req->cb_fn, req->cb_arg, qpair, req, &req->cpl); 354 nvme_free_request(req); 355 } 356 } 357 358 int 359 nvme_pcie_ctrlr_cmd_create_io_cq(struct spdk_nvme_ctrlr *ctrlr, 360 struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, 361 void *cb_arg) 362 { 363 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que); 364 struct nvme_request *req; 365 struct spdk_nvme_cmd *cmd; 366 367 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 368 if (req == NULL) { 369 return -ENOMEM; 370 } 371 372 cmd = &req->cmd; 373 cmd->opc = SPDK_NVME_OPC_CREATE_IO_CQ; 374 375 cmd->cdw10_bits.create_io_q.qid = io_que->id; 376 cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1; 377 378 cmd->cdw11_bits.create_io_cq.pc = 1; 379 cmd->dptr.prp.prp1 = pqpair->cpl_bus_addr; 380 381 return nvme_ctrlr_submit_admin_request(ctrlr, req); 382 } 383 384 int 385 nvme_pcie_ctrlr_cmd_create_io_sq(struct spdk_nvme_ctrlr *ctrlr, 386 struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, void *cb_arg) 387 { 388 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que); 389 struct nvme_request *req; 390 struct spdk_nvme_cmd *cmd; 391 392 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 393 if (req == NULL) { 394 return -ENOMEM; 395 } 396 397 cmd = &req->cmd; 398 cmd->opc = SPDK_NVME_OPC_CREATE_IO_SQ; 399 400 cmd->cdw10_bits.create_io_q.qid = io_que->id; 401 cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1; 402 cmd->cdw11_bits.create_io_sq.pc = 1; 403 cmd->cdw11_bits.create_io_sq.qprio = io_que->qprio; 404 cmd->cdw11_bits.create_io_sq.cqid = io_que->id; 405 cmd->dptr.prp.prp1 = pqpair->cmd_bus_addr; 406 407 return nvme_ctrlr_submit_admin_request(ctrlr, req); 408 } 409 410 int 411 nvme_pcie_ctrlr_cmd_delete_io_cq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 412 spdk_nvme_cmd_cb cb_fn, void *cb_arg) 413 { 414 struct nvme_request *req; 415 struct spdk_nvme_cmd *cmd; 416 417 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 418 if (req == NULL) { 419 return -ENOMEM; 420 } 421 422 cmd = &req->cmd; 423 cmd->opc = SPDK_NVME_OPC_DELETE_IO_CQ; 424 cmd->cdw10_bits.delete_io_q.qid = qpair->id; 425 426 return nvme_ctrlr_submit_admin_request(ctrlr, req); 427 } 428 429 int 430 nvme_pcie_ctrlr_cmd_delete_io_sq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 431 spdk_nvme_cmd_cb cb_fn, void *cb_arg) 432 { 433 struct nvme_request *req; 434 struct spdk_nvme_cmd *cmd; 435 436 req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg); 437 if (req == NULL) { 438 return -ENOMEM; 439 } 440 441 cmd = &req->cmd; 442 cmd->opc = SPDK_NVME_OPC_DELETE_IO_SQ; 443 cmd->cdw10_bits.delete_io_q.qid = qpair->id; 444 445 return nvme_ctrlr_submit_admin_request(ctrlr, req); 446 } 447 448 static void 449 nvme_completion_sq_error_delete_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 450 { 451 struct spdk_nvme_qpair *qpair = arg; 452 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 453 454 if (spdk_nvme_cpl_is_error(cpl)) { 455 SPDK_ERRLOG("delete_io_cq failed!\n"); 456 } 457 458 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 459 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 460 } 461 462 static void 463 nvme_completion_create_sq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 464 { 465 struct spdk_nvme_qpair *qpair = arg; 466 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 467 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 468 struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr); 469 int rc; 470 471 if (pqpair->flags.defer_destruction) { 472 /* This qpair was deleted by the application while the 473 * connection was still in progress. We had to wait 474 * to free the qpair resources until this outstanding 475 * command was completed. Now that we have the completion 476 * free it now. 477 */ 478 nvme_pcie_qpair_destroy(qpair); 479 return; 480 } 481 482 if (spdk_nvme_cpl_is_error(cpl)) { 483 SPDK_ERRLOG("nvme_create_io_sq failed, deleting cq!\n"); 484 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb, 485 qpair); 486 if (rc != 0) { 487 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 488 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 489 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 490 } 491 return; 492 } 493 pqpair->pcie_state = NVME_PCIE_QPAIR_READY; 494 nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED); 495 if (ctrlr->shadow_doorbell) { 496 pqpair->shadow_doorbell.sq_tdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 0) * 497 pctrlr->doorbell_stride_u32; 498 pqpair->shadow_doorbell.cq_hdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 1) * 499 pctrlr->doorbell_stride_u32; 500 pqpair->shadow_doorbell.sq_eventidx = ctrlr->eventidx + (2 * qpair->id + 0) * 501 pctrlr->doorbell_stride_u32; 502 pqpair->shadow_doorbell.cq_eventidx = ctrlr->eventidx + (2 * qpair->id + 1) * 503 pctrlr->doorbell_stride_u32; 504 pqpair->flags.has_shadow_doorbell = 1; 505 } else { 506 pqpair->flags.has_shadow_doorbell = 0; 507 } 508 nvme_pcie_qpair_reset(qpair); 509 510 } 511 512 static void 513 nvme_completion_create_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl) 514 { 515 struct spdk_nvme_qpair *qpair = arg; 516 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 517 int rc; 518 519 if (pqpair->flags.defer_destruction) { 520 /* This qpair was deleted by the application while the 521 * connection was still in progress. We had to wait 522 * to free the qpair resources until this outstanding 523 * command was completed. Now that we have the completion 524 * free it now. 525 */ 526 nvme_pcie_qpair_destroy(qpair); 527 return; 528 } 529 530 if (spdk_nvme_cpl_is_error(cpl)) { 531 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 532 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 533 SPDK_ERRLOG("nvme_create_io_cq failed!\n"); 534 return; 535 } 536 537 rc = nvme_pcie_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair, nvme_completion_create_sq_cb, qpair); 538 539 if (rc != 0) { 540 SPDK_ERRLOG("Failed to send request to create_io_sq, deleting cq!\n"); 541 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb, 542 qpair); 543 if (rc != 0) { 544 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 545 pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED; 546 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 547 } 548 return; 549 } 550 pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_SQ; 551 } 552 553 static int 554 _nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair, 555 uint16_t qid) 556 { 557 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 558 int rc; 559 560 /* Statistics may already be allocated in the case of controller reset */ 561 if (!pqpair->stat) { 562 if (qpair->poll_group) { 563 struct nvme_pcie_poll_group *group = SPDK_CONTAINEROF(qpair->poll_group, 564 struct nvme_pcie_poll_group, group); 565 566 pqpair->stat = &group->stats; 567 pqpair->shared_stats = true; 568 } else { 569 pqpair->stat = calloc(1, sizeof(*pqpair->stat)); 570 if (!pqpair->stat) { 571 SPDK_ERRLOG("Failed to allocate qpair statistics\n"); 572 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 573 return -ENOMEM; 574 } 575 } 576 } 577 578 579 rc = nvme_pcie_ctrlr_cmd_create_io_cq(ctrlr, qpair, nvme_completion_create_cq_cb, qpair); 580 581 if (rc != 0) { 582 SPDK_ERRLOG("Failed to send request to create_io_cq\n"); 583 nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED); 584 return rc; 585 } 586 pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_CQ; 587 return 0; 588 } 589 590 int 591 nvme_pcie_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 592 { 593 int rc = 0; 594 595 if (!nvme_qpair_is_admin_queue(qpair)) { 596 rc = _nvme_pcie_ctrlr_create_io_qpair(ctrlr, qpair, qpair->id); 597 } else { 598 nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED); 599 } 600 601 return rc; 602 } 603 604 void 605 nvme_pcie_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 606 { 607 } 608 609 /* Used when dst points to MMIO (i.e. CMB) in a virtual machine - in these cases we must 610 * not use wide instructions because QEMU will not emulate such instructions to MMIO space. 611 * So this function ensures we only copy 8 bytes at a time. 612 */ 613 static inline void 614 nvme_pcie_copy_command_mmio(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src) 615 { 616 uint64_t *dst64 = (uint64_t *)dst; 617 const uint64_t *src64 = (const uint64_t *)src; 618 uint32_t i; 619 620 for (i = 0; i < sizeof(*dst) / 8; i++) { 621 dst64[i] = src64[i]; 622 } 623 } 624 625 static inline void 626 nvme_pcie_copy_command(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src) 627 { 628 /* dst and src are known to be non-overlapping and 64-byte aligned. */ 629 #if defined(__SSE2__) 630 __m128i *d128 = (__m128i *)dst; 631 const __m128i *s128 = (const __m128i *)src; 632 633 _mm_stream_si128(&d128[0], _mm_load_si128(&s128[0])); 634 _mm_stream_si128(&d128[1], _mm_load_si128(&s128[1])); 635 _mm_stream_si128(&d128[2], _mm_load_si128(&s128[2])); 636 _mm_stream_si128(&d128[3], _mm_load_si128(&s128[3])); 637 #else 638 *dst = *src; 639 #endif 640 } 641 642 void 643 nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr) 644 { 645 struct nvme_request *req; 646 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 647 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 648 649 req = tr->req; 650 assert(req != NULL); 651 652 spdk_trace_record(TRACE_NVME_PCIE_SUBMIT, qpair->id, 0, (uintptr_t)req, 653 req->cmd.cid, req->cmd.opc, req->cmd.cdw10, req->cmd.cdw11, req->cmd.cdw12); 654 655 if (req->cmd.fuse == SPDK_NVME_IO_FLAGS_FUSE_FIRST) { 656 /* This is first cmd of two fused commands - don't ring doorbell */ 657 qpair->first_fused_submitted = 1; 658 } 659 660 /* Don't use wide instructions to copy NVMe command, this is limited by QEMU 661 * virtual NVMe controller, the maximum access width is 8 Bytes for one time. 662 */ 663 if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH) && pqpair->sq_in_cmb)) { 664 nvme_pcie_copy_command_mmio(&pqpair->cmd[pqpair->sq_tail], &req->cmd); 665 } else { 666 /* Copy the command from the tracker to the submission queue. */ 667 nvme_pcie_copy_command(&pqpair->cmd[pqpair->sq_tail], &req->cmd); 668 } 669 670 if (spdk_unlikely(++pqpair->sq_tail == pqpair->num_entries)) { 671 pqpair->sq_tail = 0; 672 } 673 674 if (spdk_unlikely(pqpair->sq_tail == pqpair->sq_head)) { 675 SPDK_ERRLOG("sq_tail is passing sq_head!\n"); 676 } 677 678 if (!pqpair->flags.delay_cmd_submit) { 679 nvme_pcie_qpair_ring_sq_doorbell(qpair); 680 } 681 } 682 683 void 684 nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr, 685 struct spdk_nvme_cpl *cpl, bool print_on_error) 686 { 687 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 688 struct nvme_request *req; 689 bool retry, error; 690 bool req_from_current_proc = true; 691 bool print_error; 692 693 req = tr->req; 694 695 spdk_trace_record(TRACE_NVME_PCIE_COMPLETE, qpair->id, 0, (uintptr_t)req, req->cmd.cid); 696 697 assert(req != NULL); 698 699 error = spdk_nvme_cpl_is_error(cpl); 700 retry = error && nvme_completion_is_retry(cpl) && 701 req->retries < pqpair->retry_count; 702 print_error = error && print_on_error && !qpair->ctrlr->opts.disable_error_logging; 703 704 if (print_error) { 705 spdk_nvme_qpair_print_command(qpair, &req->cmd); 706 } 707 708 if (print_error || SPDK_DEBUGLOG_FLAG_ENABLED("nvme")) { 709 spdk_nvme_qpair_print_completion(qpair, cpl); 710 } 711 712 assert(cpl->cid == req->cmd.cid); 713 714 if (retry) { 715 req->retries++; 716 nvme_pcie_qpair_submit_tracker(qpair, tr); 717 } else { 718 TAILQ_REMOVE(&pqpair->outstanding_tr, tr, tq_list); 719 720 /* Only check admin requests from different processes. */ 721 if (nvme_qpair_is_admin_queue(qpair) && req->pid != getpid()) { 722 req_from_current_proc = false; 723 nvme_pcie_qpair_insert_pending_admin_request(qpair, req, cpl); 724 } else { 725 nvme_complete_request(tr->cb_fn, tr->cb_arg, qpair, req, cpl); 726 } 727 728 if (req_from_current_proc == true) { 729 nvme_qpair_free_request(qpair, req); 730 } 731 732 tr->req = NULL; 733 734 TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list); 735 } 736 } 737 738 void 739 nvme_pcie_qpair_manual_complete_tracker(struct spdk_nvme_qpair *qpair, 740 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 741 bool print_on_error) 742 { 743 struct spdk_nvme_cpl cpl; 744 745 memset(&cpl, 0, sizeof(cpl)); 746 cpl.sqid = qpair->id; 747 cpl.cid = tr->cid; 748 cpl.status.sct = sct; 749 cpl.status.sc = sc; 750 cpl.status.dnr = dnr; 751 nvme_pcie_qpair_complete_tracker(qpair, tr, &cpl, print_on_error); 752 } 753 754 void 755 nvme_pcie_qpair_abort_trackers(struct spdk_nvme_qpair *qpair, uint32_t dnr) 756 { 757 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 758 struct nvme_tracker *tr, *temp, *last; 759 760 last = TAILQ_LAST(&pqpair->outstanding_tr, nvme_outstanding_tr_head); 761 762 /* Abort previously submitted (outstanding) trs */ 763 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, temp) { 764 if (!qpair->ctrlr->opts.disable_error_logging) { 765 SPDK_ERRLOG("aborting outstanding command\n"); 766 } 767 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC, 768 SPDK_NVME_SC_ABORTED_BY_REQUEST, dnr, true); 769 770 if (tr == last) { 771 break; 772 } 773 } 774 } 775 776 void 777 nvme_pcie_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair) 778 { 779 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 780 struct nvme_tracker *tr; 781 782 tr = TAILQ_FIRST(&pqpair->outstanding_tr); 783 while (tr != NULL) { 784 assert(tr->req != NULL); 785 if (tr->req->cmd.opc == SPDK_NVME_OPC_ASYNC_EVENT_REQUEST) { 786 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, 787 SPDK_NVME_SCT_GENERIC, SPDK_NVME_SC_ABORTED_SQ_DELETION, 0, 788 false); 789 tr = TAILQ_FIRST(&pqpair->outstanding_tr); 790 } else { 791 tr = TAILQ_NEXT(tr, tq_list); 792 } 793 } 794 } 795 796 void 797 nvme_pcie_admin_qpair_destroy(struct spdk_nvme_qpair *qpair) 798 { 799 nvme_pcie_admin_qpair_abort_aers(qpair); 800 } 801 802 void 803 nvme_pcie_qpair_abort_reqs(struct spdk_nvme_qpair *qpair, uint32_t dnr) 804 { 805 nvme_pcie_qpair_abort_trackers(qpair, dnr); 806 } 807 808 static void 809 nvme_pcie_qpair_check_timeout(struct spdk_nvme_qpair *qpair) 810 { 811 uint64_t t02; 812 struct nvme_tracker *tr, *tmp; 813 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 814 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 815 struct spdk_nvme_ctrlr_process *active_proc; 816 817 /* Don't check timeouts during controller initialization. */ 818 if (ctrlr->state != NVME_CTRLR_STATE_READY) { 819 return; 820 } 821 822 if (nvme_qpair_is_admin_queue(qpair)) { 823 active_proc = nvme_ctrlr_get_current_process(ctrlr); 824 } else { 825 active_proc = qpair->active_proc; 826 } 827 828 /* Only check timeouts if the current process has a timeout callback. */ 829 if (active_proc == NULL || active_proc->timeout_cb_fn == NULL) { 830 return; 831 } 832 833 t02 = spdk_get_ticks(); 834 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) { 835 assert(tr->req != NULL); 836 837 if (nvme_request_check_timeout(tr->req, tr->cid, active_proc, t02)) { 838 /* 839 * The requests are in order, so as soon as one has not timed out, 840 * stop iterating. 841 */ 842 break; 843 } 844 } 845 } 846 847 int32_t 848 nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_completions) 849 { 850 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 851 struct nvme_tracker *tr; 852 struct spdk_nvme_cpl *cpl, *next_cpl; 853 uint32_t num_completions = 0; 854 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 855 uint16_t next_cq_head; 856 uint8_t next_phase; 857 bool next_is_valid = false; 858 int rc; 859 860 if (spdk_unlikely(pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED)) { 861 return -ENXIO; 862 } 863 864 if (spdk_unlikely(pqpair->pcie_state != NVME_PCIE_QPAIR_READY)) { 865 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 866 if (rc < 0) { 867 return rc; 868 } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) { 869 return -ENXIO; 870 } 871 return 0; 872 } 873 874 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 875 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 876 } 877 878 if (max_completions == 0 || max_completions > pqpair->max_completions_cap) { 879 /* 880 * max_completions == 0 means unlimited, but complete at most 881 * max_completions_cap batch of I/O at a time so that the completion 882 * queue doorbells don't wrap around. 883 */ 884 max_completions = pqpair->max_completions_cap; 885 } 886 887 pqpair->stat->polls++; 888 889 while (1) { 890 cpl = &pqpair->cpl[pqpair->cq_head]; 891 892 if (!next_is_valid && cpl->status.p != pqpair->flags.phase) { 893 break; 894 } 895 896 if (spdk_likely(pqpair->cq_head + 1 != pqpair->num_entries)) { 897 next_cq_head = pqpair->cq_head + 1; 898 next_phase = pqpair->flags.phase; 899 } else { 900 next_cq_head = 0; 901 next_phase = !pqpair->flags.phase; 902 } 903 next_cpl = &pqpair->cpl[next_cq_head]; 904 next_is_valid = (next_cpl->status.p == next_phase); 905 if (next_is_valid) { 906 __builtin_prefetch(&pqpair->tr[next_cpl->cid]); 907 } 908 909 #ifdef __PPC64__ 910 /* 911 * This memory barrier prevents reordering of: 912 * - load after store from/to tr 913 * - load after load cpl phase and cpl cid 914 */ 915 spdk_mb(); 916 #elif defined(__aarch64__) 917 __asm volatile("dmb oshld" ::: "memory"); 918 #endif 919 920 if (spdk_unlikely(++pqpair->cq_head == pqpair->num_entries)) { 921 pqpair->cq_head = 0; 922 pqpair->flags.phase = !pqpair->flags.phase; 923 } 924 925 tr = &pqpair->tr[cpl->cid]; 926 /* Prefetch the req's STAILQ_ENTRY since we'll need to access it 927 * as part of putting the req back on the qpair's free list. 928 */ 929 __builtin_prefetch(&tr->req->stailq); 930 pqpair->sq_head = cpl->sqhd; 931 932 if (tr->req) { 933 nvme_pcie_qpair_complete_tracker(qpair, tr, cpl, true); 934 } else { 935 SPDK_ERRLOG("cpl does not map to outstanding cmd\n"); 936 spdk_nvme_qpair_print_completion(qpair, cpl); 937 assert(0); 938 } 939 940 if (++num_completions == max_completions) { 941 break; 942 } 943 } 944 945 if (num_completions > 0) { 946 pqpair->stat->completions += num_completions; 947 nvme_pcie_qpair_ring_cq_doorbell(qpair); 948 } else { 949 pqpair->stat->idle_polls++; 950 } 951 952 if (pqpair->flags.delay_cmd_submit) { 953 if (pqpair->last_sq_tail != pqpair->sq_tail) { 954 nvme_pcie_qpair_ring_sq_doorbell(qpair); 955 pqpair->last_sq_tail = pqpair->sq_tail; 956 } 957 } 958 959 if (spdk_unlikely(ctrlr->timeout_enabled)) { 960 /* 961 * User registered for timeout callback 962 */ 963 nvme_pcie_qpair_check_timeout(qpair); 964 } 965 966 /* Before returning, complete any pending admin request. */ 967 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 968 nvme_pcie_qpair_complete_pending_admin_request(qpair); 969 970 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 971 } 972 973 if (spdk_unlikely(pqpair->flags.has_pending_vtophys_failures)) { 974 struct nvme_tracker *tr, *tmp; 975 976 TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) { 977 if (tr->bad_vtophys) { 978 tr->bad_vtophys = 0; 979 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 980 } 981 } 982 pqpair->flags.has_pending_vtophys_failures = 0; 983 } 984 985 return num_completions; 986 } 987 988 int 989 nvme_pcie_qpair_destroy(struct spdk_nvme_qpair *qpair) 990 { 991 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 992 993 if (nvme_qpair_is_admin_queue(qpair)) { 994 nvme_pcie_admin_qpair_destroy(qpair); 995 } 996 /* 997 * We check sq_vaddr and cq_vaddr to see if the user specified the memory 998 * buffers when creating the I/O queue. 999 * If the user specified them, we cannot free that memory. 1000 * Nor do we free it if it's in the CMB. 1001 */ 1002 if (!pqpair->sq_vaddr && pqpair->cmd && !pqpair->sq_in_cmb) { 1003 spdk_free(pqpair->cmd); 1004 } 1005 if (!pqpair->cq_vaddr && pqpair->cpl) { 1006 spdk_free(pqpair->cpl); 1007 } 1008 if (pqpair->tr) { 1009 spdk_free(pqpair->tr); 1010 } 1011 1012 nvme_qpair_deinit(qpair); 1013 1014 if (!pqpair->shared_stats) { 1015 if (qpair->id) { 1016 free(pqpair->stat); 1017 } else { 1018 /* statistics of admin qpair are allocates from huge pages because 1019 * admin qpair is shared for multi-process */ 1020 spdk_free(pqpair->stat); 1021 } 1022 1023 } 1024 1025 spdk_free(pqpair); 1026 1027 return 0; 1028 } 1029 1030 struct spdk_nvme_qpair * 1031 nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid, 1032 const struct spdk_nvme_io_qpair_opts *opts) 1033 { 1034 struct nvme_pcie_qpair *pqpair; 1035 struct spdk_nvme_qpair *qpair; 1036 int rc; 1037 1038 assert(ctrlr != NULL); 1039 1040 pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, 1041 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 1042 if (pqpair == NULL) { 1043 return NULL; 1044 } 1045 1046 pqpair->num_entries = opts->io_queue_size; 1047 pqpair->flags.delay_cmd_submit = opts->delay_cmd_submit; 1048 1049 qpair = &pqpair->qpair; 1050 1051 rc = nvme_qpair_init(qpair, qid, ctrlr, opts->qprio, opts->io_queue_requests, opts->async_mode); 1052 if (rc != 0) { 1053 nvme_pcie_qpair_destroy(qpair); 1054 return NULL; 1055 } 1056 1057 rc = nvme_pcie_qpair_construct(qpair, opts); 1058 1059 if (rc != 0) { 1060 nvme_pcie_qpair_destroy(qpair); 1061 return NULL; 1062 } 1063 1064 return qpair; 1065 } 1066 1067 int 1068 nvme_pcie_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 1069 { 1070 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1071 struct nvme_completion_poll_status *status; 1072 int rc; 1073 1074 assert(ctrlr != NULL); 1075 1076 if (ctrlr->is_removed) { 1077 goto free; 1078 } 1079 1080 if (ctrlr->prepare_for_reset) { 1081 if (nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING) { 1082 pqpair->flags.defer_destruction = true; 1083 } 1084 goto clear_shadow_doorbells; 1085 } 1086 1087 /* If attempting to delete a qpair that's still being connected, we have to wait until it's 1088 * finished, so that we don't free it while it's waiting for the create cq/sq callbacks. 1089 */ 1090 while (nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING) { 1091 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 1092 if (rc < 0) { 1093 break; 1094 } 1095 } 1096 1097 status = calloc(1, sizeof(*status)); 1098 if (!status) { 1099 SPDK_ERRLOG("Failed to allocate status tracker\n"); 1100 goto free; 1101 } 1102 1103 /* Delete the I/O submission queue */ 1104 rc = nvme_pcie_ctrlr_cmd_delete_io_sq(ctrlr, qpair, nvme_completion_poll_cb, status); 1105 if (rc != 0) { 1106 SPDK_ERRLOG("Failed to send request to delete_io_sq with rc=%d\n", rc); 1107 free(status); 1108 goto free; 1109 } 1110 if (nvme_wait_for_completion(ctrlr->adminq, status)) { 1111 if (!status->timed_out) { 1112 free(status); 1113 } 1114 goto free; 1115 } 1116 1117 /* Now that the submission queue is deleted, the device is supposed to have 1118 * completed any outstanding I/O. Try to complete them. If they don't complete, 1119 * they'll be marked as aborted and completed below. */ 1120 nvme_pcie_qpair_process_completions(qpair, 0); 1121 1122 memset(status, 0, sizeof(*status)); 1123 /* Delete the completion queue */ 1124 rc = nvme_pcie_ctrlr_cmd_delete_io_cq(ctrlr, qpair, nvme_completion_poll_cb, status); 1125 if (rc != 0) { 1126 SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc); 1127 free(status); 1128 goto free; 1129 } 1130 if (nvme_wait_for_completion(ctrlr->adminq, status)) { 1131 if (!status->timed_out) { 1132 free(status); 1133 } 1134 goto free; 1135 } 1136 free(status); 1137 1138 clear_shadow_doorbells: 1139 if (pqpair->flags.has_shadow_doorbell) { 1140 *pqpair->shadow_doorbell.sq_tdbl = 0; 1141 *pqpair->shadow_doorbell.cq_hdbl = 0; 1142 *pqpair->shadow_doorbell.sq_eventidx = 0; 1143 *pqpair->shadow_doorbell.cq_eventidx = 0; 1144 } 1145 free: 1146 if (qpair->no_deletion_notification_needed == 0) { 1147 /* Abort the rest of the I/O */ 1148 nvme_pcie_qpair_abort_trackers(qpair, 1); 1149 } 1150 1151 if (!pqpair->flags.defer_destruction) { 1152 nvme_pcie_qpair_destroy(qpair); 1153 } 1154 return 0; 1155 } 1156 1157 static void 1158 nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr) 1159 { 1160 if (!qpair->in_completion_context) { 1161 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1162 1163 tr->bad_vtophys = 1; 1164 pqpair->flags.has_pending_vtophys_failures = 1; 1165 return; 1166 } 1167 1168 /* 1169 * Bad vtophys translation, so abort this request and return 1170 * immediately. 1171 */ 1172 SPDK_ERRLOG("vtophys or other payload buffer related error\n"); 1173 nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC, 1174 SPDK_NVME_SC_INVALID_FIELD, 1175 1 /* do not retry */, true); 1176 } 1177 1178 /* 1179 * Append PRP list entries to describe a virtually contiguous buffer starting at virt_addr of len bytes. 1180 * 1181 * *prp_index will be updated to account for the number of PRP entries used. 1182 */ 1183 static inline int 1184 nvme_pcie_prp_list_append(struct spdk_nvme_ctrlr *ctrlr, struct nvme_tracker *tr, 1185 uint32_t *prp_index, void *virt_addr, size_t len, 1186 uint32_t page_size) 1187 { 1188 struct spdk_nvme_cmd *cmd = &tr->req->cmd; 1189 uintptr_t page_mask = page_size - 1; 1190 uint64_t phys_addr; 1191 uint32_t i; 1192 1193 SPDK_DEBUGLOG(nvme, "prp_index:%u virt_addr:%p len:%u\n", 1194 *prp_index, virt_addr, (uint32_t)len); 1195 1196 if (spdk_unlikely(((uintptr_t)virt_addr & 3) != 0)) { 1197 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1198 return -EFAULT; 1199 } 1200 1201 i = *prp_index; 1202 while (len) { 1203 uint32_t seg_len; 1204 1205 /* 1206 * prp_index 0 is stored in prp1, and the rest are stored in the prp[] array, 1207 * so prp_index == count is valid. 1208 */ 1209 if (spdk_unlikely(i > SPDK_COUNTOF(tr->u.prp))) { 1210 SPDK_ERRLOG("out of PRP entries\n"); 1211 return -EFAULT; 1212 } 1213 1214 phys_addr = nvme_pcie_vtophys(ctrlr, virt_addr, NULL); 1215 if (spdk_unlikely(phys_addr == SPDK_VTOPHYS_ERROR)) { 1216 SPDK_ERRLOG("vtophys(%p) failed\n", virt_addr); 1217 return -EFAULT; 1218 } 1219 1220 if (i == 0) { 1221 SPDK_DEBUGLOG(nvme, "prp1 = %p\n", (void *)phys_addr); 1222 cmd->dptr.prp.prp1 = phys_addr; 1223 seg_len = page_size - ((uintptr_t)virt_addr & page_mask); 1224 } else { 1225 if ((phys_addr & page_mask) != 0) { 1226 SPDK_ERRLOG("PRP %u not page aligned (%p)\n", i, virt_addr); 1227 return -EFAULT; 1228 } 1229 1230 SPDK_DEBUGLOG(nvme, "prp[%u] = %p\n", i - 1, (void *)phys_addr); 1231 tr->u.prp[i - 1] = phys_addr; 1232 seg_len = page_size; 1233 } 1234 1235 seg_len = spdk_min(seg_len, len); 1236 virt_addr += seg_len; 1237 len -= seg_len; 1238 i++; 1239 } 1240 1241 cmd->psdt = SPDK_NVME_PSDT_PRP; 1242 if (i <= 1) { 1243 cmd->dptr.prp.prp2 = 0; 1244 } else if (i == 2) { 1245 cmd->dptr.prp.prp2 = tr->u.prp[0]; 1246 SPDK_DEBUGLOG(nvme, "prp2 = %p\n", (void *)cmd->dptr.prp.prp2); 1247 } else { 1248 cmd->dptr.prp.prp2 = tr->prp_sgl_bus_addr; 1249 SPDK_DEBUGLOG(nvme, "prp2 = %p (PRP list)\n", (void *)cmd->dptr.prp.prp2); 1250 } 1251 1252 *prp_index = i; 1253 return 0; 1254 } 1255 1256 static int 1257 nvme_pcie_qpair_build_request_invalid(struct spdk_nvme_qpair *qpair, 1258 struct nvme_request *req, struct nvme_tracker *tr, bool dword_aligned) 1259 { 1260 assert(0); 1261 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1262 return -EINVAL; 1263 } 1264 1265 /** 1266 * Build PRP list describing physically contiguous payload buffer. 1267 */ 1268 static int 1269 nvme_pcie_qpair_build_contig_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1270 struct nvme_tracker *tr, bool dword_aligned) 1271 { 1272 uint32_t prp_index = 0; 1273 int rc; 1274 1275 rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, 1276 req->payload.contig_or_cb_arg + req->payload_offset, 1277 req->payload_size, qpair->ctrlr->page_size); 1278 if (rc) { 1279 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1280 } 1281 1282 return rc; 1283 } 1284 1285 /** 1286 * Build an SGL describing a physically contiguous payload buffer. 1287 * 1288 * This is more efficient than using PRP because large buffers can be 1289 * described this way. 1290 */ 1291 static int 1292 nvme_pcie_qpair_build_contig_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1293 struct nvme_tracker *tr, bool dword_aligned) 1294 { 1295 void *virt_addr; 1296 uint64_t phys_addr, mapping_length; 1297 uint32_t length; 1298 struct spdk_nvme_sgl_descriptor *sgl; 1299 uint32_t nseg = 0; 1300 1301 assert(req->payload_size != 0); 1302 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_CONTIG); 1303 1304 sgl = tr->u.sgl; 1305 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG; 1306 req->cmd.dptr.sgl1.unkeyed.subtype = 0; 1307 1308 length = req->payload_size; 1309 virt_addr = req->payload.contig_or_cb_arg + req->payload_offset; 1310 1311 while (length > 0) { 1312 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1313 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1314 return -EFAULT; 1315 } 1316 1317 if (dword_aligned && ((uintptr_t)virt_addr & 3)) { 1318 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1319 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1320 return -EFAULT; 1321 } 1322 1323 mapping_length = length; 1324 phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length); 1325 if (phys_addr == SPDK_VTOPHYS_ERROR) { 1326 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1327 return -EFAULT; 1328 } 1329 1330 mapping_length = spdk_min(length, mapping_length); 1331 1332 length -= mapping_length; 1333 virt_addr += mapping_length; 1334 1335 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1336 sgl->unkeyed.length = mapping_length; 1337 sgl->address = phys_addr; 1338 sgl->unkeyed.subtype = 0; 1339 1340 sgl++; 1341 nseg++; 1342 } 1343 1344 if (nseg == 1) { 1345 /* 1346 * The whole transfer can be described by a single SGL descriptor. 1347 * Use the special case described by the spec where SGL1's type is Data Block. 1348 * This means the SGL in the tracker is not used at all, so copy the first (and only) 1349 * SGL element into SGL1. 1350 */ 1351 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1352 req->cmd.dptr.sgl1.address = tr->u.sgl[0].address; 1353 req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length; 1354 } else { 1355 /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because 1356 * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page. 1357 */ 1358 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1359 req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr; 1360 req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor); 1361 } 1362 1363 return 0; 1364 } 1365 1366 /** 1367 * Build SGL list describing scattered payload buffer. 1368 */ 1369 static int 1370 nvme_pcie_qpair_build_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1371 struct nvme_tracker *tr, bool dword_aligned) 1372 { 1373 int rc; 1374 void *virt_addr; 1375 uint64_t phys_addr, mapping_length; 1376 uint32_t remaining_transfer_len, remaining_user_sge_len, length; 1377 struct spdk_nvme_sgl_descriptor *sgl; 1378 uint32_t nseg = 0; 1379 1380 /* 1381 * Build scattered payloads. 1382 */ 1383 assert(req->payload_size != 0); 1384 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL); 1385 assert(req->payload.reset_sgl_fn != NULL); 1386 assert(req->payload.next_sge_fn != NULL); 1387 req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset); 1388 1389 sgl = tr->u.sgl; 1390 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG; 1391 req->cmd.dptr.sgl1.unkeyed.subtype = 0; 1392 1393 remaining_transfer_len = req->payload_size; 1394 1395 while (remaining_transfer_len > 0) { 1396 rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, 1397 &virt_addr, &remaining_user_sge_len); 1398 if (rc) { 1399 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1400 return -EFAULT; 1401 } 1402 1403 /* Bit Bucket SGL descriptor */ 1404 if ((uint64_t)virt_addr == UINT64_MAX) { 1405 /* TODO: enable WRITE and COMPARE when necessary */ 1406 if (req->cmd.opc != SPDK_NVME_OPC_READ) { 1407 SPDK_ERRLOG("Only READ command can be supported\n"); 1408 goto exit; 1409 } 1410 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1411 SPDK_ERRLOG("Too many SGL entries\n"); 1412 goto exit; 1413 } 1414 1415 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_BIT_BUCKET; 1416 /* If the SGL describes a destination data buffer, the length of data 1417 * buffer shall be discarded by controller, and the length is included 1418 * in Number of Logical Blocks (NLB) parameter. Otherwise, the length 1419 * is not included in the NLB parameter. 1420 */ 1421 remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len); 1422 remaining_transfer_len -= remaining_user_sge_len; 1423 1424 sgl->unkeyed.length = remaining_user_sge_len; 1425 sgl->address = 0; 1426 sgl->unkeyed.subtype = 0; 1427 1428 sgl++; 1429 nseg++; 1430 1431 continue; 1432 } 1433 1434 remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len); 1435 remaining_transfer_len -= remaining_user_sge_len; 1436 while (remaining_user_sge_len > 0) { 1437 if (nseg >= NVME_MAX_SGL_DESCRIPTORS) { 1438 SPDK_ERRLOG("Too many SGL entries\n"); 1439 goto exit; 1440 } 1441 1442 if (dword_aligned && ((uintptr_t)virt_addr & 3)) { 1443 SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr); 1444 goto exit; 1445 } 1446 1447 mapping_length = remaining_user_sge_len; 1448 phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length); 1449 if (phys_addr == SPDK_VTOPHYS_ERROR) { 1450 goto exit; 1451 } 1452 1453 length = spdk_min(remaining_user_sge_len, mapping_length); 1454 remaining_user_sge_len -= length; 1455 virt_addr += length; 1456 1457 if (nseg > 0 && phys_addr == 1458 (*(sgl - 1)).address + (*(sgl - 1)).unkeyed.length) { 1459 /* extend previous entry */ 1460 (*(sgl - 1)).unkeyed.length += length; 1461 continue; 1462 } 1463 1464 sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1465 sgl->unkeyed.length = length; 1466 sgl->address = phys_addr; 1467 sgl->unkeyed.subtype = 0; 1468 1469 sgl++; 1470 nseg++; 1471 } 1472 } 1473 1474 if (nseg == 1) { 1475 /* 1476 * The whole transfer can be described by a single SGL descriptor. 1477 * Use the special case described by the spec where SGL1's type is Data Block. 1478 * This means the SGL in the tracker is not used at all, so copy the first (and only) 1479 * SGL element into SGL1. 1480 */ 1481 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1482 req->cmd.dptr.sgl1.address = tr->u.sgl[0].address; 1483 req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length; 1484 } else { 1485 /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because 1486 * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page. 1487 */ 1488 req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT; 1489 req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr; 1490 req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor); 1491 } 1492 1493 return 0; 1494 1495 exit: 1496 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1497 return -EFAULT; 1498 } 1499 1500 /** 1501 * Build PRP list describing scattered payload buffer. 1502 */ 1503 static int 1504 nvme_pcie_qpair_build_prps_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req, 1505 struct nvme_tracker *tr, bool dword_aligned) 1506 { 1507 int rc; 1508 void *virt_addr; 1509 uint32_t remaining_transfer_len, length; 1510 uint32_t prp_index = 0; 1511 uint32_t page_size = qpair->ctrlr->page_size; 1512 1513 /* 1514 * Build scattered payloads. 1515 */ 1516 assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL); 1517 assert(req->payload.reset_sgl_fn != NULL); 1518 req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset); 1519 1520 remaining_transfer_len = req->payload_size; 1521 while (remaining_transfer_len > 0) { 1522 assert(req->payload.next_sge_fn != NULL); 1523 rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, &virt_addr, &length); 1524 if (rc) { 1525 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1526 return -EFAULT; 1527 } 1528 1529 length = spdk_min(remaining_transfer_len, length); 1530 1531 /* 1532 * Any incompatible sges should have been handled up in the splitting routine, 1533 * but assert here as an additional check. 1534 * 1535 * All SGEs except last must end on a page boundary. 1536 */ 1537 assert((length == remaining_transfer_len) || 1538 _is_page_aligned((uintptr_t)virt_addr + length, page_size)); 1539 1540 rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, virt_addr, length, page_size); 1541 if (rc) { 1542 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1543 return rc; 1544 } 1545 1546 remaining_transfer_len -= length; 1547 } 1548 1549 return 0; 1550 } 1551 1552 typedef int(*build_req_fn)(struct spdk_nvme_qpair *, struct nvme_request *, struct nvme_tracker *, 1553 bool); 1554 1555 static build_req_fn const g_nvme_pcie_build_req_table[][2] = { 1556 [NVME_PAYLOAD_TYPE_INVALID] = { 1557 nvme_pcie_qpair_build_request_invalid, /* PRP */ 1558 nvme_pcie_qpair_build_request_invalid /* SGL */ 1559 }, 1560 [NVME_PAYLOAD_TYPE_CONTIG] = { 1561 nvme_pcie_qpair_build_contig_request, /* PRP */ 1562 nvme_pcie_qpair_build_contig_hw_sgl_request /* SGL */ 1563 }, 1564 [NVME_PAYLOAD_TYPE_SGL] = { 1565 nvme_pcie_qpair_build_prps_sgl_request, /* PRP */ 1566 nvme_pcie_qpair_build_hw_sgl_request /* SGL */ 1567 } 1568 }; 1569 1570 static int 1571 nvme_pcie_qpair_build_metadata(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr, 1572 bool sgl_supported, bool dword_aligned) 1573 { 1574 void *md_payload; 1575 struct nvme_request *req = tr->req; 1576 1577 if (req->payload.md) { 1578 md_payload = req->payload.md + req->md_offset; 1579 if (dword_aligned && ((uintptr_t)md_payload & 3)) { 1580 SPDK_ERRLOG("virt_addr %p not dword aligned\n", md_payload); 1581 goto exit; 1582 } 1583 1584 if (sgl_supported && dword_aligned) { 1585 assert(req->cmd.psdt == SPDK_NVME_PSDT_SGL_MPTR_CONTIG); 1586 req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_SGL; 1587 tr->meta_sgl.address = nvme_pcie_vtophys(qpair->ctrlr, md_payload, NULL); 1588 if (tr->meta_sgl.address == SPDK_VTOPHYS_ERROR) { 1589 goto exit; 1590 } 1591 tr->meta_sgl.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK; 1592 tr->meta_sgl.unkeyed.length = req->md_size; 1593 tr->meta_sgl.unkeyed.subtype = 0; 1594 req->cmd.mptr = tr->prp_sgl_bus_addr - sizeof(struct spdk_nvme_sgl_descriptor); 1595 } else { 1596 req->cmd.mptr = nvme_pcie_vtophys(qpair->ctrlr, md_payload, NULL); 1597 if (req->cmd.mptr == SPDK_VTOPHYS_ERROR) { 1598 goto exit; 1599 } 1600 } 1601 } 1602 1603 return 0; 1604 1605 exit: 1606 nvme_pcie_fail_request_bad_vtophys(qpair, tr); 1607 return -EINVAL; 1608 } 1609 1610 int 1611 nvme_pcie_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req) 1612 { 1613 struct nvme_tracker *tr; 1614 int rc = 0; 1615 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 1616 struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair); 1617 enum nvme_payload_type payload_type; 1618 bool sgl_supported; 1619 bool dword_aligned = true; 1620 1621 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 1622 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1623 } 1624 1625 tr = TAILQ_FIRST(&pqpair->free_tr); 1626 1627 if (tr == NULL) { 1628 pqpair->stat->queued_requests++; 1629 /* Inform the upper layer to try again later. */ 1630 rc = -EAGAIN; 1631 goto exit; 1632 } 1633 1634 pqpair->stat->submitted_requests++; 1635 TAILQ_REMOVE(&pqpair->free_tr, tr, tq_list); /* remove tr from free_tr */ 1636 TAILQ_INSERT_TAIL(&pqpair->outstanding_tr, tr, tq_list); 1637 tr->req = req; 1638 tr->cb_fn = req->cb_fn; 1639 tr->cb_arg = req->cb_arg; 1640 req->cmd.cid = tr->cid; 1641 1642 if (req->payload_size != 0) { 1643 payload_type = nvme_payload_type(&req->payload); 1644 /* According to the specification, PRPs shall be used for all 1645 * Admin commands for NVMe over PCIe implementations. 1646 */ 1647 sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) != 0 && 1648 !nvme_qpair_is_admin_queue(qpair); 1649 1650 if (sgl_supported) { 1651 /* Don't use SGL for DSM command */ 1652 if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_NO_SGL_FOR_DSM) && 1653 (req->cmd.opc == SPDK_NVME_OPC_DATASET_MANAGEMENT))) { 1654 sgl_supported = false; 1655 } 1656 } 1657 1658 if (sgl_supported && !(ctrlr->flags & SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT)) { 1659 dword_aligned = false; 1660 } 1661 1662 /* If we fail to build the request or the metadata, do not return the -EFAULT back up 1663 * the stack. This ensures that we always fail these types of requests via a 1664 * completion callback, and never in the context of the submission. 1665 */ 1666 rc = g_nvme_pcie_build_req_table[payload_type][sgl_supported](qpair, req, tr, dword_aligned); 1667 if (rc < 0) { 1668 assert(rc == -EFAULT); 1669 rc = 0; 1670 goto exit; 1671 } 1672 1673 rc = nvme_pcie_qpair_build_metadata(qpair, tr, sgl_supported, dword_aligned); 1674 if (rc < 0) { 1675 assert(rc == -EFAULT); 1676 rc = 0; 1677 goto exit; 1678 } 1679 } 1680 1681 nvme_pcie_qpair_submit_tracker(qpair, tr); 1682 1683 exit: 1684 if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) { 1685 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1686 } 1687 1688 return rc; 1689 } 1690 1691 struct spdk_nvme_transport_poll_group * 1692 nvme_pcie_poll_group_create(void) 1693 { 1694 struct nvme_pcie_poll_group *group = calloc(1, sizeof(*group)); 1695 1696 if (group == NULL) { 1697 SPDK_ERRLOG("Unable to allocate poll group.\n"); 1698 return NULL; 1699 } 1700 1701 return &group->group; 1702 } 1703 1704 int 1705 nvme_pcie_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair) 1706 { 1707 return 0; 1708 } 1709 1710 int 1711 nvme_pcie_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair) 1712 { 1713 return 0; 1714 } 1715 1716 int 1717 nvme_pcie_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup, 1718 struct spdk_nvme_qpair *qpair) 1719 { 1720 return 0; 1721 } 1722 1723 int 1724 nvme_pcie_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup, 1725 struct spdk_nvme_qpair *qpair) 1726 { 1727 return 0; 1728 } 1729 1730 int64_t 1731 nvme_pcie_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup, 1732 uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb) 1733 { 1734 struct spdk_nvme_qpair *qpair, *tmp_qpair; 1735 int32_t local_completions = 0; 1736 int64_t total_completions = 0; 1737 1738 STAILQ_FOREACH_SAFE(qpair, &tgroup->disconnected_qpairs, poll_group_stailq, tmp_qpair) { 1739 disconnected_qpair_cb(qpair, tgroup->group->ctx); 1740 } 1741 1742 STAILQ_FOREACH_SAFE(qpair, &tgroup->connected_qpairs, poll_group_stailq, tmp_qpair) { 1743 local_completions = spdk_nvme_qpair_process_completions(qpair, completions_per_qpair); 1744 if (local_completions < 0) { 1745 disconnected_qpair_cb(qpair, tgroup->group->ctx); 1746 local_completions = 0; 1747 } 1748 total_completions += local_completions; 1749 } 1750 1751 return total_completions; 1752 } 1753 1754 int 1755 nvme_pcie_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup) 1756 { 1757 if (!STAILQ_EMPTY(&tgroup->connected_qpairs) || !STAILQ_EMPTY(&tgroup->disconnected_qpairs)) { 1758 return -EBUSY; 1759 } 1760 1761 free(tgroup); 1762 1763 return 0; 1764 } 1765 1766 SPDK_TRACE_REGISTER_FN(nvme_pcie, "nvme_pcie", TRACE_GROUP_NVME_PCIE) 1767 { 1768 struct spdk_trace_tpoint_opts opts[] = { 1769 { 1770 "NVME_PCIE_SUBMIT", TRACE_NVME_PCIE_SUBMIT, 1771 OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_TR, 1, 1772 { { "cid", SPDK_TRACE_ARG_TYPE_INT, 8 }, 1773 { "opc", SPDK_TRACE_ARG_TYPE_INT, 8 }, 1774 { "dw10", SPDK_TRACE_ARG_TYPE_PTR, 8 }, 1775 { "dw11", SPDK_TRACE_ARG_TYPE_PTR, 8 }, 1776 { "dw12", SPDK_TRACE_ARG_TYPE_PTR, 8 } 1777 } 1778 }, 1779 { 1780 "NVME_PCIE_COMPLETE", TRACE_NVME_PCIE_COMPLETE, 1781 OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_TR, 0, 1782 {{ "cid", SPDK_TRACE_ARG_TYPE_INT, 8 }} 1783 }, 1784 }; 1785 1786 spdk_trace_register_object(OBJECT_NVME_PCIE_TR, 'p'); 1787 spdk_trace_register_owner(OWNER_NVME_PCIE_QP, 'q'); 1788 spdk_trace_register_description_ext(opts, SPDK_COUNTOF(opts)); 1789 } 1790