1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) Intel Corporation. All rights reserved. 5 * Copyright (c) 2019, 2020 Mellanox Technologies LTD. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include "spdk/stdinc.h" 35 36 #include "nvme_internal.h" 37 #include "nvme_io_msg.h" 38 39 #include "spdk/env.h" 40 #include "spdk/string.h" 41 42 struct nvme_active_ns_ctx; 43 44 static void nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr); 45 static int nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 46 struct nvme_async_event_request *aer); 47 static void nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx); 48 static int nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns); 49 static int nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns); 50 51 static int 52 nvme_ctrlr_get_cc(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cc_register *cc) 53 { 54 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 55 &cc->raw); 56 } 57 58 static int 59 nvme_ctrlr_get_csts(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_csts_register *csts) 60 { 61 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, csts.raw), 62 &csts->raw); 63 } 64 65 int 66 nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap) 67 { 68 return nvme_transport_ctrlr_get_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, cap.raw), 69 &cap->raw); 70 } 71 72 int 73 nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs) 74 { 75 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, vs.raw), 76 &vs->raw); 77 } 78 79 static int 80 nvme_ctrlr_set_cc(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cc_register *cc) 81 { 82 return nvme_transport_ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 83 cc->raw); 84 } 85 86 int 87 nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz) 88 { 89 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cmbsz.raw), 90 &cmbsz->raw); 91 } 92 93 /* When the field in spdk_nvme_ctrlr_opts are changed and you change this function, please 94 * also update the nvme_ctrl_opts_init function in nvme_ctrlr.c 95 */ 96 void 97 spdk_nvme_ctrlr_get_default_ctrlr_opts(struct spdk_nvme_ctrlr_opts *opts, size_t opts_size) 98 { 99 char host_id_str[SPDK_UUID_STRING_LEN]; 100 101 assert(opts); 102 103 opts->opts_size = opts_size; 104 105 #define FIELD_OK(field) \ 106 offsetof(struct spdk_nvme_ctrlr_opts, field) + sizeof(opts->field) <= opts_size 107 108 if (FIELD_OK(num_io_queues)) { 109 opts->num_io_queues = DEFAULT_MAX_IO_QUEUES; 110 } 111 112 if (FIELD_OK(use_cmb_sqs)) { 113 opts->use_cmb_sqs = true; 114 } 115 116 if (FIELD_OK(no_shn_notification)) { 117 opts->no_shn_notification = false; 118 } 119 120 if (FIELD_OK(arb_mechanism)) { 121 opts->arb_mechanism = SPDK_NVME_CC_AMS_RR; 122 } 123 124 if (FIELD_OK(arbitration_burst)) { 125 opts->arbitration_burst = 0; 126 } 127 128 if (FIELD_OK(low_priority_weight)) { 129 opts->low_priority_weight = 0; 130 } 131 132 if (FIELD_OK(medium_priority_weight)) { 133 opts->medium_priority_weight = 0; 134 } 135 136 if (FIELD_OK(high_priority_weight)) { 137 opts->high_priority_weight = 0; 138 } 139 140 if (FIELD_OK(keep_alive_timeout_ms)) { 141 opts->keep_alive_timeout_ms = MIN_KEEP_ALIVE_TIMEOUT_IN_MS; 142 } 143 144 if (FIELD_OK(transport_retry_count)) { 145 opts->transport_retry_count = SPDK_NVME_DEFAULT_RETRY_COUNT; 146 } 147 148 if (FIELD_OK(io_queue_size)) { 149 opts->io_queue_size = DEFAULT_IO_QUEUE_SIZE; 150 } 151 152 if (nvme_driver_init() == 0) { 153 if (FIELD_OK(hostnqn)) { 154 spdk_uuid_fmt_lower(host_id_str, sizeof(host_id_str), 155 &g_spdk_nvme_driver->default_extended_host_id); 156 snprintf(opts->hostnqn, sizeof(opts->hostnqn), "2014-08.org.nvmexpress:uuid:%s", host_id_str); 157 } 158 159 if (FIELD_OK(extended_host_id)) { 160 memcpy(opts->extended_host_id, &g_spdk_nvme_driver->default_extended_host_id, 161 sizeof(opts->extended_host_id)); 162 } 163 164 } 165 166 if (FIELD_OK(io_queue_requests)) { 167 opts->io_queue_requests = DEFAULT_IO_QUEUE_REQUESTS; 168 } 169 170 if (FIELD_OK(src_addr)) { 171 memset(opts->src_addr, 0, sizeof(opts->src_addr)); 172 } 173 174 if (FIELD_OK(src_svcid)) { 175 memset(opts->src_svcid, 0, sizeof(opts->src_svcid)); 176 } 177 178 if (FIELD_OK(host_id)) { 179 memset(opts->host_id, 0, sizeof(opts->host_id)); 180 } 181 182 if (FIELD_OK(command_set)) { 183 opts->command_set = SPDK_NVME_CC_CSS_NVM; 184 } 185 186 if (FIELD_OK(admin_timeout_ms)) { 187 opts->admin_timeout_ms = NVME_MAX_ADMIN_TIMEOUT_IN_SECS * 1000; 188 } 189 190 if (FIELD_OK(header_digest)) { 191 opts->header_digest = false; 192 } 193 194 if (FIELD_OK(data_digest)) { 195 opts->data_digest = false; 196 } 197 198 if (FIELD_OK(disable_error_logging)) { 199 opts->disable_error_logging = false; 200 } 201 202 if (FIELD_OK(transport_ack_timeout)) { 203 opts->transport_ack_timeout = SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT; 204 } 205 206 if (FIELD_OK(admin_queue_size)) { 207 opts->admin_queue_size = DEFAULT_ADMIN_QUEUE_SIZE; 208 } 209 #undef FIELD_OK 210 } 211 212 /** 213 * This function will be called when the process allocates the IO qpair. 214 * Note: the ctrlr_lock must be held when calling this function. 215 */ 216 static void 217 nvme_ctrlr_proc_add_io_qpair(struct spdk_nvme_qpair *qpair) 218 { 219 struct spdk_nvme_ctrlr_process *active_proc; 220 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 221 222 active_proc = nvme_ctrlr_get_current_process(ctrlr); 223 if (active_proc) { 224 TAILQ_INSERT_TAIL(&active_proc->allocated_io_qpairs, qpair, per_process_tailq); 225 qpair->active_proc = active_proc; 226 } 227 } 228 229 /** 230 * This function will be called when the process frees the IO qpair. 231 * Note: the ctrlr_lock must be held when calling this function. 232 */ 233 static void 234 nvme_ctrlr_proc_remove_io_qpair(struct spdk_nvme_qpair *qpair) 235 { 236 struct spdk_nvme_ctrlr_process *active_proc; 237 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 238 struct spdk_nvme_qpair *active_qpair, *tmp_qpair; 239 240 active_proc = nvme_ctrlr_get_current_process(ctrlr); 241 if (!active_proc) { 242 return; 243 } 244 245 TAILQ_FOREACH_SAFE(active_qpair, &active_proc->allocated_io_qpairs, 246 per_process_tailq, tmp_qpair) { 247 if (active_qpair == qpair) { 248 TAILQ_REMOVE(&active_proc->allocated_io_qpairs, 249 active_qpair, per_process_tailq); 250 251 break; 252 } 253 } 254 } 255 256 void 257 spdk_nvme_ctrlr_get_default_io_qpair_opts(struct spdk_nvme_ctrlr *ctrlr, 258 struct spdk_nvme_io_qpair_opts *opts, 259 size_t opts_size) 260 { 261 assert(ctrlr); 262 263 assert(opts); 264 265 memset(opts, 0, opts_size); 266 267 #define FIELD_OK(field) \ 268 offsetof(struct spdk_nvme_io_qpair_opts, field) + sizeof(opts->field) <= opts_size 269 270 if (FIELD_OK(qprio)) { 271 opts->qprio = SPDK_NVME_QPRIO_URGENT; 272 } 273 274 if (FIELD_OK(io_queue_size)) { 275 opts->io_queue_size = ctrlr->opts.io_queue_size; 276 } 277 278 if (FIELD_OK(io_queue_requests)) { 279 opts->io_queue_requests = ctrlr->opts.io_queue_requests; 280 } 281 282 if (FIELD_OK(delay_cmd_submit)) { 283 opts->delay_cmd_submit = false; 284 } 285 286 if (FIELD_OK(sq.vaddr)) { 287 opts->sq.vaddr = NULL; 288 } 289 290 if (FIELD_OK(sq.paddr)) { 291 opts->sq.paddr = 0; 292 } 293 294 if (FIELD_OK(sq.buffer_size)) { 295 opts->sq.buffer_size = 0; 296 } 297 298 if (FIELD_OK(cq.vaddr)) { 299 opts->cq.vaddr = NULL; 300 } 301 302 if (FIELD_OK(cq.paddr)) { 303 opts->cq.paddr = 0; 304 } 305 306 if (FIELD_OK(cq.buffer_size)) { 307 opts->cq.buffer_size = 0; 308 } 309 310 if (FIELD_OK(create_only)) { 311 opts->create_only = false; 312 } 313 314 #undef FIELD_OK 315 } 316 317 static struct spdk_nvme_qpair * 318 nvme_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 319 const struct spdk_nvme_io_qpair_opts *opts) 320 { 321 uint32_t qid; 322 struct spdk_nvme_qpair *qpair; 323 union spdk_nvme_cc_register cc; 324 325 if (!ctrlr) { 326 return NULL; 327 } 328 329 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 330 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 331 SPDK_ERRLOG("get_cc failed\n"); 332 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 333 return NULL; 334 } 335 336 if (opts->qprio & ~SPDK_NVME_CREATE_IO_SQ_QPRIO_MASK) { 337 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 338 return NULL; 339 } 340 341 /* 342 * Only value SPDK_NVME_QPRIO_URGENT(0) is valid for the 343 * default round robin arbitration method. 344 */ 345 if ((cc.bits.ams == SPDK_NVME_CC_AMS_RR) && (opts->qprio != SPDK_NVME_QPRIO_URGENT)) { 346 SPDK_ERRLOG("invalid queue priority for default round robin arbitration method\n"); 347 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 348 return NULL; 349 } 350 351 /* 352 * Get the first available I/O queue ID. 353 */ 354 qid = spdk_bit_array_find_first_set(ctrlr->free_io_qids, 1); 355 if (qid > ctrlr->opts.num_io_queues) { 356 SPDK_ERRLOG("No free I/O queue IDs\n"); 357 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 358 return NULL; 359 } 360 361 qpair = nvme_transport_ctrlr_create_io_qpair(ctrlr, qid, opts); 362 if (qpair == NULL) { 363 SPDK_ERRLOG("nvme_transport_ctrlr_create_io_qpair() failed\n"); 364 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 365 return NULL; 366 } 367 368 spdk_bit_array_clear(ctrlr->free_io_qids, qid); 369 TAILQ_INSERT_TAIL(&ctrlr->active_io_qpairs, qpair, tailq); 370 371 nvme_ctrlr_proc_add_io_qpair(qpair); 372 373 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 374 375 return qpair; 376 } 377 378 int 379 spdk_nvme_ctrlr_connect_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 380 { 381 int rc; 382 383 if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) { 384 return -EISCONN; 385 } 386 387 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 388 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 389 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 390 391 if (ctrlr->quirks & NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC) { 392 spdk_delay_us(100); 393 } 394 395 return rc; 396 } 397 398 void 399 spdk_nvme_ctrlr_disconnect_io_qpair(struct spdk_nvme_qpair *qpair) 400 { 401 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 402 403 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 404 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 405 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 406 } 407 408 struct spdk_nvme_qpair * 409 spdk_nvme_ctrlr_alloc_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 410 const struct spdk_nvme_io_qpair_opts *user_opts, 411 size_t opts_size) 412 { 413 414 struct spdk_nvme_qpair *qpair; 415 struct spdk_nvme_io_qpair_opts opts; 416 int rc; 417 418 /* 419 * Get the default options, then overwrite them with the user-provided options 420 * up to opts_size. 421 * 422 * This allows for extensions of the opts structure without breaking 423 * ABI compatibility. 424 */ 425 spdk_nvme_ctrlr_get_default_io_qpair_opts(ctrlr, &opts, sizeof(opts)); 426 if (user_opts) { 427 memcpy(&opts, user_opts, spdk_min(sizeof(opts), opts_size)); 428 429 /* If user passes buffers, make sure they're big enough for the requested queue size */ 430 if (opts.sq.vaddr) { 431 if (opts.sq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))) { 432 SPDK_ERRLOG("sq buffer size %lx is too small for sq size %lx\n", 433 opts.sq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))); 434 return NULL; 435 } 436 } 437 if (opts.cq.vaddr) { 438 if (opts.cq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))) { 439 SPDK_ERRLOG("cq buffer size %lx is too small for cq size %lx\n", 440 opts.cq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))); 441 return NULL; 442 } 443 } 444 } 445 446 qpair = nvme_ctrlr_create_io_qpair(ctrlr, &opts); 447 448 if (qpair == NULL || opts.create_only == true) { 449 return qpair; 450 } 451 452 rc = spdk_nvme_ctrlr_connect_io_qpair(ctrlr, qpair); 453 if (rc != 0) { 454 SPDK_ERRLOG("nvme_transport_ctrlr_connect_io_qpair() failed\n"); 455 nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair); 456 return NULL; 457 } 458 459 return qpair; 460 } 461 462 int 463 spdk_nvme_ctrlr_reconnect_io_qpair(struct spdk_nvme_qpair *qpair) 464 { 465 struct spdk_nvme_ctrlr *ctrlr; 466 int rc; 467 468 assert(qpair != NULL); 469 assert(nvme_qpair_is_admin_queue(qpair) == false); 470 assert(qpair->ctrlr != NULL); 471 472 ctrlr = qpair->ctrlr; 473 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 474 475 if (ctrlr->is_removed) { 476 rc = -ENODEV; 477 goto out; 478 } 479 480 if (ctrlr->is_resetting) { 481 rc = -EAGAIN; 482 goto out; 483 } 484 485 if (ctrlr->is_failed) { 486 rc = -ENXIO; 487 goto out; 488 } 489 490 if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) { 491 rc = 0; 492 goto out; 493 } 494 495 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 496 if (rc) { 497 rc = -EAGAIN; 498 goto out; 499 } 500 501 out: 502 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 503 return rc; 504 } 505 506 spdk_nvme_qp_failure_reason 507 spdk_nvme_ctrlr_get_admin_qp_failure_reason(struct spdk_nvme_ctrlr *ctrlr) 508 { 509 return ctrlr->adminq->transport_failure_reason; 510 } 511 512 /* 513 * This internal function will attempt to take the controller 514 * lock before calling disconnect on a controller qpair. 515 * Functions already holding the controller lock should 516 * call nvme_transport_ctrlr_disconnect_qpair directly. 517 */ 518 void 519 nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair) 520 { 521 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 522 523 assert(ctrlr != NULL); 524 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 525 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 526 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 527 } 528 529 int 530 spdk_nvme_ctrlr_free_io_qpair(struct spdk_nvme_qpair *qpair) 531 { 532 struct spdk_nvme_ctrlr *ctrlr; 533 534 if (qpair == NULL) { 535 return 0; 536 } 537 538 ctrlr = qpair->ctrlr; 539 540 if (qpair->in_completion_context) { 541 /* 542 * There are many cases where it is convenient to delete an io qpair in the context 543 * of that qpair's completion routine. To handle this properly, set a flag here 544 * so that the completion routine will perform an actual delete after the context 545 * unwinds. 546 */ 547 qpair->delete_after_completion_context = 1; 548 return 0; 549 } 550 551 if (qpair->poll_group && qpair->poll_group->in_completion_context) { 552 /* Same as above, but in a poll group. */ 553 qpair->poll_group->num_qpairs_to_delete++; 554 qpair->delete_after_completion_context = 1; 555 return 0; 556 } 557 558 if (qpair->poll_group) { 559 spdk_nvme_poll_group_remove(qpair->poll_group->group, qpair); 560 } 561 562 /* Do not retry. */ 563 nvme_qpair_set_state(qpair, NVME_QPAIR_DESTROYING); 564 nvme_qpair_abort_reqs(qpair, 1); 565 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 566 567 nvme_ctrlr_proc_remove_io_qpair(qpair); 568 569 TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq); 570 spdk_bit_array_set(ctrlr->free_io_qids, qpair->id); 571 572 if (nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair)) { 573 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 574 return -1; 575 } 576 577 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 578 return 0; 579 } 580 581 static void 582 nvme_ctrlr_construct_intel_support_log_page_list(struct spdk_nvme_ctrlr *ctrlr, 583 struct spdk_nvme_intel_log_page_directory *log_page_directory) 584 { 585 if (log_page_directory == NULL) { 586 return; 587 } 588 589 if (ctrlr->cdata.vid != SPDK_PCI_VID_INTEL) { 590 return; 591 } 592 593 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY] = true; 594 595 if (log_page_directory->read_latency_log_len || 596 (ctrlr->quirks & NVME_INTEL_QUIRK_READ_LATENCY)) { 597 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_READ_CMD_LATENCY] = true; 598 } 599 if (log_page_directory->write_latency_log_len || 600 (ctrlr->quirks & NVME_INTEL_QUIRK_WRITE_LATENCY)) { 601 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_WRITE_CMD_LATENCY] = true; 602 } 603 if (log_page_directory->temperature_statistics_log_len) { 604 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_TEMPERATURE] = true; 605 } 606 if (log_page_directory->smart_log_len) { 607 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_SMART] = true; 608 } 609 if (log_page_directory->marketing_description_log_len) { 610 ctrlr->log_page_supported[SPDK_NVME_INTEL_MARKETING_DESCRIPTION] = true; 611 } 612 } 613 614 static int nvme_ctrlr_set_intel_support_log_pages(struct spdk_nvme_ctrlr *ctrlr) 615 { 616 int rc = 0; 617 struct nvme_completion_poll_status *status; 618 struct spdk_nvme_intel_log_page_directory *log_page_directory; 619 620 log_page_directory = spdk_zmalloc(sizeof(struct spdk_nvme_intel_log_page_directory), 621 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_DMA); 622 if (log_page_directory == NULL) { 623 SPDK_ERRLOG("could not allocate log_page_directory\n"); 624 return -ENXIO; 625 } 626 627 status = calloc(1, sizeof(*status)); 628 if (!status) { 629 SPDK_ERRLOG("Failed to allocate status tracker\n"); 630 spdk_free(log_page_directory); 631 return -ENOMEM; 632 } 633 634 rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY, 635 SPDK_NVME_GLOBAL_NS_TAG, log_page_directory, 636 sizeof(struct spdk_nvme_intel_log_page_directory), 637 0, nvme_completion_poll_cb, status); 638 if (rc != 0) { 639 spdk_free(log_page_directory); 640 free(status); 641 return rc; 642 } 643 644 if (nvme_wait_for_completion_timeout(ctrlr->adminq, status, 645 ctrlr->opts.admin_timeout_ms / 1000)) { 646 spdk_free(log_page_directory); 647 SPDK_WARNLOG("Intel log pages not supported on Intel drive!\n"); 648 if (!status->timed_out) { 649 free(status); 650 } 651 return 0; 652 } 653 654 nvme_ctrlr_construct_intel_support_log_page_list(ctrlr, log_page_directory); 655 spdk_free(log_page_directory); 656 free(status); 657 return 0; 658 } 659 660 static int 661 nvme_ctrlr_set_supported_log_pages(struct spdk_nvme_ctrlr *ctrlr) 662 { 663 int rc = 0; 664 665 memset(ctrlr->log_page_supported, 0, sizeof(ctrlr->log_page_supported)); 666 /* Mandatory pages */ 667 ctrlr->log_page_supported[SPDK_NVME_LOG_ERROR] = true; 668 ctrlr->log_page_supported[SPDK_NVME_LOG_HEALTH_INFORMATION] = true; 669 ctrlr->log_page_supported[SPDK_NVME_LOG_FIRMWARE_SLOT] = true; 670 if (ctrlr->cdata.lpa.celp) { 671 ctrlr->log_page_supported[SPDK_NVME_LOG_COMMAND_EFFECTS_LOG] = true; 672 } 673 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL && !(ctrlr->quirks & NVME_INTEL_QUIRK_NO_LOG_PAGES)) { 674 rc = nvme_ctrlr_set_intel_support_log_pages(ctrlr); 675 } 676 677 return rc; 678 } 679 680 static void 681 nvme_ctrlr_set_intel_supported_features(struct spdk_nvme_ctrlr *ctrlr) 682 { 683 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_MAX_LBA] = true; 684 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_NATIVE_MAX_LBA] = true; 685 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_POWER_GOVERNOR_SETTING] = true; 686 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_SMBUS_ADDRESS] = true; 687 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LED_PATTERN] = true; 688 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_RESET_TIMED_WORKLOAD_COUNTERS] = true; 689 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LATENCY_TRACKING] = true; 690 } 691 692 static void 693 nvme_ctrlr_set_arbitration_feature(struct spdk_nvme_ctrlr *ctrlr) 694 { 695 uint32_t cdw11; 696 struct nvme_completion_poll_status *status; 697 698 if (ctrlr->opts.arbitration_burst == 0) { 699 return; 700 } 701 702 if (ctrlr->opts.arbitration_burst > 7) { 703 SPDK_WARNLOG("Valid arbitration burst values is from 0-7\n"); 704 return; 705 } 706 707 status = calloc(1, sizeof(*status)); 708 if (!status) { 709 SPDK_ERRLOG("Failed to allocate status tracker\n"); 710 return; 711 } 712 713 cdw11 = ctrlr->opts.arbitration_burst; 714 715 if (spdk_nvme_ctrlr_get_flags(ctrlr) & SPDK_NVME_CTRLR_WRR_SUPPORTED) { 716 cdw11 |= (uint32_t)ctrlr->opts.low_priority_weight << 8; 717 cdw11 |= (uint32_t)ctrlr->opts.medium_priority_weight << 16; 718 cdw11 |= (uint32_t)ctrlr->opts.high_priority_weight << 24; 719 } 720 721 if (spdk_nvme_ctrlr_cmd_set_feature(ctrlr, SPDK_NVME_FEAT_ARBITRATION, 722 cdw11, 0, NULL, 0, 723 nvme_completion_poll_cb, status) < 0) { 724 SPDK_ERRLOG("Set arbitration feature failed\n"); 725 free(status); 726 return; 727 } 728 729 if (nvme_wait_for_completion_timeout(ctrlr->adminq, status, 730 ctrlr->opts.admin_timeout_ms / 1000)) { 731 SPDK_ERRLOG("Timeout to set arbitration feature\n"); 732 } 733 734 if (!status->timed_out) { 735 free(status); 736 } 737 } 738 739 static void 740 nvme_ctrlr_set_supported_features(struct spdk_nvme_ctrlr *ctrlr) 741 { 742 memset(ctrlr->feature_supported, 0, sizeof(ctrlr->feature_supported)); 743 /* Mandatory features */ 744 ctrlr->feature_supported[SPDK_NVME_FEAT_ARBITRATION] = true; 745 ctrlr->feature_supported[SPDK_NVME_FEAT_POWER_MANAGEMENT] = true; 746 ctrlr->feature_supported[SPDK_NVME_FEAT_TEMPERATURE_THRESHOLD] = true; 747 ctrlr->feature_supported[SPDK_NVME_FEAT_ERROR_RECOVERY] = true; 748 ctrlr->feature_supported[SPDK_NVME_FEAT_NUMBER_OF_QUEUES] = true; 749 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_COALESCING] = true; 750 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION] = true; 751 ctrlr->feature_supported[SPDK_NVME_FEAT_WRITE_ATOMICITY] = true; 752 ctrlr->feature_supported[SPDK_NVME_FEAT_ASYNC_EVENT_CONFIGURATION] = true; 753 /* Optional features */ 754 if (ctrlr->cdata.vwc.present) { 755 ctrlr->feature_supported[SPDK_NVME_FEAT_VOLATILE_WRITE_CACHE] = true; 756 } 757 if (ctrlr->cdata.apsta.supported) { 758 ctrlr->feature_supported[SPDK_NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION] = true; 759 } 760 if (ctrlr->cdata.hmpre) { 761 ctrlr->feature_supported[SPDK_NVME_FEAT_HOST_MEM_BUFFER] = true; 762 } 763 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL) { 764 nvme_ctrlr_set_intel_supported_features(ctrlr); 765 } 766 767 nvme_ctrlr_set_arbitration_feature(ctrlr); 768 } 769 770 bool 771 spdk_nvme_ctrlr_is_failed(struct spdk_nvme_ctrlr *ctrlr) 772 { 773 return ctrlr->is_failed; 774 } 775 776 void 777 nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove) 778 { 779 /* 780 * Set the flag here and leave the work failure of qpairs to 781 * spdk_nvme_qpair_process_completions(). 782 */ 783 if (hot_remove) { 784 ctrlr->is_removed = true; 785 } 786 ctrlr->is_failed = true; 787 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 788 SPDK_ERRLOG("ctrlr %s in failed state.\n", ctrlr->trid.traddr); 789 } 790 791 /** 792 * This public API function will try to take the controller lock. 793 * Any private functions being called from a thread already holding 794 * the ctrlr lock should call nvme_ctrlr_fail directly. 795 */ 796 void 797 spdk_nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr) 798 { 799 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 800 nvme_ctrlr_fail(ctrlr, false); 801 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 802 } 803 804 static void 805 nvme_ctrlr_shutdown(struct spdk_nvme_ctrlr *ctrlr) 806 { 807 union spdk_nvme_cc_register cc; 808 union spdk_nvme_csts_register csts; 809 uint32_t ms_waited = 0; 810 uint32_t shutdown_timeout_ms; 811 812 if (ctrlr->is_removed) { 813 return; 814 } 815 816 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 817 SPDK_ERRLOG("ctrlr %s get_cc() failed\n", ctrlr->trid.traddr); 818 return; 819 } 820 821 cc.bits.shn = SPDK_NVME_SHN_NORMAL; 822 823 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 824 SPDK_ERRLOG("ctrlr %s set_cc() failed\n", ctrlr->trid.traddr); 825 return; 826 } 827 828 /* 829 * The NVMe specification defines RTD3E to be the time between 830 * setting SHN = 1 until the controller will set SHST = 10b. 831 * If the device doesn't report RTD3 entry latency, or if it 832 * reports RTD3 entry latency less than 10 seconds, pick 833 * 10 seconds as a reasonable amount of time to 834 * wait before proceeding. 835 */ 836 SPDK_DEBUGLOG(SPDK_LOG_NVME, "RTD3E = %" PRIu32 " us\n", ctrlr->cdata.rtd3e); 837 shutdown_timeout_ms = (ctrlr->cdata.rtd3e + 999) / 1000; 838 shutdown_timeout_ms = spdk_max(shutdown_timeout_ms, 10000); 839 SPDK_DEBUGLOG(SPDK_LOG_NVME, "shutdown timeout = %" PRIu32 " ms\n", shutdown_timeout_ms); 840 841 do { 842 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 843 SPDK_ERRLOG("ctrlr %s get_csts() failed\n", ctrlr->trid.traddr); 844 return; 845 } 846 847 if (csts.bits.shst == SPDK_NVME_SHST_COMPLETE) { 848 SPDK_DEBUGLOG(SPDK_LOG_NVME, "ctrlr %s shutdown complete in %u milliseconds\n", 849 ctrlr->trid.traddr, ms_waited); 850 return; 851 } 852 853 nvme_delay(1000); 854 ms_waited++; 855 } while (ms_waited < shutdown_timeout_ms); 856 857 SPDK_ERRLOG("ctrlr %s did not shutdown within %u milliseconds\n", 858 ctrlr->trid.traddr, shutdown_timeout_ms); 859 if (ctrlr->quirks & NVME_QUIRK_SHST_COMPLETE) { 860 SPDK_ERRLOG("likely due to shutdown handling in the VMWare emulated NVMe SSD\n"); 861 } 862 } 863 864 static int 865 nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr) 866 { 867 union spdk_nvme_cc_register cc; 868 int rc; 869 870 rc = nvme_transport_ctrlr_enable(ctrlr); 871 if (rc != 0) { 872 SPDK_ERRLOG("transport ctrlr_enable failed\n"); 873 return rc; 874 } 875 876 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 877 SPDK_ERRLOG("get_cc() failed\n"); 878 return -EIO; 879 } 880 881 if (cc.bits.en != 0) { 882 SPDK_ERRLOG("called with CC.EN = 1\n"); 883 return -EINVAL; 884 } 885 886 cc.bits.en = 1; 887 cc.bits.css = 0; 888 cc.bits.shn = 0; 889 cc.bits.iosqes = 6; /* SQ entry size == 64 == 2^6 */ 890 cc.bits.iocqes = 4; /* CQ entry size == 16 == 2^4 */ 891 892 /* Page size is 2 ^ (12 + mps). */ 893 cc.bits.mps = spdk_u32log2(ctrlr->page_size) - 12; 894 895 if (ctrlr->cap.bits.css == 0) { 896 SPDK_INFOLOG(SPDK_LOG_NVME, 897 "Drive reports no command sets supported. Assuming NVM is supported.\n"); 898 ctrlr->cap.bits.css = SPDK_NVME_CAP_CSS_NVM; 899 } 900 901 if (!(ctrlr->cap.bits.css & (1u << ctrlr->opts.command_set))) { 902 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Requested I/O command set %u but supported mask is 0x%x\n", 903 ctrlr->opts.command_set, ctrlr->cap.bits.css); 904 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Falling back to NVM. Assuming NVM is supported.\n"); 905 ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NVM; 906 } 907 908 cc.bits.css = ctrlr->opts.command_set; 909 910 switch (ctrlr->opts.arb_mechanism) { 911 case SPDK_NVME_CC_AMS_RR: 912 break; 913 case SPDK_NVME_CC_AMS_WRR: 914 if (SPDK_NVME_CAP_AMS_WRR & ctrlr->cap.bits.ams) { 915 break; 916 } 917 return -EINVAL; 918 case SPDK_NVME_CC_AMS_VS: 919 if (SPDK_NVME_CAP_AMS_VS & ctrlr->cap.bits.ams) { 920 break; 921 } 922 return -EINVAL; 923 default: 924 return -EINVAL; 925 } 926 927 cc.bits.ams = ctrlr->opts.arb_mechanism; 928 929 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 930 SPDK_ERRLOG("set_cc() failed\n"); 931 return -EIO; 932 } 933 934 return 0; 935 } 936 937 static int 938 nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr) 939 { 940 union spdk_nvme_cc_register cc; 941 942 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 943 SPDK_ERRLOG("get_cc() failed\n"); 944 return -EIO; 945 } 946 947 if (cc.bits.en == 0) { 948 return 0; 949 } 950 951 cc.bits.en = 0; 952 953 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 954 SPDK_ERRLOG("set_cc() failed\n"); 955 return -EIO; 956 } 957 958 return 0; 959 } 960 961 #ifdef DEBUG 962 static const char * 963 nvme_ctrlr_state_string(enum nvme_ctrlr_state state) 964 { 965 switch (state) { 966 case NVME_CTRLR_STATE_INIT_DELAY: 967 return "delay init"; 968 case NVME_CTRLR_STATE_INIT: 969 return "init"; 970 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 971 return "disable and wait for CSTS.RDY = 1"; 972 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 973 return "disable and wait for CSTS.RDY = 0"; 974 case NVME_CTRLR_STATE_ENABLE: 975 return "enable controller by writing CC.EN = 1"; 976 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 977 return "wait for CSTS.RDY = 1"; 978 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 979 return "reset admin queue"; 980 case NVME_CTRLR_STATE_IDENTIFY: 981 return "identify controller"; 982 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 983 return "wait for identify controller"; 984 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 985 return "set number of queues"; 986 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 987 return "wait for set number of queues"; 988 case NVME_CTRLR_STATE_CONSTRUCT_NS: 989 return "construct namespaces"; 990 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 991 return "identify active ns"; 992 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 993 return "wait for identify active ns"; 994 case NVME_CTRLR_STATE_IDENTIFY_NS: 995 return "identify ns"; 996 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 997 return "wait for identify ns"; 998 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 999 return "identify namespace id descriptors"; 1000 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 1001 return "wait for identify namespace id descriptors"; 1002 case NVME_CTRLR_STATE_CONFIGURE_AER: 1003 return "configure AER"; 1004 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 1005 return "wait for configure aer"; 1006 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 1007 return "set supported log pages"; 1008 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 1009 return "set supported features"; 1010 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 1011 return "set doorbell buffer config"; 1012 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 1013 return "wait for doorbell buffer config"; 1014 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 1015 return "set keep alive timeout"; 1016 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 1017 return "wait for set keep alive timeout"; 1018 case NVME_CTRLR_STATE_SET_HOST_ID: 1019 return "set host ID"; 1020 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 1021 return "wait for set host ID"; 1022 case NVME_CTRLR_STATE_READY: 1023 return "ready"; 1024 case NVME_CTRLR_STATE_ERROR: 1025 return "error"; 1026 } 1027 return "unknown"; 1028 }; 1029 #endif /* DEBUG */ 1030 1031 static void 1032 nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state, 1033 uint64_t timeout_in_ms) 1034 { 1035 uint64_t ticks_per_ms, timeout_in_ticks, now_ticks; 1036 1037 ctrlr->state = state; 1038 if (timeout_in_ms == NVME_TIMEOUT_INFINITE) { 1039 goto inf; 1040 } 1041 1042 ticks_per_ms = spdk_get_ticks_hz() / 1000; 1043 if (timeout_in_ms > UINT64_MAX / ticks_per_ms) { 1044 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1045 goto inf; 1046 } 1047 1048 now_ticks = spdk_get_ticks(); 1049 timeout_in_ticks = timeout_in_ms * ticks_per_ms; 1050 if (timeout_in_ticks > UINT64_MAX - now_ticks) { 1051 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1052 goto inf; 1053 } 1054 1055 ctrlr->state_timeout_tsc = timeout_in_ticks + now_ticks; 1056 SPDK_DEBUGLOG(SPDK_LOG_NVME, "setting state to %s (timeout %" PRIu64 " ms)\n", 1057 nvme_ctrlr_state_string(ctrlr->state), timeout_in_ms); 1058 return; 1059 inf: 1060 SPDK_DEBUGLOG(SPDK_LOG_NVME, "setting state to %s (no timeout)\n", 1061 nvme_ctrlr_state_string(ctrlr->state)); 1062 ctrlr->state_timeout_tsc = NVME_TIMEOUT_INFINITE; 1063 } 1064 1065 static void 1066 nvme_ctrlr_free_doorbell_buffer(struct spdk_nvme_ctrlr *ctrlr) 1067 { 1068 if (ctrlr->shadow_doorbell) { 1069 spdk_free(ctrlr->shadow_doorbell); 1070 ctrlr->shadow_doorbell = NULL; 1071 } 1072 1073 if (ctrlr->eventidx) { 1074 spdk_free(ctrlr->eventidx); 1075 ctrlr->eventidx = NULL; 1076 } 1077 } 1078 1079 static void 1080 nvme_ctrlr_set_doorbell_buffer_config_done(void *arg, const struct spdk_nvme_cpl *cpl) 1081 { 1082 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1083 1084 if (spdk_nvme_cpl_is_error(cpl)) { 1085 SPDK_WARNLOG("Doorbell buffer config failed\n"); 1086 } else { 1087 SPDK_INFOLOG(SPDK_LOG_NVME, "NVMe controller: %s doorbell buffer config enabled\n", 1088 ctrlr->trid.traddr); 1089 } 1090 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1091 ctrlr->opts.admin_timeout_ms); 1092 } 1093 1094 static int 1095 nvme_ctrlr_set_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr) 1096 { 1097 int rc = 0; 1098 uint64_t prp1, prp2, len; 1099 1100 if (!ctrlr->cdata.oacs.doorbell_buffer_config) { 1101 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1102 ctrlr->opts.admin_timeout_ms); 1103 return 0; 1104 } 1105 1106 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 1107 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1108 ctrlr->opts.admin_timeout_ms); 1109 return 0; 1110 } 1111 1112 /* only 1 page size for doorbell buffer */ 1113 ctrlr->shadow_doorbell = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1114 NULL, SPDK_ENV_LCORE_ID_ANY, 1115 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1116 if (ctrlr->shadow_doorbell == NULL) { 1117 rc = -ENOMEM; 1118 goto error; 1119 } 1120 1121 len = ctrlr->page_size; 1122 prp1 = spdk_vtophys(ctrlr->shadow_doorbell, &len); 1123 if (prp1 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1124 rc = -EFAULT; 1125 goto error; 1126 } 1127 1128 ctrlr->eventidx = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1129 NULL, SPDK_ENV_LCORE_ID_ANY, 1130 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1131 if (ctrlr->eventidx == NULL) { 1132 rc = -ENOMEM; 1133 goto error; 1134 } 1135 1136 len = ctrlr->page_size; 1137 prp2 = spdk_vtophys(ctrlr->eventidx, &len); 1138 if (prp2 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1139 rc = -EFAULT; 1140 goto error; 1141 } 1142 1143 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG, 1144 ctrlr->opts.admin_timeout_ms); 1145 1146 rc = nvme_ctrlr_cmd_doorbell_buffer_config(ctrlr, prp1, prp2, 1147 nvme_ctrlr_set_doorbell_buffer_config_done, ctrlr); 1148 if (rc != 0) { 1149 goto error; 1150 } 1151 1152 return 0; 1153 1154 error: 1155 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1156 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1157 return rc; 1158 } 1159 1160 static void 1161 nvme_ctrlr_abort_queued_aborts(struct spdk_nvme_ctrlr *ctrlr) 1162 { 1163 struct nvme_request *req, *tmp; 1164 struct spdk_nvme_cpl cpl = {}; 1165 1166 cpl.status.sc = SPDK_NVME_SC_ABORTED_SQ_DELETION; 1167 cpl.status.sct = SPDK_NVME_SCT_GENERIC; 1168 1169 STAILQ_FOREACH_SAFE(req, &ctrlr->queued_aborts, stailq, tmp) { 1170 STAILQ_REMOVE_HEAD(&ctrlr->queued_aborts, stailq); 1171 1172 nvme_complete_request(req->cb_fn, req->cb_arg, req->qpair, req, &cpl); 1173 nvme_free_request(req); 1174 } 1175 } 1176 1177 int 1178 spdk_nvme_ctrlr_reset(struct spdk_nvme_ctrlr *ctrlr) 1179 { 1180 int rc = 0; 1181 struct spdk_nvme_qpair *qpair; 1182 1183 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1184 1185 if (ctrlr->is_resetting || ctrlr->is_removed) { 1186 /* 1187 * Controller is already resetting or has been removed. Return 1188 * immediately since there is no need to kick off another 1189 * reset in these cases. 1190 */ 1191 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1192 return ctrlr->is_resetting ? 0 : -ENXIO; 1193 } 1194 1195 ctrlr->is_resetting = true; 1196 ctrlr->is_failed = false; 1197 1198 SPDK_NOTICELOG("resetting controller\n"); 1199 1200 /* Abort all of the queued abort requests */ 1201 nvme_ctrlr_abort_queued_aborts(ctrlr); 1202 1203 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 1204 1205 /* Disable all queues before disabling the controller hardware. */ 1206 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1207 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1208 } 1209 1210 ctrlr->adminq->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1211 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 1212 if (nvme_transport_ctrlr_connect_qpair(ctrlr, ctrlr->adminq) != 0) { 1213 SPDK_ERRLOG("Controller reinitialization failed.\n"); 1214 rc = -1; 1215 goto out; 1216 } 1217 1218 /* Doorbell buffer config is invalid during reset */ 1219 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1220 1221 /* Set the state back to INIT to cause a full hardware reset. */ 1222 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 1223 1224 nvme_qpair_set_state(ctrlr->adminq, NVME_QPAIR_ENABLED); 1225 while (ctrlr->state != NVME_CTRLR_STATE_READY) { 1226 if (nvme_ctrlr_process_init(ctrlr) != 0) { 1227 SPDK_ERRLOG("controller reinitialization failed\n"); 1228 rc = -1; 1229 break; 1230 } 1231 } 1232 1233 /* 1234 * For PCIe controllers, the memory locations of the tranpsort qpair 1235 * don't change when the controller is reset. They simply need to be 1236 * re-enabled with admin commands to the controller. For fabric 1237 * controllers we need to disconnect and reconnect the qpair on its 1238 * own thread outside of the context of the reset. 1239 */ 1240 if (rc == 0 && ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1241 /* Reinitialize qpairs */ 1242 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1243 if (nvme_transport_ctrlr_connect_qpair(ctrlr, qpair) != 0) { 1244 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1245 rc = -1; 1246 continue; 1247 } 1248 } 1249 } 1250 1251 out: 1252 if (rc) { 1253 nvme_ctrlr_fail(ctrlr, false); 1254 } 1255 ctrlr->is_resetting = false; 1256 1257 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1258 1259 if (!ctrlr->cdata.oaes.ns_attribute_notices) { 1260 /* 1261 * If controller doesn't support ns_attribute_notices and 1262 * namespace attributes change (e.g. number of namespaces) 1263 * we need to update system handling device reset. 1264 */ 1265 nvme_io_msg_ctrlr_update(ctrlr); 1266 } 1267 1268 return rc; 1269 } 1270 1271 int 1272 spdk_nvme_ctrlr_set_trid(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_transport_id *trid) 1273 { 1274 int rc = 0; 1275 1276 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1277 1278 if (ctrlr->is_failed == false) { 1279 rc = -EPERM; 1280 goto out; 1281 } 1282 1283 if (trid->trtype != ctrlr->trid.trtype) { 1284 rc = -EINVAL; 1285 goto out; 1286 } 1287 1288 if (strncmp(trid->subnqn, ctrlr->trid.subnqn, SPDK_NVMF_NQN_MAX_LEN)) { 1289 rc = -EINVAL; 1290 goto out; 1291 } 1292 1293 ctrlr->trid = *trid; 1294 1295 out: 1296 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1297 return rc; 1298 } 1299 1300 static void 1301 nvme_ctrlr_identify_done(void *arg, const struct spdk_nvme_cpl *cpl) 1302 { 1303 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1304 1305 if (spdk_nvme_cpl_is_error(cpl)) { 1306 SPDK_ERRLOG("nvme_identify_controller failed!\n"); 1307 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1308 return; 1309 } 1310 1311 /* 1312 * Use MDTS to ensure our default max_xfer_size doesn't exceed what the 1313 * controller supports. 1314 */ 1315 ctrlr->max_xfer_size = nvme_transport_ctrlr_get_max_xfer_size(ctrlr); 1316 SPDK_DEBUGLOG(SPDK_LOG_NVME, "transport max_xfer_size %u\n", ctrlr->max_xfer_size); 1317 if (ctrlr->cdata.mdts > 0) { 1318 ctrlr->max_xfer_size = spdk_min(ctrlr->max_xfer_size, 1319 ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts))); 1320 SPDK_DEBUGLOG(SPDK_LOG_NVME, "MDTS max_xfer_size %u\n", ctrlr->max_xfer_size); 1321 } 1322 1323 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CNTLID 0x%04" PRIx16 "\n", ctrlr->cdata.cntlid); 1324 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1325 ctrlr->cntlid = ctrlr->cdata.cntlid; 1326 } else { 1327 /* 1328 * Fabrics controllers should already have CNTLID from the Connect command. 1329 * 1330 * If CNTLID from Connect doesn't match CNTLID in the Identify Controller data, 1331 * trust the one from Connect. 1332 */ 1333 if (ctrlr->cntlid != ctrlr->cdata.cntlid) { 1334 SPDK_DEBUGLOG(SPDK_LOG_NVME, 1335 "Identify CNTLID 0x%04" PRIx16 " != Connect CNTLID 0x%04" PRIx16 "\n", 1336 ctrlr->cdata.cntlid, ctrlr->cntlid); 1337 } 1338 } 1339 1340 if (ctrlr->cdata.sgls.supported) { 1341 assert(ctrlr->cdata.sgls.supported != 0x3); 1342 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_SUPPORTED; 1343 if (ctrlr->cdata.sgls.supported == 0x2) { 1344 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT; 1345 } 1346 /* 1347 * Use MSDBD to ensure our max_sges doesn't exceed what the 1348 * controller supports. 1349 */ 1350 ctrlr->max_sges = nvme_transport_ctrlr_get_max_sges(ctrlr); 1351 if (ctrlr->cdata.nvmf_specific.msdbd != 0) { 1352 ctrlr->max_sges = spdk_min(ctrlr->cdata.nvmf_specific.msdbd, ctrlr->max_sges); 1353 } else { 1354 /* A value 0 indicates no limit. */ 1355 } 1356 SPDK_DEBUGLOG(SPDK_LOG_NVME, "transport max_sges %u\n", ctrlr->max_sges); 1357 } 1358 1359 if (ctrlr->cdata.oacs.security && !(ctrlr->quirks & NVME_QUIRK_OACS_SECURITY)) { 1360 ctrlr->flags |= SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED; 1361 } 1362 1363 SPDK_DEBUGLOG(SPDK_LOG_NVME, "fuses compare and write: %d\n", ctrlr->cdata.fuses.compare_and_write); 1364 if (ctrlr->cdata.fuses.compare_and_write) { 1365 ctrlr->flags |= SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED; 1366 } 1367 1368 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES, 1369 ctrlr->opts.admin_timeout_ms); 1370 } 1371 1372 static int 1373 nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr) 1374 { 1375 int rc; 1376 1377 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY, 1378 ctrlr->opts.admin_timeout_ms); 1379 1380 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR, 0, 0, 1381 &ctrlr->cdata, sizeof(ctrlr->cdata), 1382 nvme_ctrlr_identify_done, ctrlr); 1383 if (rc != 0) { 1384 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1385 return rc; 1386 } 1387 1388 return 0; 1389 } 1390 1391 enum nvme_active_ns_state { 1392 NVME_ACTIVE_NS_STATE_IDLE, 1393 NVME_ACTIVE_NS_STATE_PROCESSING, 1394 NVME_ACTIVE_NS_STATE_DONE, 1395 NVME_ACTIVE_NS_STATE_ERROR 1396 }; 1397 1398 typedef void (*nvme_active_ns_ctx_deleter)(struct nvme_active_ns_ctx *); 1399 1400 struct nvme_active_ns_ctx { 1401 struct spdk_nvme_ctrlr *ctrlr; 1402 uint32_t page; 1403 uint32_t num_pages; 1404 uint32_t next_nsid; 1405 uint32_t *new_ns_list; 1406 nvme_active_ns_ctx_deleter deleter; 1407 1408 enum nvme_active_ns_state state; 1409 }; 1410 1411 static struct nvme_active_ns_ctx * 1412 nvme_active_ns_ctx_create(struct spdk_nvme_ctrlr *ctrlr, nvme_active_ns_ctx_deleter deleter) 1413 { 1414 struct nvme_active_ns_ctx *ctx; 1415 uint32_t num_pages = 0; 1416 uint32_t *new_ns_list = NULL; 1417 1418 ctx = calloc(1, sizeof(*ctx)); 1419 if (!ctx) { 1420 SPDK_ERRLOG("Failed to allocate nvme_active_ns_ctx!\n"); 1421 return NULL; 1422 } 1423 1424 if (ctrlr->num_ns) { 1425 /* The allocated size must be a multiple of sizeof(struct spdk_nvme_ns_list) */ 1426 num_pages = (ctrlr->num_ns * sizeof(new_ns_list[0]) - 1) / sizeof(struct spdk_nvme_ns_list) + 1; 1427 new_ns_list = spdk_zmalloc(num_pages * sizeof(struct spdk_nvme_ns_list), ctrlr->page_size, 1428 NULL, SPDK_ENV_LCORE_ID_ANY, SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1429 if (!new_ns_list) { 1430 SPDK_ERRLOG("Failed to allocate active_ns_list!\n"); 1431 free(ctx); 1432 return NULL; 1433 } 1434 } 1435 1436 ctx->num_pages = num_pages; 1437 ctx->new_ns_list = new_ns_list; 1438 ctx->ctrlr = ctrlr; 1439 ctx->deleter = deleter; 1440 1441 return ctx; 1442 } 1443 1444 static void 1445 nvme_active_ns_ctx_destroy(struct nvme_active_ns_ctx *ctx) 1446 { 1447 spdk_free(ctx->new_ns_list); 1448 free(ctx); 1449 } 1450 1451 static void 1452 nvme_ctrlr_identify_active_ns_swap(struct spdk_nvme_ctrlr *ctrlr, uint32_t **new_ns_list) 1453 { 1454 spdk_free(ctrlr->active_ns_list); 1455 ctrlr->active_ns_list = *new_ns_list; 1456 *new_ns_list = NULL; 1457 } 1458 1459 static void 1460 nvme_ctrlr_identify_active_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1461 { 1462 struct nvme_active_ns_ctx *ctx = arg; 1463 1464 if (spdk_nvme_cpl_is_error(cpl)) { 1465 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1466 goto out; 1467 } 1468 1469 ctx->next_nsid = ctx->new_ns_list[1024 * ctx->page + 1023]; 1470 if (ctx->next_nsid == 0 || ++ctx->page == ctx->num_pages) { 1471 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1472 goto out; 1473 } 1474 1475 nvme_ctrlr_identify_active_ns_async(ctx); 1476 return; 1477 1478 out: 1479 if (ctx->deleter) { 1480 ctx->deleter(ctx); 1481 } 1482 } 1483 1484 static void 1485 nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx) 1486 { 1487 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1488 uint32_t i; 1489 int rc; 1490 1491 if (ctrlr->num_ns == 0) { 1492 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1493 goto out; 1494 } 1495 1496 /* 1497 * If controller doesn't support active ns list CNS 0x02 dummy up 1498 * an active ns list, i.e. all namespaces report as active 1499 */ 1500 if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 1, 0) || ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS) { 1501 for (i = 0; i < ctrlr->num_ns; i++) { 1502 ctx->new_ns_list[i] = i + 1; 1503 } 1504 1505 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1506 goto out; 1507 } 1508 1509 ctx->state = NVME_ACTIVE_NS_STATE_PROCESSING; 1510 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_ACTIVE_NS_LIST, 0, ctx->next_nsid, 1511 &ctx->new_ns_list[1024 * ctx->page], sizeof(struct spdk_nvme_ns_list), 1512 nvme_ctrlr_identify_active_ns_async_done, ctx); 1513 if (rc != 0) { 1514 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1515 goto out; 1516 } 1517 1518 return; 1519 1520 out: 1521 if (ctx->deleter) { 1522 ctx->deleter(ctx); 1523 } 1524 } 1525 1526 static void 1527 _nvme_active_ns_ctx_deleter(struct nvme_active_ns_ctx *ctx) 1528 { 1529 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1530 1531 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1532 nvme_ctrlr_destruct_namespaces(ctrlr); 1533 nvme_active_ns_ctx_destroy(ctx); 1534 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1535 return; 1536 } 1537 1538 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1539 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1540 nvme_active_ns_ctx_destroy(ctx); 1541 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS, ctrlr->opts.admin_timeout_ms); 1542 } 1543 1544 static void 1545 _nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1546 { 1547 struct nvme_active_ns_ctx *ctx; 1548 1549 ctx = nvme_active_ns_ctx_create(ctrlr, _nvme_active_ns_ctx_deleter); 1550 if (!ctx) { 1551 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1552 return; 1553 } 1554 1555 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS, 1556 ctrlr->opts.admin_timeout_ms); 1557 nvme_ctrlr_identify_active_ns_async(ctx); 1558 } 1559 1560 int 1561 nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1562 { 1563 struct nvme_active_ns_ctx *ctx; 1564 int rc; 1565 1566 ctx = nvme_active_ns_ctx_create(ctrlr, NULL); 1567 if (!ctx) { 1568 return -ENOMEM; 1569 } 1570 1571 nvme_ctrlr_identify_active_ns_async(ctx); 1572 while (ctx->state == NVME_ACTIVE_NS_STATE_PROCESSING) { 1573 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 1574 if (rc < 0) { 1575 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1576 break; 1577 } 1578 } 1579 1580 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1581 nvme_active_ns_ctx_destroy(ctx); 1582 return -ENXIO; 1583 } 1584 1585 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1586 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1587 nvme_active_ns_ctx_destroy(ctx); 1588 1589 return 0; 1590 } 1591 1592 static void 1593 nvme_ctrlr_identify_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1594 { 1595 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1596 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1597 uint32_t nsid; 1598 int rc; 1599 1600 if (spdk_nvme_cpl_is_error(cpl)) { 1601 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1602 return; 1603 } else { 1604 nvme_ns_set_identify_data(ns); 1605 } 1606 1607 /* move on to the next active NS */ 1608 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1609 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1610 if (ns == NULL) { 1611 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ID_DESCS, 1612 ctrlr->opts.admin_timeout_ms); 1613 return; 1614 } 1615 ns->ctrlr = ctrlr; 1616 ns->id = nsid; 1617 1618 rc = nvme_ctrlr_identify_ns_async(ns); 1619 if (rc) { 1620 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1621 } 1622 } 1623 1624 static int 1625 nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns) 1626 { 1627 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1628 struct spdk_nvme_ns_data *nsdata; 1629 1630 nsdata = &ctrlr->nsdata[ns->id - 1]; 1631 1632 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS, 1633 ctrlr->opts.admin_timeout_ms); 1634 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS, 0, ns->id, 1635 nsdata, sizeof(*nsdata), 1636 nvme_ctrlr_identify_ns_async_done, ns); 1637 } 1638 1639 static int 1640 nvme_ctrlr_identify_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1641 { 1642 uint32_t nsid; 1643 struct spdk_nvme_ns *ns; 1644 int rc; 1645 1646 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1647 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1648 if (ns == NULL) { 1649 /* No active NS, move on to the next state */ 1650 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1651 ctrlr->opts.admin_timeout_ms); 1652 return 0; 1653 } 1654 1655 ns->ctrlr = ctrlr; 1656 ns->id = nsid; 1657 1658 rc = nvme_ctrlr_identify_ns_async(ns); 1659 if (rc) { 1660 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1661 } 1662 1663 return rc; 1664 } 1665 1666 static void 1667 nvme_ctrlr_identify_id_desc_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1668 { 1669 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1670 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1671 uint32_t nsid; 1672 int rc; 1673 1674 if (spdk_nvme_cpl_is_error(cpl)) { 1675 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1676 ctrlr->opts.admin_timeout_ms); 1677 return; 1678 } 1679 1680 /* move on to the next active NS */ 1681 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1682 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1683 if (ns == NULL) { 1684 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1685 ctrlr->opts.admin_timeout_ms); 1686 return; 1687 } 1688 1689 rc = nvme_ctrlr_identify_id_desc_async(ns); 1690 if (rc) { 1691 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1692 } 1693 } 1694 1695 static int 1696 nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns) 1697 { 1698 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1699 1700 memset(ns->id_desc_list, 0, sizeof(ns->id_desc_list)); 1701 1702 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS, 1703 ctrlr->opts.admin_timeout_ms); 1704 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_ID_DESCRIPTOR_LIST, 1705 0, ns->id, ns->id_desc_list, sizeof(ns->id_desc_list), 1706 nvme_ctrlr_identify_id_desc_async_done, ns); 1707 } 1708 1709 static int 1710 nvme_ctrlr_identify_id_desc_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1711 { 1712 uint32_t nsid; 1713 struct spdk_nvme_ns *ns; 1714 int rc; 1715 1716 if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 3, 0) || 1717 (ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 1718 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Version < 1.3; not attempting to retrieve NS ID Descriptor List\n"); 1719 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1720 ctrlr->opts.admin_timeout_ms); 1721 return 0; 1722 } 1723 1724 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1725 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1726 if (ns == NULL) { 1727 /* No active NS, move on to the next state */ 1728 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1729 ctrlr->opts.admin_timeout_ms); 1730 return 0; 1731 } 1732 1733 rc = nvme_ctrlr_identify_id_desc_async(ns); 1734 if (rc) { 1735 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1736 } 1737 1738 return rc; 1739 } 1740 1741 static void 1742 nvme_ctrlr_update_nvmf_ioccsz(struct spdk_nvme_ctrlr *ctrlr) 1743 { 1744 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_RDMA || 1745 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_TCP || 1746 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_FC) { 1747 if (ctrlr->cdata.nvmf_specific.ioccsz < 4) { 1748 SPDK_ERRLOG("Incorrect IOCCSZ %u, the minimum value should be 4\n", 1749 ctrlr->cdata.nvmf_specific.ioccsz); 1750 ctrlr->cdata.nvmf_specific.ioccsz = 4; 1751 assert(0); 1752 } 1753 ctrlr->ioccsz_bytes = ctrlr->cdata.nvmf_specific.ioccsz * 16 - sizeof(struct spdk_nvme_cmd); 1754 ctrlr->icdoff = ctrlr->cdata.nvmf_specific.icdoff; 1755 } 1756 } 1757 1758 static void 1759 nvme_ctrlr_set_num_queues_done(void *arg, const struct spdk_nvme_cpl *cpl) 1760 { 1761 uint32_t cq_allocated, sq_allocated, min_allocated, i; 1762 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1763 1764 if (spdk_nvme_cpl_is_error(cpl)) { 1765 SPDK_ERRLOG("Set Features - Number of Queues failed!\n"); 1766 ctrlr->opts.num_io_queues = 0; 1767 } else { 1768 /* 1769 * Data in cdw0 is 0-based. 1770 * Lower 16-bits indicate number of submission queues allocated. 1771 * Upper 16-bits indicate number of completion queues allocated. 1772 */ 1773 sq_allocated = (cpl->cdw0 & 0xFFFF) + 1; 1774 cq_allocated = (cpl->cdw0 >> 16) + 1; 1775 1776 /* 1777 * For 1:1 queue mapping, set number of allocated queues to be minimum of 1778 * submission and completion queues. 1779 */ 1780 min_allocated = spdk_min(sq_allocated, cq_allocated); 1781 1782 /* Set number of queues to be minimum of requested and actually allocated. */ 1783 ctrlr->opts.num_io_queues = spdk_min(min_allocated, ctrlr->opts.num_io_queues); 1784 } 1785 1786 ctrlr->free_io_qids = spdk_bit_array_create(ctrlr->opts.num_io_queues + 1); 1787 if (ctrlr->free_io_qids == NULL) { 1788 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1789 return; 1790 } 1791 1792 /* Initialize list of free I/O queue IDs. QID 0 is the admin queue. */ 1793 spdk_bit_array_clear(ctrlr->free_io_qids, 0); 1794 for (i = 1; i <= ctrlr->opts.num_io_queues; i++) { 1795 spdk_bit_array_set(ctrlr->free_io_qids, i); 1796 } 1797 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONSTRUCT_NS, 1798 ctrlr->opts.admin_timeout_ms); 1799 } 1800 1801 static int 1802 nvme_ctrlr_set_num_queues(struct spdk_nvme_ctrlr *ctrlr) 1803 { 1804 int rc; 1805 1806 if (ctrlr->opts.num_io_queues > SPDK_NVME_MAX_IO_QUEUES) { 1807 SPDK_NOTICELOG("Limiting requested num_io_queues %u to max %d\n", 1808 ctrlr->opts.num_io_queues, SPDK_NVME_MAX_IO_QUEUES); 1809 ctrlr->opts.num_io_queues = SPDK_NVME_MAX_IO_QUEUES; 1810 } else if (ctrlr->opts.num_io_queues < 1) { 1811 SPDK_NOTICELOG("Requested num_io_queues 0, increasing to 1\n"); 1812 ctrlr->opts.num_io_queues = 1; 1813 } 1814 1815 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES, 1816 ctrlr->opts.admin_timeout_ms); 1817 1818 rc = nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->opts.num_io_queues, 1819 nvme_ctrlr_set_num_queues_done, ctrlr); 1820 if (rc != 0) { 1821 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1822 return rc; 1823 } 1824 1825 return 0; 1826 } 1827 1828 static void 1829 nvme_ctrlr_set_keep_alive_timeout_done(void *arg, const struct spdk_nvme_cpl *cpl) 1830 { 1831 uint32_t keep_alive_interval_ms; 1832 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1833 1834 if (spdk_nvme_cpl_is_error(cpl)) { 1835 if ((cpl->status.sct == SPDK_NVME_SCT_GENERIC) && 1836 (cpl->status.sc == SPDK_NVME_SC_INVALID_FIELD)) { 1837 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Keep alive timeout Get Feature is not supported\n"); 1838 } else { 1839 SPDK_ERRLOG("Keep alive timeout Get Feature failed: SC %x SCT %x\n", 1840 cpl->status.sc, cpl->status.sct); 1841 ctrlr->opts.keep_alive_timeout_ms = 0; 1842 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1843 return; 1844 } 1845 } else { 1846 if (ctrlr->opts.keep_alive_timeout_ms != cpl->cdw0) { 1847 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Controller adjusted keep alive timeout to %u ms\n", 1848 cpl->cdw0); 1849 } 1850 1851 ctrlr->opts.keep_alive_timeout_ms = cpl->cdw0; 1852 } 1853 1854 keep_alive_interval_ms = ctrlr->opts.keep_alive_timeout_ms / 2; 1855 if (keep_alive_interval_ms == 0) { 1856 keep_alive_interval_ms = 1; 1857 } 1858 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Sending keep alive every %u ms\n", keep_alive_interval_ms); 1859 1860 ctrlr->keep_alive_interval_ticks = (keep_alive_interval_ms * spdk_get_ticks_hz()) / UINT64_C(1000); 1861 1862 /* Schedule the first Keep Alive to be sent as soon as possible. */ 1863 ctrlr->next_keep_alive_tick = spdk_get_ticks(); 1864 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1865 ctrlr->opts.admin_timeout_ms); 1866 } 1867 1868 static int 1869 nvme_ctrlr_set_keep_alive_timeout(struct spdk_nvme_ctrlr *ctrlr) 1870 { 1871 int rc; 1872 1873 if (ctrlr->opts.keep_alive_timeout_ms == 0) { 1874 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1875 ctrlr->opts.admin_timeout_ms); 1876 return 0; 1877 } 1878 1879 if (ctrlr->cdata.kas == 0) { 1880 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Controller KAS is 0 - not enabling Keep Alive\n"); 1881 ctrlr->opts.keep_alive_timeout_ms = 0; 1882 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1883 ctrlr->opts.admin_timeout_ms); 1884 return 0; 1885 } 1886 1887 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT, 1888 ctrlr->opts.admin_timeout_ms); 1889 1890 /* Retrieve actual keep alive timeout, since the controller may have adjusted it. */ 1891 rc = spdk_nvme_ctrlr_cmd_get_feature(ctrlr, SPDK_NVME_FEAT_KEEP_ALIVE_TIMER, 0, NULL, 0, 1892 nvme_ctrlr_set_keep_alive_timeout_done, ctrlr); 1893 if (rc != 0) { 1894 SPDK_ERRLOG("Keep alive timeout Get Feature failed: %d\n", rc); 1895 ctrlr->opts.keep_alive_timeout_ms = 0; 1896 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1897 return rc; 1898 } 1899 1900 return 0; 1901 } 1902 1903 static void 1904 nvme_ctrlr_set_host_id_done(void *arg, const struct spdk_nvme_cpl *cpl) 1905 { 1906 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1907 1908 if (spdk_nvme_cpl_is_error(cpl)) { 1909 /* 1910 * Treat Set Features - Host ID failure as non-fatal, since the Host ID feature 1911 * is optional. 1912 */ 1913 SPDK_WARNLOG("Set Features - Host ID failed: SC 0x%x SCT 0x%x\n", 1914 cpl->status.sc, cpl->status.sct); 1915 } else { 1916 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Set Features - Host ID was successful\n"); 1917 } 1918 1919 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1920 } 1921 1922 static int 1923 nvme_ctrlr_set_host_id(struct spdk_nvme_ctrlr *ctrlr) 1924 { 1925 uint8_t *host_id; 1926 uint32_t host_id_size; 1927 int rc; 1928 1929 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 1930 /* 1931 * NVMe-oF sends the host ID during Connect and doesn't allow 1932 * Set Features - Host Identifier after Connect, so we don't need to do anything here. 1933 */ 1934 SPDK_DEBUGLOG(SPDK_LOG_NVME, "NVMe-oF transport - not sending Set Features - Host ID\n"); 1935 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1936 return 0; 1937 } 1938 1939 if (ctrlr->cdata.ctratt.host_id_exhid_supported) { 1940 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Using 128-bit extended host identifier\n"); 1941 host_id = ctrlr->opts.extended_host_id; 1942 host_id_size = sizeof(ctrlr->opts.extended_host_id); 1943 } else { 1944 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Using 64-bit host identifier\n"); 1945 host_id = ctrlr->opts.host_id; 1946 host_id_size = sizeof(ctrlr->opts.host_id); 1947 } 1948 1949 /* If the user specified an all-zeroes host identifier, don't send the command. */ 1950 if (spdk_mem_all_zero(host_id, host_id_size)) { 1951 SPDK_DEBUGLOG(SPDK_LOG_NVME, 1952 "User did not specify host ID - not sending Set Features - Host ID\n"); 1953 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1954 return 0; 1955 } 1956 1957 SPDK_LOGDUMP(SPDK_LOG_NVME, "host_id", host_id, host_id_size); 1958 1959 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_HOST_ID, 1960 ctrlr->opts.admin_timeout_ms); 1961 1962 rc = nvme_ctrlr_cmd_set_host_id(ctrlr, host_id, host_id_size, nvme_ctrlr_set_host_id_done, ctrlr); 1963 if (rc != 0) { 1964 SPDK_ERRLOG("Set Features - Host ID failed: %d\n", rc); 1965 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1966 return rc; 1967 } 1968 1969 return 0; 1970 } 1971 1972 static void 1973 nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1974 { 1975 if (ctrlr->ns) { 1976 uint32_t i, num_ns = ctrlr->num_ns; 1977 1978 for (i = 0; i < num_ns; i++) { 1979 nvme_ns_destruct(&ctrlr->ns[i]); 1980 } 1981 1982 spdk_free(ctrlr->ns); 1983 ctrlr->ns = NULL; 1984 ctrlr->num_ns = 0; 1985 } 1986 1987 if (ctrlr->nsdata) { 1988 spdk_free(ctrlr->nsdata); 1989 ctrlr->nsdata = NULL; 1990 } 1991 1992 spdk_free(ctrlr->active_ns_list); 1993 ctrlr->active_ns_list = NULL; 1994 } 1995 1996 static void 1997 nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1998 { 1999 uint32_t i, nn = ctrlr->cdata.nn; 2000 struct spdk_nvme_ns_data *nsdata; 2001 bool ns_is_active; 2002 2003 for (i = 0; i < nn; i++) { 2004 struct spdk_nvme_ns *ns = &ctrlr->ns[i]; 2005 uint32_t nsid = i + 1; 2006 2007 nsdata = &ctrlr->nsdata[nsid - 1]; 2008 ns_is_active = spdk_nvme_ctrlr_is_active_ns(ctrlr, nsid); 2009 2010 if (nsdata->ncap && ns_is_active) { 2011 if (nvme_ns_update(ns) != 0) { 2012 SPDK_ERRLOG("Failed to update active NS %u\n", nsid); 2013 continue; 2014 } 2015 } 2016 2017 if ((nsdata->ncap == 0) && ns_is_active) { 2018 if (nvme_ns_construct(ns, nsid, ctrlr) != 0) { 2019 continue; 2020 } 2021 } 2022 2023 if (nsdata->ncap && !ns_is_active) { 2024 nvme_ns_destruct(ns); 2025 } 2026 } 2027 } 2028 2029 static int 2030 nvme_ctrlr_construct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 2031 { 2032 int rc = 0; 2033 uint32_t nn = ctrlr->cdata.nn; 2034 2035 /* ctrlr->num_ns may be 0 (startup) or a different number of namespaces (reset), 2036 * so check if we need to reallocate. 2037 */ 2038 if (nn != ctrlr->num_ns) { 2039 nvme_ctrlr_destruct_namespaces(ctrlr); 2040 2041 if (nn == 0) { 2042 SPDK_WARNLOG("controller has 0 namespaces\n"); 2043 return 0; 2044 } 2045 2046 ctrlr->ns = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns), 64, NULL, 2047 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2048 if (ctrlr->ns == NULL) { 2049 rc = -ENOMEM; 2050 goto fail; 2051 } 2052 2053 ctrlr->nsdata = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns_data), 64, 2054 NULL, SPDK_ENV_SOCKET_ID_ANY, 2055 SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA); 2056 if (ctrlr->nsdata == NULL) { 2057 rc = -ENOMEM; 2058 goto fail; 2059 } 2060 2061 ctrlr->num_ns = nn; 2062 } 2063 2064 return 0; 2065 2066 fail: 2067 nvme_ctrlr_destruct_namespaces(ctrlr); 2068 return rc; 2069 } 2070 2071 static void 2072 nvme_ctrlr_async_event_cb(void *arg, const struct spdk_nvme_cpl *cpl) 2073 { 2074 struct nvme_async_event_request *aer = arg; 2075 struct spdk_nvme_ctrlr *ctrlr = aer->ctrlr; 2076 struct spdk_nvme_ctrlr_process *active_proc; 2077 union spdk_nvme_async_event_completion event; 2078 int rc; 2079 2080 if (cpl->status.sct == SPDK_NVME_SCT_GENERIC && 2081 cpl->status.sc == SPDK_NVME_SC_ABORTED_SQ_DELETION) { 2082 /* 2083 * This is simulated when controller is being shut down, to 2084 * effectively abort outstanding asynchronous event requests 2085 * and make sure all memory is freed. Do not repost the 2086 * request in this case. 2087 */ 2088 return; 2089 } 2090 2091 if (cpl->status.sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 2092 cpl->status.sc == SPDK_NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED) { 2093 /* 2094 * SPDK will only send as many AERs as the device says it supports, 2095 * so this status code indicates an out-of-spec device. Do not repost 2096 * the request in this case. 2097 */ 2098 SPDK_ERRLOG("Controller appears out-of-spec for asynchronous event request\n" 2099 "handling. Do not repost this AER.\n"); 2100 return; 2101 } 2102 2103 event.raw = cpl->cdw0; 2104 if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) && 2105 (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_NS_ATTR_CHANGED)) { 2106 rc = nvme_ctrlr_identify_active_ns(ctrlr); 2107 if (rc) { 2108 return; 2109 } 2110 nvme_ctrlr_update_namespaces(ctrlr); 2111 nvme_io_msg_ctrlr_update(ctrlr); 2112 } 2113 2114 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2115 if (active_proc && active_proc->aer_cb_fn) { 2116 active_proc->aer_cb_fn(active_proc->aer_cb_arg, cpl); 2117 } 2118 2119 /* If the ctrlr was removed or in the destruct state, we should not send aer again */ 2120 if (ctrlr->is_removed || ctrlr->is_destructed) { 2121 return; 2122 } 2123 2124 /* 2125 * Repost another asynchronous event request to replace the one 2126 * that just completed. 2127 */ 2128 if (nvme_ctrlr_construct_and_submit_aer(ctrlr, aer)) { 2129 /* 2130 * We can't do anything to recover from a failure here, 2131 * so just print a warning message and leave the AER unsubmitted. 2132 */ 2133 SPDK_ERRLOG("resubmitting AER failed!\n"); 2134 } 2135 } 2136 2137 static int 2138 nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 2139 struct nvme_async_event_request *aer) 2140 { 2141 struct nvme_request *req; 2142 2143 aer->ctrlr = ctrlr; 2144 req = nvme_allocate_request_null(ctrlr->adminq, nvme_ctrlr_async_event_cb, aer); 2145 aer->req = req; 2146 if (req == NULL) { 2147 return -1; 2148 } 2149 2150 req->cmd.opc = SPDK_NVME_OPC_ASYNC_EVENT_REQUEST; 2151 return nvme_ctrlr_submit_admin_request(ctrlr, req); 2152 } 2153 2154 static void 2155 nvme_ctrlr_configure_aer_done(void *arg, const struct spdk_nvme_cpl *cpl) 2156 { 2157 struct nvme_async_event_request *aer; 2158 int rc; 2159 uint32_t i; 2160 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2161 2162 if (spdk_nvme_cpl_is_error(cpl)) { 2163 SPDK_NOTICELOG("nvme_ctrlr_configure_aer failed!\n"); 2164 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2165 ctrlr->opts.admin_timeout_ms); 2166 return; 2167 } 2168 2169 /* aerl is a zero-based value, so we need to add 1 here. */ 2170 ctrlr->num_aers = spdk_min(NVME_MAX_ASYNC_EVENTS, (ctrlr->cdata.aerl + 1)); 2171 2172 for (i = 0; i < ctrlr->num_aers; i++) { 2173 aer = &ctrlr->aer[i]; 2174 rc = nvme_ctrlr_construct_and_submit_aer(ctrlr, aer); 2175 if (rc) { 2176 SPDK_ERRLOG("nvme_ctrlr_construct_and_submit_aer failed!\n"); 2177 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2178 return; 2179 } 2180 } 2181 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2182 ctrlr->opts.admin_timeout_ms); 2183 } 2184 2185 static int 2186 nvme_ctrlr_configure_aer(struct spdk_nvme_ctrlr *ctrlr) 2187 { 2188 union spdk_nvme_feat_async_event_configuration config; 2189 int rc; 2190 2191 config.raw = 0; 2192 config.bits.crit_warn.bits.available_spare = 1; 2193 config.bits.crit_warn.bits.temperature = 1; 2194 config.bits.crit_warn.bits.device_reliability = 1; 2195 config.bits.crit_warn.bits.read_only = 1; 2196 config.bits.crit_warn.bits.volatile_memory_backup = 1; 2197 2198 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 2, 0)) { 2199 if (ctrlr->cdata.oaes.ns_attribute_notices) { 2200 config.bits.ns_attr_notice = 1; 2201 } 2202 if (ctrlr->cdata.oaes.fw_activation_notices) { 2203 config.bits.fw_activation_notice = 1; 2204 } 2205 } 2206 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 3, 0) && ctrlr->cdata.lpa.telemetry) { 2207 config.bits.telemetry_log_notice = 1; 2208 } 2209 2210 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER, 2211 ctrlr->opts.admin_timeout_ms); 2212 2213 rc = nvme_ctrlr_cmd_set_async_event_config(ctrlr, config, 2214 nvme_ctrlr_configure_aer_done, 2215 ctrlr); 2216 if (rc != 0) { 2217 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2218 return rc; 2219 } 2220 2221 return 0; 2222 } 2223 2224 struct spdk_nvme_ctrlr_process * 2225 nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr, pid_t pid) 2226 { 2227 struct spdk_nvme_ctrlr_process *active_proc; 2228 2229 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2230 if (active_proc->pid == pid) { 2231 return active_proc; 2232 } 2233 } 2234 2235 return NULL; 2236 } 2237 2238 struct spdk_nvme_ctrlr_process * 2239 nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr) 2240 { 2241 return nvme_ctrlr_get_process(ctrlr, getpid()); 2242 } 2243 2244 /** 2245 * This function will be called when a process is using the controller. 2246 * 1. For the primary process, it is called when constructing the controller. 2247 * 2. For the secondary process, it is called at probing the controller. 2248 * Note: will check whether the process is already added for the same process. 2249 */ 2250 int 2251 nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle) 2252 { 2253 struct spdk_nvme_ctrlr_process *ctrlr_proc; 2254 pid_t pid = getpid(); 2255 2256 /* Check whether the process is already added or not */ 2257 if (nvme_ctrlr_get_process(ctrlr, pid)) { 2258 return 0; 2259 } 2260 2261 /* Initialize the per process properties for this ctrlr */ 2262 ctrlr_proc = spdk_zmalloc(sizeof(struct spdk_nvme_ctrlr_process), 2263 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2264 if (ctrlr_proc == NULL) { 2265 SPDK_ERRLOG("failed to allocate memory to track the process props\n"); 2266 2267 return -1; 2268 } 2269 2270 ctrlr_proc->is_primary = spdk_process_is_primary(); 2271 ctrlr_proc->pid = pid; 2272 STAILQ_INIT(&ctrlr_proc->active_reqs); 2273 ctrlr_proc->devhandle = devhandle; 2274 ctrlr_proc->ref = 0; 2275 TAILQ_INIT(&ctrlr_proc->allocated_io_qpairs); 2276 2277 TAILQ_INSERT_TAIL(&ctrlr->active_procs, ctrlr_proc, tailq); 2278 2279 return 0; 2280 } 2281 2282 /** 2283 * This function will be called when the process detaches the controller. 2284 * Note: the ctrlr_lock must be held when calling this function. 2285 */ 2286 static void 2287 nvme_ctrlr_remove_process(struct spdk_nvme_ctrlr *ctrlr, 2288 struct spdk_nvme_ctrlr_process *proc) 2289 { 2290 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2291 2292 assert(STAILQ_EMPTY(&proc->active_reqs)); 2293 2294 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2295 spdk_nvme_ctrlr_free_io_qpair(qpair); 2296 } 2297 2298 TAILQ_REMOVE(&ctrlr->active_procs, proc, tailq); 2299 2300 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 2301 spdk_pci_device_detach(proc->devhandle); 2302 } 2303 2304 spdk_free(proc); 2305 } 2306 2307 /** 2308 * This function will be called when the process exited unexpectedly 2309 * in order to free any incomplete nvme request, allocated IO qpairs 2310 * and allocated memory. 2311 * Note: the ctrlr_lock must be held when calling this function. 2312 */ 2313 static void 2314 nvme_ctrlr_cleanup_process(struct spdk_nvme_ctrlr_process *proc) 2315 { 2316 struct nvme_request *req, *tmp_req; 2317 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2318 2319 STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) { 2320 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq); 2321 2322 assert(req->pid == proc->pid); 2323 2324 nvme_free_request(req); 2325 } 2326 2327 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2328 TAILQ_REMOVE(&proc->allocated_io_qpairs, qpair, per_process_tailq); 2329 2330 /* 2331 * The process may have been killed while some qpairs were in their 2332 * completion context. Clear that flag here to allow these IO 2333 * qpairs to be deleted. 2334 */ 2335 qpair->in_completion_context = 0; 2336 2337 qpair->no_deletion_notification_needed = 1; 2338 2339 spdk_nvme_ctrlr_free_io_qpair(qpair); 2340 } 2341 2342 spdk_free(proc); 2343 } 2344 2345 /** 2346 * This function will be called when destructing the controller. 2347 * 1. There is no more admin request on this controller. 2348 * 2. Clean up any left resource allocation when its associated process is gone. 2349 */ 2350 void 2351 nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr) 2352 { 2353 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2354 2355 /* Free all the processes' properties and make sure no pending admin IOs */ 2356 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2357 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2358 2359 assert(STAILQ_EMPTY(&active_proc->active_reqs)); 2360 2361 spdk_free(active_proc); 2362 } 2363 } 2364 2365 /** 2366 * This function will be called when any other process attaches or 2367 * detaches the controller in order to cleanup those unexpectedly 2368 * terminated processes. 2369 * Note: the ctrlr_lock must be held when calling this function. 2370 */ 2371 static int 2372 nvme_ctrlr_remove_inactive_proc(struct spdk_nvme_ctrlr *ctrlr) 2373 { 2374 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2375 int active_proc_count = 0; 2376 2377 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2378 if ((kill(active_proc->pid, 0) == -1) && (errno == ESRCH)) { 2379 SPDK_ERRLOG("process %d terminated unexpected\n", active_proc->pid); 2380 2381 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2382 2383 nvme_ctrlr_cleanup_process(active_proc); 2384 } else { 2385 active_proc_count++; 2386 } 2387 } 2388 2389 return active_proc_count; 2390 } 2391 2392 void 2393 nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr) 2394 { 2395 struct spdk_nvme_ctrlr_process *active_proc; 2396 2397 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2398 2399 nvme_ctrlr_remove_inactive_proc(ctrlr); 2400 2401 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2402 if (active_proc) { 2403 active_proc->ref++; 2404 } 2405 2406 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2407 } 2408 2409 void 2410 nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr) 2411 { 2412 struct spdk_nvme_ctrlr_process *active_proc; 2413 int proc_count; 2414 2415 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2416 2417 proc_count = nvme_ctrlr_remove_inactive_proc(ctrlr); 2418 2419 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2420 if (active_proc) { 2421 active_proc->ref--; 2422 assert(active_proc->ref >= 0); 2423 2424 /* 2425 * The last active process will be removed at the end of 2426 * the destruction of the controller. 2427 */ 2428 if (active_proc->ref == 0 && proc_count != 1) { 2429 nvme_ctrlr_remove_process(ctrlr, active_proc); 2430 } 2431 } 2432 2433 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2434 } 2435 2436 int 2437 nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr) 2438 { 2439 struct spdk_nvme_ctrlr_process *active_proc; 2440 int ref = 0; 2441 2442 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2443 2444 nvme_ctrlr_remove_inactive_proc(ctrlr); 2445 2446 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2447 ref += active_proc->ref; 2448 } 2449 2450 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2451 2452 return ref; 2453 } 2454 2455 /** 2456 * Get the PCI device handle which is only visible to its associated process. 2457 */ 2458 struct spdk_pci_device * 2459 nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr) 2460 { 2461 struct spdk_nvme_ctrlr_process *active_proc; 2462 struct spdk_pci_device *devhandle = NULL; 2463 2464 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2465 2466 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2467 if (active_proc) { 2468 devhandle = active_proc->devhandle; 2469 } 2470 2471 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2472 2473 return devhandle; 2474 } 2475 2476 /** 2477 * This function will be called repeatedly during initialization until the controller is ready. 2478 */ 2479 int 2480 nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr) 2481 { 2482 union spdk_nvme_cc_register cc; 2483 union spdk_nvme_csts_register csts; 2484 uint32_t ready_timeout_in_ms; 2485 int rc = 0; 2486 2487 /* 2488 * May need to avoid accessing any register on the target controller 2489 * for a while. Return early without touching the FSM. 2490 * Check sleep_timeout_tsc > 0 for unit test. 2491 */ 2492 if ((ctrlr->sleep_timeout_tsc > 0) && 2493 (spdk_get_ticks() <= ctrlr->sleep_timeout_tsc)) { 2494 return 0; 2495 } 2496 ctrlr->sleep_timeout_tsc = 0; 2497 2498 if (nvme_ctrlr_get_cc(ctrlr, &cc) || 2499 nvme_ctrlr_get_csts(ctrlr, &csts)) { 2500 if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) { 2501 /* While a device is resetting, it may be unable to service MMIO reads 2502 * temporarily. Allow for this case. 2503 */ 2504 SPDK_ERRLOG("Get registers failed while waiting for CSTS.RDY == 0\n"); 2505 goto init_timeout; 2506 } 2507 SPDK_ERRLOG("Failed to read CC and CSTS in state %d\n", ctrlr->state); 2508 return -EIO; 2509 } 2510 2511 ready_timeout_in_ms = 500 * ctrlr->cap.bits.to; 2512 2513 /* 2514 * Check if the current initialization step is done or has timed out. 2515 */ 2516 switch (ctrlr->state) { 2517 case NVME_CTRLR_STATE_INIT_DELAY: 2518 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, ready_timeout_in_ms); 2519 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_INIT) { 2520 /* 2521 * Controller may need some delay before it's enabled. 2522 * 2523 * This is a workaround for an issue where the PCIe-attached NVMe controller 2524 * is not ready after VFIO reset. We delay the initialization rather than the 2525 * enabling itself, because this is required only for the very first enabling 2526 * - directly after a VFIO reset. 2527 */ 2528 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Adding 2 second delay before initializing the controller\n"); 2529 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2000 * spdk_get_ticks_hz() / 1000); 2530 } 2531 break; 2532 2533 case NVME_CTRLR_STATE_INIT: 2534 /* Begin the hardware initialization by making sure the controller is disabled. */ 2535 if (cc.bits.en) { 2536 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1\n"); 2537 /* 2538 * Controller is currently enabled. We need to disable it to cause a reset. 2539 * 2540 * If CC.EN = 1 && CSTS.RDY = 0, the controller is in the process of becoming ready. 2541 * Wait for the ready bit to be 1 before disabling the controller. 2542 */ 2543 if (csts.bits.rdy == 0) { 2544 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 0 - waiting for reset to complete\n"); 2545 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2546 return 0; 2547 } 2548 2549 /* CC.EN = 1 && CSTS.RDY == 1, so we can immediately disable the controller. */ 2550 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 0\n"); 2551 cc.bits.en = 0; 2552 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2553 SPDK_ERRLOG("set_cc() failed\n"); 2554 return -EIO; 2555 } 2556 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2557 2558 /* 2559 * Wait 2.5 seconds before accessing PCI registers. 2560 * Not using sleep() to avoid blocking other controller's initialization. 2561 */ 2562 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) { 2563 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Applying quirk: delay 2.5 seconds before reading registers\n"); 2564 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2500 * spdk_get_ticks_hz() / 1000); 2565 } 2566 return 0; 2567 } else { 2568 if (csts.bits.rdy == 1) { 2569 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 0 && CSTS.RDY = 1 - waiting for shutdown to complete\n"); 2570 } 2571 2572 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2573 return 0; 2574 } 2575 break; 2576 2577 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 2578 if (csts.bits.rdy == 1) { 2579 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 1 - disabling controller\n"); 2580 /* CC.EN = 1 && CSTS.RDY = 1, so we can set CC.EN = 0 now. */ 2581 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 0\n"); 2582 cc.bits.en = 0; 2583 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2584 SPDK_ERRLOG("set_cc() failed\n"); 2585 return -EIO; 2586 } 2587 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2588 return 0; 2589 } 2590 break; 2591 2592 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 2593 if (csts.bits.rdy == 0) { 2594 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 0 && CSTS.RDY = 0\n"); 2595 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE, ready_timeout_in_ms); 2596 /* 2597 * Delay 100us before setting CC.EN = 1. Some NVMe SSDs miss CC.EN getting 2598 * set to 1 if it is too soon after CSTS.RDY is reported as 0. 2599 */ 2600 spdk_delay_us(100); 2601 return 0; 2602 } 2603 break; 2604 2605 case NVME_CTRLR_STATE_ENABLE: 2606 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 1\n"); 2607 rc = nvme_ctrlr_enable(ctrlr); 2608 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2609 return rc; 2610 2611 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 2612 if (csts.bits.rdy == 1) { 2613 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 1 - controller is ready\n"); 2614 /* 2615 * The controller has been enabled. 2616 * Perform the rest of initialization serially. 2617 */ 2618 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_RESET_ADMIN_QUEUE, 2619 ctrlr->opts.admin_timeout_ms); 2620 return 0; 2621 } 2622 break; 2623 2624 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 2625 nvme_transport_qpair_reset(ctrlr->adminq); 2626 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY, 2627 ctrlr->opts.admin_timeout_ms); 2628 break; 2629 2630 case NVME_CTRLR_STATE_IDENTIFY: 2631 rc = nvme_ctrlr_identify(ctrlr); 2632 break; 2633 2634 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 2635 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2636 break; 2637 2638 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 2639 nvme_ctrlr_update_nvmf_ioccsz(ctrlr); 2640 rc = nvme_ctrlr_set_num_queues(ctrlr); 2641 break; 2642 2643 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 2644 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2645 break; 2646 2647 case NVME_CTRLR_STATE_CONSTRUCT_NS: 2648 rc = nvme_ctrlr_construct_namespaces(ctrlr); 2649 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS, 2650 ctrlr->opts.admin_timeout_ms); 2651 break; 2652 2653 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 2654 _nvme_ctrlr_identify_active_ns(ctrlr); 2655 break; 2656 2657 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 2658 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2659 break; 2660 2661 case NVME_CTRLR_STATE_IDENTIFY_NS: 2662 rc = nvme_ctrlr_identify_namespaces(ctrlr); 2663 break; 2664 2665 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 2666 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2667 break; 2668 2669 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 2670 rc = nvme_ctrlr_identify_id_desc_namespaces(ctrlr); 2671 break; 2672 2673 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 2674 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2675 break; 2676 2677 case NVME_CTRLR_STATE_CONFIGURE_AER: 2678 rc = nvme_ctrlr_configure_aer(ctrlr); 2679 break; 2680 2681 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 2682 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2683 break; 2684 2685 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 2686 rc = nvme_ctrlr_set_supported_log_pages(ctrlr); 2687 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES, 2688 ctrlr->opts.admin_timeout_ms); 2689 break; 2690 2691 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 2692 nvme_ctrlr_set_supported_features(ctrlr); 2693 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_DB_BUF_CFG, 2694 ctrlr->opts.admin_timeout_ms); 2695 break; 2696 2697 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 2698 rc = nvme_ctrlr_set_doorbell_buffer_config(ctrlr); 2699 break; 2700 2701 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 2702 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2703 break; 2704 2705 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 2706 rc = nvme_ctrlr_set_keep_alive_timeout(ctrlr); 2707 break; 2708 2709 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 2710 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2711 break; 2712 2713 case NVME_CTRLR_STATE_SET_HOST_ID: 2714 rc = nvme_ctrlr_set_host_id(ctrlr); 2715 break; 2716 2717 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 2718 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2719 break; 2720 2721 case NVME_CTRLR_STATE_READY: 2722 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Ctrlr already in ready state\n"); 2723 return 0; 2724 2725 case NVME_CTRLR_STATE_ERROR: 2726 SPDK_ERRLOG("Ctrlr %s is in error state\n", ctrlr->trid.traddr); 2727 return -1; 2728 2729 default: 2730 assert(0); 2731 return -1; 2732 } 2733 2734 init_timeout: 2735 if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE && 2736 spdk_get_ticks() > ctrlr->state_timeout_tsc) { 2737 SPDK_ERRLOG("Initialization timed out in state %d\n", ctrlr->state); 2738 return -1; 2739 } 2740 2741 return rc; 2742 } 2743 2744 int 2745 nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx) 2746 { 2747 pthread_mutexattr_t attr; 2748 int rc = 0; 2749 2750 if (pthread_mutexattr_init(&attr)) { 2751 return -1; 2752 } 2753 if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) || 2754 #ifndef __FreeBSD__ 2755 pthread_mutexattr_setrobust(&attr, PTHREAD_MUTEX_ROBUST) || 2756 pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) || 2757 #endif 2758 pthread_mutex_init(mtx, &attr)) { 2759 rc = -1; 2760 } 2761 pthread_mutexattr_destroy(&attr); 2762 return rc; 2763 } 2764 2765 int 2766 nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr) 2767 { 2768 int rc; 2769 2770 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 2771 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT_DELAY, NVME_TIMEOUT_INFINITE); 2772 } else { 2773 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 2774 } 2775 2776 if (ctrlr->opts.admin_queue_size > SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES) { 2777 SPDK_ERRLOG("admin_queue_size %u exceeds max defined by NVMe spec, use max value\n", 2778 ctrlr->opts.admin_queue_size); 2779 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES; 2780 } 2781 2782 if (ctrlr->opts.admin_queue_size < SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES) { 2783 SPDK_ERRLOG("admin_queue_size %u is less than minimum defined by NVMe spec, use min value\n", 2784 ctrlr->opts.admin_queue_size); 2785 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES; 2786 } 2787 2788 ctrlr->flags = 0; 2789 ctrlr->free_io_qids = NULL; 2790 ctrlr->is_resetting = false; 2791 ctrlr->is_failed = false; 2792 ctrlr->is_destructed = false; 2793 2794 TAILQ_INIT(&ctrlr->active_io_qpairs); 2795 STAILQ_INIT(&ctrlr->queued_aborts); 2796 ctrlr->outstanding_aborts = 0; 2797 2798 rc = nvme_robust_mutex_init_recursive_shared(&ctrlr->ctrlr_lock); 2799 if (rc != 0) { 2800 return rc; 2801 } 2802 2803 TAILQ_INIT(&ctrlr->active_procs); 2804 2805 return rc; 2806 } 2807 2808 /* This function should be called once at ctrlr initialization to set up constant properties. */ 2809 void 2810 nvme_ctrlr_init_cap(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cap_register *cap, 2811 const union spdk_nvme_vs_register *vs) 2812 { 2813 ctrlr->cap = *cap; 2814 ctrlr->vs = *vs; 2815 2816 if (ctrlr->cap.bits.ams & SPDK_NVME_CAP_AMS_WRR) { 2817 ctrlr->flags |= SPDK_NVME_CTRLR_WRR_SUPPORTED; 2818 } 2819 2820 ctrlr->min_page_size = 1u << (12 + ctrlr->cap.bits.mpsmin); 2821 2822 /* For now, always select page_size == min_page_size. */ 2823 ctrlr->page_size = ctrlr->min_page_size; 2824 2825 ctrlr->opts.io_queue_size = spdk_max(ctrlr->opts.io_queue_size, SPDK_NVME_IO_QUEUE_MIN_ENTRIES); 2826 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, MAX_IO_QUEUE_ENTRIES); 2827 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, ctrlr->cap.bits.mqes + 1u); 2828 2829 ctrlr->opts.io_queue_requests = spdk_max(ctrlr->opts.io_queue_requests, ctrlr->opts.io_queue_size); 2830 } 2831 2832 void 2833 nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr) 2834 { 2835 pthread_mutex_destroy(&ctrlr->ctrlr_lock); 2836 } 2837 2838 void 2839 nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr) 2840 { 2841 struct spdk_nvme_qpair *qpair, *tmp; 2842 2843 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Prepare to destruct SSD: %s\n", ctrlr->trid.traddr); 2844 2845 ctrlr->is_destructed = true; 2846 2847 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2848 2849 nvme_ctrlr_abort_queued_aborts(ctrlr); 2850 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 2851 2852 TAILQ_FOREACH_SAFE(qpair, &ctrlr->active_io_qpairs, tailq, tmp) { 2853 spdk_nvme_ctrlr_free_io_qpair(qpair); 2854 } 2855 2856 nvme_ctrlr_free_doorbell_buffer(ctrlr); 2857 2858 if (ctrlr->opts.no_shn_notification) { 2859 SPDK_INFOLOG(SPDK_LOG_NVME, "Disable SSD: %s without shutdown notification\n", 2860 ctrlr->trid.traddr); 2861 nvme_ctrlr_disable(ctrlr); 2862 } else { 2863 nvme_ctrlr_shutdown(ctrlr); 2864 } 2865 2866 nvme_ctrlr_destruct_namespaces(ctrlr); 2867 2868 spdk_bit_array_free(&ctrlr->free_io_qids); 2869 2870 nvme_transport_ctrlr_destruct(ctrlr); 2871 } 2872 2873 int 2874 nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr, 2875 struct nvme_request *req) 2876 { 2877 return nvme_qpair_submit_request(ctrlr->adminq, req); 2878 } 2879 2880 static void 2881 nvme_keep_alive_completion(void *cb_ctx, const struct spdk_nvme_cpl *cpl) 2882 { 2883 /* Do nothing */ 2884 } 2885 2886 /* 2887 * Check if we need to send a Keep Alive command. 2888 * Caller must hold ctrlr->ctrlr_lock. 2889 */ 2890 static void 2891 nvme_ctrlr_keep_alive(struct spdk_nvme_ctrlr *ctrlr) 2892 { 2893 uint64_t now; 2894 struct nvme_request *req; 2895 struct spdk_nvme_cmd *cmd; 2896 int rc; 2897 2898 now = spdk_get_ticks(); 2899 if (now < ctrlr->next_keep_alive_tick) { 2900 return; 2901 } 2902 2903 req = nvme_allocate_request_null(ctrlr->adminq, nvme_keep_alive_completion, NULL); 2904 if (req == NULL) { 2905 return; 2906 } 2907 2908 cmd = &req->cmd; 2909 cmd->opc = SPDK_NVME_OPC_KEEP_ALIVE; 2910 2911 rc = nvme_ctrlr_submit_admin_request(ctrlr, req); 2912 if (rc != 0) { 2913 SPDK_ERRLOG("Submitting Keep Alive failed\n"); 2914 } 2915 2916 ctrlr->next_keep_alive_tick = now + ctrlr->keep_alive_interval_ticks; 2917 } 2918 2919 int32_t 2920 spdk_nvme_ctrlr_process_admin_completions(struct spdk_nvme_ctrlr *ctrlr) 2921 { 2922 int32_t num_completions; 2923 int32_t rc; 2924 2925 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2926 2927 if (ctrlr->keep_alive_interval_ticks) { 2928 nvme_ctrlr_keep_alive(ctrlr); 2929 } 2930 2931 rc = nvme_io_msg_process(ctrlr); 2932 if (rc < 0) { 2933 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2934 return rc; 2935 } 2936 num_completions = rc; 2937 2938 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2939 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2940 2941 if (rc < 0) { 2942 num_completions = rc; 2943 } else { 2944 num_completions += rc; 2945 } 2946 2947 return num_completions; 2948 } 2949 2950 const struct spdk_nvme_ctrlr_data * 2951 spdk_nvme_ctrlr_get_data(struct spdk_nvme_ctrlr *ctrlr) 2952 { 2953 return &ctrlr->cdata; 2954 } 2955 2956 union spdk_nvme_csts_register spdk_nvme_ctrlr_get_regs_csts(struct spdk_nvme_ctrlr *ctrlr) 2957 { 2958 union spdk_nvme_csts_register csts; 2959 2960 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 2961 csts.raw = 0xFFFFFFFFu; 2962 } 2963 return csts; 2964 } 2965 2966 union spdk_nvme_cap_register spdk_nvme_ctrlr_get_regs_cap(struct spdk_nvme_ctrlr *ctrlr) 2967 { 2968 return ctrlr->cap; 2969 } 2970 2971 union spdk_nvme_vs_register spdk_nvme_ctrlr_get_regs_vs(struct spdk_nvme_ctrlr *ctrlr) 2972 { 2973 return ctrlr->vs; 2974 } 2975 2976 union spdk_nvme_cmbsz_register spdk_nvme_ctrlr_get_regs_cmbsz(struct spdk_nvme_ctrlr *ctrlr) 2977 { 2978 union spdk_nvme_cmbsz_register cmbsz; 2979 2980 if (nvme_ctrlr_get_cmbsz(ctrlr, &cmbsz)) { 2981 cmbsz.raw = 0; 2982 } 2983 2984 return cmbsz; 2985 } 2986 2987 uint32_t 2988 spdk_nvme_ctrlr_get_num_ns(struct spdk_nvme_ctrlr *ctrlr) 2989 { 2990 return ctrlr->num_ns; 2991 } 2992 2993 static int32_t 2994 nvme_ctrlr_active_ns_idx(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 2995 { 2996 int32_t result = -1; 2997 2998 if (ctrlr->active_ns_list == NULL || nsid == 0 || nsid > ctrlr->num_ns) { 2999 return result; 3000 } 3001 3002 int32_t lower = 0; 3003 int32_t upper = ctrlr->num_ns - 1; 3004 int32_t mid; 3005 3006 while (lower <= upper) { 3007 mid = lower + (upper - lower) / 2; 3008 if (ctrlr->active_ns_list[mid] == nsid) { 3009 result = mid; 3010 break; 3011 } else { 3012 if (ctrlr->active_ns_list[mid] != 0 && ctrlr->active_ns_list[mid] < nsid) { 3013 lower = mid + 1; 3014 } else { 3015 upper = mid - 1; 3016 } 3017 3018 } 3019 } 3020 3021 return result; 3022 } 3023 3024 bool 3025 spdk_nvme_ctrlr_is_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3026 { 3027 return nvme_ctrlr_active_ns_idx(ctrlr, nsid) != -1; 3028 } 3029 3030 uint32_t 3031 spdk_nvme_ctrlr_get_first_active_ns(struct spdk_nvme_ctrlr *ctrlr) 3032 { 3033 return ctrlr->active_ns_list ? ctrlr->active_ns_list[0] : 0; 3034 } 3035 3036 uint32_t 3037 spdk_nvme_ctrlr_get_next_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid) 3038 { 3039 int32_t nsid_idx = nvme_ctrlr_active_ns_idx(ctrlr, prev_nsid); 3040 if (ctrlr->active_ns_list && nsid_idx >= 0 && (uint32_t)nsid_idx < ctrlr->num_ns - 1) { 3041 return ctrlr->active_ns_list[nsid_idx + 1]; 3042 } 3043 return 0; 3044 } 3045 3046 struct spdk_nvme_ns * 3047 spdk_nvme_ctrlr_get_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3048 { 3049 if (nsid < 1 || nsid > ctrlr->num_ns) { 3050 return NULL; 3051 } 3052 3053 return &ctrlr->ns[nsid - 1]; 3054 } 3055 3056 struct spdk_pci_device * 3057 spdk_nvme_ctrlr_get_pci_device(struct spdk_nvme_ctrlr *ctrlr) 3058 { 3059 if (ctrlr == NULL) { 3060 return NULL; 3061 } 3062 3063 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 3064 return NULL; 3065 } 3066 3067 return nvme_ctrlr_proc_get_devhandle(ctrlr); 3068 } 3069 3070 uint32_t 3071 spdk_nvme_ctrlr_get_max_xfer_size(const struct spdk_nvme_ctrlr *ctrlr) 3072 { 3073 return ctrlr->max_xfer_size; 3074 } 3075 3076 void 3077 spdk_nvme_ctrlr_register_aer_callback(struct spdk_nvme_ctrlr *ctrlr, 3078 spdk_nvme_aer_cb aer_cb_fn, 3079 void *aer_cb_arg) 3080 { 3081 struct spdk_nvme_ctrlr_process *active_proc; 3082 3083 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3084 3085 active_proc = nvme_ctrlr_get_current_process(ctrlr); 3086 if (active_proc) { 3087 active_proc->aer_cb_fn = aer_cb_fn; 3088 active_proc->aer_cb_arg = aer_cb_arg; 3089 } 3090 3091 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3092 } 3093 3094 void 3095 spdk_nvme_ctrlr_register_timeout_callback(struct spdk_nvme_ctrlr *ctrlr, 3096 uint64_t timeout_us, spdk_nvme_timeout_cb cb_fn, void *cb_arg) 3097 { 3098 struct spdk_nvme_ctrlr_process *active_proc; 3099 3100 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3101 3102 active_proc = nvme_ctrlr_get_current_process(ctrlr); 3103 if (active_proc) { 3104 active_proc->timeout_ticks = timeout_us * spdk_get_ticks_hz() / 1000000ULL; 3105 active_proc->timeout_cb_fn = cb_fn; 3106 active_proc->timeout_cb_arg = cb_arg; 3107 } 3108 3109 ctrlr->timeout_enabled = true; 3110 3111 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3112 } 3113 3114 bool 3115 spdk_nvme_ctrlr_is_log_page_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t log_page) 3116 { 3117 /* No bounds check necessary, since log_page is uint8_t and log_page_supported has 256 entries */ 3118 SPDK_STATIC_ASSERT(sizeof(ctrlr->log_page_supported) == 256, "log_page_supported size mismatch"); 3119 return ctrlr->log_page_supported[log_page]; 3120 } 3121 3122 bool 3123 spdk_nvme_ctrlr_is_feature_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t feature_code) 3124 { 3125 /* No bounds check necessary, since feature_code is uint8_t and feature_supported has 256 entries */ 3126 SPDK_STATIC_ASSERT(sizeof(ctrlr->feature_supported) == 256, "feature_supported size mismatch"); 3127 return ctrlr->feature_supported[feature_code]; 3128 } 3129 3130 int 3131 spdk_nvme_ctrlr_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3132 struct spdk_nvme_ctrlr_list *payload) 3133 { 3134 struct nvme_completion_poll_status *status; 3135 int res; 3136 struct spdk_nvme_ns *ns; 3137 3138 status = calloc(1, sizeof(*status)); 3139 if (!status) { 3140 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3141 return -ENOMEM; 3142 } 3143 3144 res = nvme_ctrlr_cmd_attach_ns(ctrlr, nsid, payload, 3145 nvme_completion_poll_cb, status); 3146 if (res) { 3147 free(status); 3148 return res; 3149 } 3150 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3151 SPDK_ERRLOG("spdk_nvme_ctrlr_attach_ns failed!\n"); 3152 if (!status->timed_out) { 3153 free(status); 3154 } 3155 return -ENXIO; 3156 } 3157 free(status); 3158 3159 res = nvme_ctrlr_identify_active_ns(ctrlr); 3160 if (res) { 3161 return res; 3162 } 3163 3164 ns = &ctrlr->ns[nsid - 1]; 3165 return nvme_ns_construct(ns, nsid, ctrlr); 3166 } 3167 3168 int 3169 spdk_nvme_ctrlr_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3170 struct spdk_nvme_ctrlr_list *payload) 3171 { 3172 struct nvme_completion_poll_status *status; 3173 int res; 3174 struct spdk_nvme_ns *ns; 3175 3176 status = calloc(1, sizeof(*status)); 3177 if (!status) { 3178 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3179 return -ENOMEM; 3180 } 3181 3182 res = nvme_ctrlr_cmd_detach_ns(ctrlr, nsid, payload, 3183 nvme_completion_poll_cb, status); 3184 if (res) { 3185 free(status); 3186 return res; 3187 } 3188 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3189 SPDK_ERRLOG("spdk_nvme_ctrlr_detach_ns failed!\n"); 3190 if (!status->timed_out) { 3191 free(status); 3192 } 3193 return -ENXIO; 3194 } 3195 free(status); 3196 3197 res = nvme_ctrlr_identify_active_ns(ctrlr); 3198 if (res) { 3199 return res; 3200 } 3201 3202 ns = &ctrlr->ns[nsid - 1]; 3203 /* Inactive NS */ 3204 nvme_ns_destruct(ns); 3205 3206 return 0; 3207 } 3208 3209 uint32_t 3210 spdk_nvme_ctrlr_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload) 3211 { 3212 struct nvme_completion_poll_status *status; 3213 int res; 3214 uint32_t nsid; 3215 struct spdk_nvme_ns *ns; 3216 3217 status = calloc(1, sizeof(*status)); 3218 if (!status) { 3219 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3220 return 0; 3221 } 3222 3223 res = nvme_ctrlr_cmd_create_ns(ctrlr, payload, nvme_completion_poll_cb, status); 3224 if (res) { 3225 free(status); 3226 return 0; 3227 } 3228 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3229 SPDK_ERRLOG("spdk_nvme_ctrlr_create_ns failed!\n"); 3230 if (!status->timed_out) { 3231 free(status); 3232 } 3233 return 0; 3234 } 3235 3236 nsid = status->cpl.cdw0; 3237 ns = &ctrlr->ns[nsid - 1]; 3238 free(status); 3239 /* Inactive NS */ 3240 res = nvme_ns_construct(ns, nsid, ctrlr); 3241 if (res) { 3242 return 0; 3243 } 3244 3245 /* Return the namespace ID that was created */ 3246 return nsid; 3247 } 3248 3249 int 3250 spdk_nvme_ctrlr_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3251 { 3252 struct nvme_completion_poll_status *status; 3253 int res; 3254 struct spdk_nvme_ns *ns; 3255 3256 status = calloc(1, sizeof(*status)); 3257 if (!status) { 3258 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3259 return -ENOMEM; 3260 } 3261 3262 res = nvme_ctrlr_cmd_delete_ns(ctrlr, nsid, nvme_completion_poll_cb, status); 3263 if (res) { 3264 free(status); 3265 return res; 3266 } 3267 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3268 SPDK_ERRLOG("spdk_nvme_ctrlr_delete_ns failed!\n"); 3269 if (!status->timed_out) { 3270 free(status); 3271 } 3272 return -ENXIO; 3273 } 3274 free(status); 3275 3276 res = nvme_ctrlr_identify_active_ns(ctrlr); 3277 if (res) { 3278 return res; 3279 } 3280 3281 ns = &ctrlr->ns[nsid - 1]; 3282 nvme_ns_destruct(ns); 3283 3284 return 0; 3285 } 3286 3287 int 3288 spdk_nvme_ctrlr_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3289 struct spdk_nvme_format *format) 3290 { 3291 struct nvme_completion_poll_status *status; 3292 int res; 3293 3294 status = calloc(1, sizeof(*status)); 3295 if (!status) { 3296 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3297 return -ENOMEM; 3298 } 3299 3300 res = nvme_ctrlr_cmd_format(ctrlr, nsid, format, nvme_completion_poll_cb, 3301 status); 3302 if (res) { 3303 free(status); 3304 return res; 3305 } 3306 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3307 SPDK_ERRLOG("spdk_nvme_ctrlr_format failed!\n"); 3308 if (!status->timed_out) { 3309 free(status); 3310 } 3311 return -ENXIO; 3312 } 3313 free(status); 3314 3315 return spdk_nvme_ctrlr_reset(ctrlr); 3316 } 3317 3318 int 3319 spdk_nvme_ctrlr_update_firmware(struct spdk_nvme_ctrlr *ctrlr, void *payload, uint32_t size, 3320 int slot, enum spdk_nvme_fw_commit_action commit_action, struct spdk_nvme_status *completion_status) 3321 { 3322 struct spdk_nvme_fw_commit fw_commit; 3323 struct nvme_completion_poll_status *status; 3324 int res; 3325 unsigned int size_remaining; 3326 unsigned int offset; 3327 unsigned int transfer; 3328 void *p; 3329 3330 if (!completion_status) { 3331 return -EINVAL; 3332 } 3333 memset(completion_status, 0, sizeof(struct spdk_nvme_status)); 3334 if (size % 4) { 3335 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid size!\n"); 3336 return -1; 3337 } 3338 3339 /* Current support only for SPDK_NVME_FW_COMMIT_REPLACE_IMG 3340 * and SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG 3341 */ 3342 if ((commit_action != SPDK_NVME_FW_COMMIT_REPLACE_IMG) && 3343 (commit_action != SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG)) { 3344 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid command!\n"); 3345 return -1; 3346 } 3347 3348 status = calloc(1, sizeof(*status)); 3349 if (!status) { 3350 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3351 return -ENOMEM; 3352 } 3353 3354 /* Firmware download */ 3355 size_remaining = size; 3356 offset = 0; 3357 p = payload; 3358 3359 while (size_remaining > 0) { 3360 transfer = spdk_min(size_remaining, ctrlr->min_page_size); 3361 3362 memset(status, 0, sizeof(*status)); 3363 res = nvme_ctrlr_cmd_fw_image_download(ctrlr, transfer, offset, p, 3364 nvme_completion_poll_cb, 3365 status); 3366 if (res) { 3367 free(status); 3368 return res; 3369 } 3370 3371 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3372 SPDK_ERRLOG("spdk_nvme_ctrlr_fw_image_download failed!\n"); 3373 if (!status->timed_out) { 3374 free(status); 3375 } 3376 return -ENXIO; 3377 } 3378 p += transfer; 3379 offset += transfer; 3380 size_remaining -= transfer; 3381 } 3382 3383 /* Firmware commit */ 3384 memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit)); 3385 fw_commit.fs = slot; 3386 fw_commit.ca = commit_action; 3387 3388 memset(status, 0, sizeof(*status)); 3389 res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit, nvme_completion_poll_cb, 3390 status); 3391 if (res) { 3392 free(status); 3393 return res; 3394 } 3395 3396 res = nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock); 3397 3398 memcpy(completion_status, &status->cpl.status, sizeof(struct spdk_nvme_status)); 3399 3400 if (!status->timed_out) { 3401 free(status); 3402 } 3403 3404 if (res) { 3405 if (completion_status->sct != SPDK_NVME_SCT_COMMAND_SPECIFIC || 3406 completion_status->sc != SPDK_NVME_SC_FIRMWARE_REQ_NVM_RESET) { 3407 if (completion_status->sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 3408 completion_status->sc == SPDK_NVME_SC_FIRMWARE_REQ_CONVENTIONAL_RESET) { 3409 SPDK_NOTICELOG("firmware activation requires conventional reset to be performed. !\n"); 3410 } else { 3411 SPDK_ERRLOG("nvme_ctrlr_cmd_fw_commit failed!\n"); 3412 } 3413 return -ENXIO; 3414 } 3415 } 3416 3417 return spdk_nvme_ctrlr_reset(ctrlr); 3418 } 3419 3420 int 3421 spdk_nvme_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr) 3422 { 3423 int rc, size; 3424 union spdk_nvme_cmbsz_register cmbsz; 3425 3426 cmbsz = spdk_nvme_ctrlr_get_regs_cmbsz(ctrlr); 3427 3428 if (cmbsz.bits.rds == 0 || cmbsz.bits.wds == 0) { 3429 return -ENOTSUP; 3430 } 3431 3432 size = cmbsz.bits.sz * (0x1000 << (cmbsz.bits.szu * 4)); 3433 3434 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3435 rc = nvme_transport_ctrlr_reserve_cmb(ctrlr); 3436 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3437 3438 if (rc < 0) { 3439 return rc; 3440 } 3441 3442 return size; 3443 } 3444 3445 void * 3446 spdk_nvme_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size) 3447 { 3448 void *buf; 3449 3450 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3451 buf = nvme_transport_ctrlr_map_cmb(ctrlr, size); 3452 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3453 3454 return buf; 3455 } 3456 3457 void 3458 spdk_nvme_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr) 3459 { 3460 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3461 nvme_transport_ctrlr_unmap_cmb(ctrlr); 3462 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3463 } 3464 3465 bool 3466 spdk_nvme_ctrlr_is_discovery(struct spdk_nvme_ctrlr *ctrlr) 3467 { 3468 assert(ctrlr); 3469 3470 return !strncmp(ctrlr->trid.subnqn, SPDK_NVMF_DISCOVERY_NQN, 3471 strlen(SPDK_NVMF_DISCOVERY_NQN)); 3472 } 3473 3474 int 3475 spdk_nvme_ctrlr_security_receive(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3476 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3477 { 3478 struct nvme_completion_poll_status *status; 3479 int res; 3480 3481 status = calloc(1, sizeof(*status)); 3482 if (!status) { 3483 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3484 return -ENOMEM; 3485 } 3486 3487 res = spdk_nvme_ctrlr_cmd_security_receive(ctrlr, secp, spsp, nssf, payload, size, 3488 nvme_completion_poll_cb, status); 3489 if (res) { 3490 free(status); 3491 return res; 3492 } 3493 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3494 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_receive failed!\n"); 3495 if (!status->timed_out) { 3496 free(status); 3497 } 3498 return -ENXIO; 3499 } 3500 free(status); 3501 3502 return 0; 3503 } 3504 3505 int 3506 spdk_nvme_ctrlr_security_send(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3507 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3508 { 3509 struct nvme_completion_poll_status *status; 3510 int res; 3511 3512 status = calloc(1, sizeof(*status)); 3513 if (!status) { 3514 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3515 return -ENOMEM; 3516 } 3517 3518 res = spdk_nvme_ctrlr_cmd_security_send(ctrlr, secp, spsp, nssf, payload, size, 3519 nvme_completion_poll_cb, 3520 status); 3521 if (res) { 3522 free(status); 3523 return res; 3524 } 3525 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3526 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_send failed!\n"); 3527 if (!status->timed_out) { 3528 free(status); 3529 } 3530 return -ENXIO; 3531 } 3532 3533 free(status); 3534 3535 return 0; 3536 } 3537 3538 uint64_t 3539 spdk_nvme_ctrlr_get_flags(struct spdk_nvme_ctrlr *ctrlr) 3540 { 3541 return ctrlr->flags; 3542 } 3543 3544 const struct spdk_nvme_transport_id * 3545 spdk_nvme_ctrlr_get_transport_id(struct spdk_nvme_ctrlr *ctrlr) 3546 { 3547 return &ctrlr->trid; 3548 } 3549 3550 /* FIXME need to specify max number of iovs */ 3551 int 3552 spdk_nvme_map_prps(void *prv, struct spdk_nvme_cmd *cmd, struct iovec *iovs, 3553 uint32_t len, size_t mps, 3554 void *(*gpa_to_vva)(void *prv, uint64_t addr, uint64_t len)) 3555 { 3556 uint64_t prp1, prp2; 3557 void *vva; 3558 uint32_t i; 3559 uint32_t residue_len, nents; 3560 uint64_t *prp_list; 3561 int iovcnt; 3562 3563 prp1 = cmd->dptr.prp.prp1; 3564 prp2 = cmd->dptr.prp.prp2; 3565 3566 /* PRP1 may started with unaligned page address */ 3567 residue_len = mps - (prp1 % mps); 3568 residue_len = spdk_min(len, residue_len); 3569 3570 vva = gpa_to_vva(prv, prp1, residue_len); 3571 if (spdk_unlikely(vva == NULL)) { 3572 SPDK_ERRLOG("GPA to VVA failed\n"); 3573 return -1; 3574 } 3575 iovs[0].iov_base = vva; 3576 iovs[0].iov_len = residue_len; 3577 len -= residue_len; 3578 3579 if (len) { 3580 if (spdk_unlikely(prp2 == 0)) { 3581 SPDK_ERRLOG("no PRP2, %d remaining\n", len); 3582 return -1; 3583 } 3584 3585 if (len <= mps) { 3586 /* 2 PRP used */ 3587 iovcnt = 2; 3588 vva = gpa_to_vva(prv, prp2, len); 3589 if (spdk_unlikely(vva == NULL)) { 3590 SPDK_ERRLOG("no VVA for %#lx, len%#x\n", 3591 prp2, len); 3592 return -1; 3593 } 3594 iovs[1].iov_base = vva; 3595 iovs[1].iov_len = len; 3596 } else { 3597 /* PRP list used */ 3598 nents = (len + mps - 1) / mps; 3599 vva = gpa_to_vva(prv, prp2, nents * sizeof(*prp_list)); 3600 if (spdk_unlikely(vva == NULL)) { 3601 SPDK_ERRLOG("no VVA for %#lx, nents=%#x\n", 3602 prp2, nents); 3603 return -1; 3604 } 3605 prp_list = vva; 3606 i = 0; 3607 while (len != 0) { 3608 residue_len = spdk_min(len, mps); 3609 vva = gpa_to_vva(prv, prp_list[i], residue_len); 3610 if (spdk_unlikely(vva == NULL)) { 3611 SPDK_ERRLOG("no VVA for %#lx, residue_len=%#x\n", 3612 prp_list[i], residue_len); 3613 return -1; 3614 } 3615 iovs[i + 1].iov_base = vva; 3616 iovs[i + 1].iov_len = residue_len; 3617 len -= residue_len; 3618 i++; 3619 } 3620 iovcnt = i + 1; 3621 } 3622 } else { 3623 /* 1 PRP used */ 3624 iovcnt = 1; 3625 } 3626 3627 return iovcnt; 3628 } 3629