1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) Intel Corporation. All rights reserved. 5 * Copyright (c) 2019, 2020 Mellanox Technologies LTD. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include "spdk/stdinc.h" 35 36 #include "nvme_internal.h" 37 #include "nvme_io_msg.h" 38 39 #include "spdk/env.h" 40 #include "spdk/string.h" 41 42 struct nvme_active_ns_ctx; 43 44 static void nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr); 45 static int nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 46 struct nvme_async_event_request *aer); 47 static void nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx); 48 static int nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns); 49 static int nvme_ctrlr_identify_ns_iocs_specific_async(struct spdk_nvme_ns *ns); 50 static int nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns); 51 52 static int 53 nvme_ctrlr_get_cc(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cc_register *cc) 54 { 55 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 56 &cc->raw); 57 } 58 59 static int 60 nvme_ctrlr_get_csts(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_csts_register *csts) 61 { 62 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, csts.raw), 63 &csts->raw); 64 } 65 66 int 67 nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap) 68 { 69 return nvme_transport_ctrlr_get_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, cap.raw), 70 &cap->raw); 71 } 72 73 int 74 nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs) 75 { 76 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, vs.raw), 77 &vs->raw); 78 } 79 80 static int 81 nvme_ctrlr_set_cc(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cc_register *cc) 82 { 83 return nvme_transport_ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 84 cc->raw); 85 } 86 87 int 88 nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz) 89 { 90 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cmbsz.raw), 91 &cmbsz->raw); 92 } 93 94 bool 95 nvme_ctrlr_multi_iocs_enabled(struct spdk_nvme_ctrlr *ctrlr) 96 { 97 return ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_IOCS && 98 ctrlr->opts.command_set == SPDK_NVME_CC_CSS_IOCS; 99 } 100 101 /* When the field in spdk_nvme_ctrlr_opts are changed and you change this function, please 102 * also update the nvme_ctrl_opts_init function in nvme_ctrlr.c 103 */ 104 void 105 spdk_nvme_ctrlr_get_default_ctrlr_opts(struct spdk_nvme_ctrlr_opts *opts, size_t opts_size) 106 { 107 char host_id_str[SPDK_UUID_STRING_LEN]; 108 109 assert(opts); 110 111 opts->opts_size = opts_size; 112 113 #define FIELD_OK(field) \ 114 offsetof(struct spdk_nvme_ctrlr_opts, field) + sizeof(opts->field) <= opts_size 115 116 if (FIELD_OK(num_io_queues)) { 117 opts->num_io_queues = DEFAULT_MAX_IO_QUEUES; 118 } 119 120 if (FIELD_OK(use_cmb_sqs)) { 121 opts->use_cmb_sqs = true; 122 } 123 124 if (FIELD_OK(no_shn_notification)) { 125 opts->no_shn_notification = false; 126 } 127 128 if (FIELD_OK(arb_mechanism)) { 129 opts->arb_mechanism = SPDK_NVME_CC_AMS_RR; 130 } 131 132 if (FIELD_OK(arbitration_burst)) { 133 opts->arbitration_burst = 0; 134 } 135 136 if (FIELD_OK(low_priority_weight)) { 137 opts->low_priority_weight = 0; 138 } 139 140 if (FIELD_OK(medium_priority_weight)) { 141 opts->medium_priority_weight = 0; 142 } 143 144 if (FIELD_OK(high_priority_weight)) { 145 opts->high_priority_weight = 0; 146 } 147 148 if (FIELD_OK(keep_alive_timeout_ms)) { 149 opts->keep_alive_timeout_ms = MIN_KEEP_ALIVE_TIMEOUT_IN_MS; 150 } 151 152 if (FIELD_OK(transport_retry_count)) { 153 opts->transport_retry_count = SPDK_NVME_DEFAULT_RETRY_COUNT; 154 } 155 156 if (FIELD_OK(io_queue_size)) { 157 opts->io_queue_size = DEFAULT_IO_QUEUE_SIZE; 158 } 159 160 if (nvme_driver_init() == 0) { 161 if (FIELD_OK(hostnqn)) { 162 spdk_uuid_fmt_lower(host_id_str, sizeof(host_id_str), 163 &g_spdk_nvme_driver->default_extended_host_id); 164 snprintf(opts->hostnqn, sizeof(opts->hostnqn), "2014-08.org.nvmexpress:uuid:%s", host_id_str); 165 } 166 167 if (FIELD_OK(extended_host_id)) { 168 memcpy(opts->extended_host_id, &g_spdk_nvme_driver->default_extended_host_id, 169 sizeof(opts->extended_host_id)); 170 } 171 172 } 173 174 if (FIELD_OK(io_queue_requests)) { 175 opts->io_queue_requests = DEFAULT_IO_QUEUE_REQUESTS; 176 } 177 178 if (FIELD_OK(src_addr)) { 179 memset(opts->src_addr, 0, sizeof(opts->src_addr)); 180 } 181 182 if (FIELD_OK(src_svcid)) { 183 memset(opts->src_svcid, 0, sizeof(opts->src_svcid)); 184 } 185 186 if (FIELD_OK(host_id)) { 187 memset(opts->host_id, 0, sizeof(opts->host_id)); 188 } 189 190 if (FIELD_OK(command_set)) { 191 opts->command_set = SPDK_NVME_CC_CSS_NVM; 192 } 193 194 if (FIELD_OK(admin_timeout_ms)) { 195 opts->admin_timeout_ms = NVME_MAX_ADMIN_TIMEOUT_IN_SECS * 1000; 196 } 197 198 if (FIELD_OK(header_digest)) { 199 opts->header_digest = false; 200 } 201 202 if (FIELD_OK(data_digest)) { 203 opts->data_digest = false; 204 } 205 206 if (FIELD_OK(disable_error_logging)) { 207 opts->disable_error_logging = false; 208 } 209 210 if (FIELD_OK(transport_ack_timeout)) { 211 opts->transport_ack_timeout = SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT; 212 } 213 214 if (FIELD_OK(admin_queue_size)) { 215 opts->admin_queue_size = DEFAULT_ADMIN_QUEUE_SIZE; 216 } 217 218 if (FIELD_OK(fabrics_connect_timeout_us)) { 219 opts->fabrics_connect_timeout_us = NVME_FABRIC_CONNECT_COMMAND_TIMEOUT; 220 } 221 222 #undef FIELD_OK 223 } 224 225 /** 226 * This function will be called when the process allocates the IO qpair. 227 * Note: the ctrlr_lock must be held when calling this function. 228 */ 229 static void 230 nvme_ctrlr_proc_add_io_qpair(struct spdk_nvme_qpair *qpair) 231 { 232 struct spdk_nvme_ctrlr_process *active_proc; 233 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 234 235 active_proc = nvme_ctrlr_get_current_process(ctrlr); 236 if (active_proc) { 237 TAILQ_INSERT_TAIL(&active_proc->allocated_io_qpairs, qpair, per_process_tailq); 238 qpair->active_proc = active_proc; 239 } 240 } 241 242 /** 243 * This function will be called when the process frees the IO qpair. 244 * Note: the ctrlr_lock must be held when calling this function. 245 */ 246 static void 247 nvme_ctrlr_proc_remove_io_qpair(struct spdk_nvme_qpair *qpair) 248 { 249 struct spdk_nvme_ctrlr_process *active_proc; 250 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 251 struct spdk_nvme_qpair *active_qpair, *tmp_qpair; 252 253 active_proc = nvme_ctrlr_get_current_process(ctrlr); 254 if (!active_proc) { 255 return; 256 } 257 258 TAILQ_FOREACH_SAFE(active_qpair, &active_proc->allocated_io_qpairs, 259 per_process_tailq, tmp_qpair) { 260 if (active_qpair == qpair) { 261 TAILQ_REMOVE(&active_proc->allocated_io_qpairs, 262 active_qpair, per_process_tailq); 263 264 break; 265 } 266 } 267 } 268 269 void 270 spdk_nvme_ctrlr_get_default_io_qpair_opts(struct spdk_nvme_ctrlr *ctrlr, 271 struct spdk_nvme_io_qpair_opts *opts, 272 size_t opts_size) 273 { 274 assert(ctrlr); 275 276 assert(opts); 277 278 memset(opts, 0, opts_size); 279 280 #define FIELD_OK(field) \ 281 offsetof(struct spdk_nvme_io_qpair_opts, field) + sizeof(opts->field) <= opts_size 282 283 if (FIELD_OK(qprio)) { 284 opts->qprio = SPDK_NVME_QPRIO_URGENT; 285 } 286 287 if (FIELD_OK(io_queue_size)) { 288 opts->io_queue_size = ctrlr->opts.io_queue_size; 289 } 290 291 if (FIELD_OK(io_queue_requests)) { 292 opts->io_queue_requests = ctrlr->opts.io_queue_requests; 293 } 294 295 if (FIELD_OK(delay_cmd_submit)) { 296 opts->delay_cmd_submit = false; 297 } 298 299 if (FIELD_OK(sq.vaddr)) { 300 opts->sq.vaddr = NULL; 301 } 302 303 if (FIELD_OK(sq.paddr)) { 304 opts->sq.paddr = 0; 305 } 306 307 if (FIELD_OK(sq.buffer_size)) { 308 opts->sq.buffer_size = 0; 309 } 310 311 if (FIELD_OK(cq.vaddr)) { 312 opts->cq.vaddr = NULL; 313 } 314 315 if (FIELD_OK(cq.paddr)) { 316 opts->cq.paddr = 0; 317 } 318 319 if (FIELD_OK(cq.buffer_size)) { 320 opts->cq.buffer_size = 0; 321 } 322 323 if (FIELD_OK(create_only)) { 324 opts->create_only = false; 325 } 326 327 #undef FIELD_OK 328 } 329 330 static struct spdk_nvme_qpair * 331 nvme_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 332 const struct spdk_nvme_io_qpair_opts *opts) 333 { 334 int32_t qid; 335 struct spdk_nvme_qpair *qpair; 336 union spdk_nvme_cc_register cc; 337 338 if (!ctrlr) { 339 return NULL; 340 } 341 342 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 343 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 344 SPDK_ERRLOG("get_cc failed\n"); 345 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 346 return NULL; 347 } 348 349 if (opts->qprio & ~SPDK_NVME_CREATE_IO_SQ_QPRIO_MASK) { 350 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 351 return NULL; 352 } 353 354 /* 355 * Only value SPDK_NVME_QPRIO_URGENT(0) is valid for the 356 * default round robin arbitration method. 357 */ 358 if ((cc.bits.ams == SPDK_NVME_CC_AMS_RR) && (opts->qprio != SPDK_NVME_QPRIO_URGENT)) { 359 SPDK_ERRLOG("invalid queue priority for default round robin arbitration method\n"); 360 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 361 return NULL; 362 } 363 364 qid = spdk_nvme_ctrlr_alloc_qid(ctrlr); 365 if (qid < 0) { 366 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 367 return NULL; 368 } 369 370 qpair = nvme_transport_ctrlr_create_io_qpair(ctrlr, qid, opts); 371 if (qpair == NULL) { 372 SPDK_ERRLOG("nvme_transport_ctrlr_create_io_qpair() failed\n"); 373 spdk_nvme_ctrlr_free_qid(ctrlr, qid); 374 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 375 return NULL; 376 } 377 378 TAILQ_INSERT_TAIL(&ctrlr->active_io_qpairs, qpair, tailq); 379 380 nvme_ctrlr_proc_add_io_qpair(qpair); 381 382 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 383 384 return qpair; 385 } 386 387 int 388 spdk_nvme_ctrlr_connect_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 389 { 390 int rc; 391 392 if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) { 393 return -EISCONN; 394 } 395 396 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 397 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 398 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 399 400 if (ctrlr->quirks & NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC) { 401 spdk_delay_us(100); 402 } 403 404 return rc; 405 } 406 407 void 408 spdk_nvme_ctrlr_disconnect_io_qpair(struct spdk_nvme_qpair *qpair) 409 { 410 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 411 412 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 413 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 414 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 415 } 416 417 struct spdk_nvme_qpair * 418 spdk_nvme_ctrlr_alloc_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 419 const struct spdk_nvme_io_qpair_opts *user_opts, 420 size_t opts_size) 421 { 422 423 struct spdk_nvme_qpair *qpair; 424 struct spdk_nvme_io_qpair_opts opts; 425 int rc; 426 427 /* 428 * Get the default options, then overwrite them with the user-provided options 429 * up to opts_size. 430 * 431 * This allows for extensions of the opts structure without breaking 432 * ABI compatibility. 433 */ 434 spdk_nvme_ctrlr_get_default_io_qpair_opts(ctrlr, &opts, sizeof(opts)); 435 if (user_opts) { 436 memcpy(&opts, user_opts, spdk_min(sizeof(opts), opts_size)); 437 438 /* If user passes buffers, make sure they're big enough for the requested queue size */ 439 if (opts.sq.vaddr) { 440 if (opts.sq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))) { 441 SPDK_ERRLOG("sq buffer size %lx is too small for sq size %lx\n", 442 opts.sq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))); 443 return NULL; 444 } 445 } 446 if (opts.cq.vaddr) { 447 if (opts.cq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))) { 448 SPDK_ERRLOG("cq buffer size %lx is too small for cq size %lx\n", 449 opts.cq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))); 450 return NULL; 451 } 452 } 453 } 454 455 qpair = nvme_ctrlr_create_io_qpair(ctrlr, &opts); 456 457 if (qpair == NULL || opts.create_only == true) { 458 return qpair; 459 } 460 461 rc = spdk_nvme_ctrlr_connect_io_qpair(ctrlr, qpair); 462 if (rc != 0) { 463 SPDK_ERRLOG("nvme_transport_ctrlr_connect_io_qpair() failed\n"); 464 TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq); 465 nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair); 466 return NULL; 467 } 468 469 return qpair; 470 } 471 472 int 473 spdk_nvme_ctrlr_reconnect_io_qpair(struct spdk_nvme_qpair *qpair) 474 { 475 struct spdk_nvme_ctrlr *ctrlr; 476 enum nvme_qpair_state qpair_state; 477 int rc; 478 479 assert(qpair != NULL); 480 assert(nvme_qpair_is_admin_queue(qpair) == false); 481 assert(qpair->ctrlr != NULL); 482 483 ctrlr = qpair->ctrlr; 484 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 485 qpair_state = nvme_qpair_get_state(qpair); 486 487 if (ctrlr->is_removed) { 488 rc = -ENODEV; 489 goto out; 490 } 491 492 if (ctrlr->is_resetting || qpair_state == NVME_QPAIR_DISCONNECTING) { 493 rc = -EAGAIN; 494 goto out; 495 } 496 497 if (ctrlr->is_failed || qpair_state == NVME_QPAIR_DESTROYING) { 498 rc = -ENXIO; 499 goto out; 500 } 501 502 if (qpair_state != NVME_QPAIR_DISCONNECTED) { 503 rc = 0; 504 goto out; 505 } 506 507 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 508 if (rc) { 509 rc = -EAGAIN; 510 goto out; 511 } 512 513 out: 514 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 515 return rc; 516 } 517 518 spdk_nvme_qp_failure_reason 519 spdk_nvme_ctrlr_get_admin_qp_failure_reason(struct spdk_nvme_ctrlr *ctrlr) 520 { 521 return ctrlr->adminq->transport_failure_reason; 522 } 523 524 /* 525 * This internal function will attempt to take the controller 526 * lock before calling disconnect on a controller qpair. 527 * Functions already holding the controller lock should 528 * call nvme_transport_ctrlr_disconnect_qpair directly. 529 */ 530 void 531 nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair) 532 { 533 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 534 535 assert(ctrlr != NULL); 536 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 537 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 538 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 539 } 540 541 int 542 spdk_nvme_ctrlr_free_io_qpair(struct spdk_nvme_qpair *qpair) 543 { 544 struct spdk_nvme_ctrlr *ctrlr; 545 546 if (qpair == NULL) { 547 return 0; 548 } 549 550 ctrlr = qpair->ctrlr; 551 552 if (qpair->in_completion_context) { 553 /* 554 * There are many cases where it is convenient to delete an io qpair in the context 555 * of that qpair's completion routine. To handle this properly, set a flag here 556 * so that the completion routine will perform an actual delete after the context 557 * unwinds. 558 */ 559 qpair->delete_after_completion_context = 1; 560 return 0; 561 } 562 563 if (qpair->poll_group && qpair->poll_group->in_completion_context) { 564 /* Same as above, but in a poll group. */ 565 qpair->poll_group->num_qpairs_to_delete++; 566 qpair->delete_after_completion_context = 1; 567 return 0; 568 } 569 570 if (qpair->poll_group) { 571 spdk_nvme_poll_group_remove(qpair->poll_group->group, qpair); 572 } 573 574 /* Do not retry. */ 575 nvme_qpair_set_state(qpair, NVME_QPAIR_DESTROYING); 576 577 /* In the multi-process case, a process may call this function on a foreign 578 * I/O qpair (i.e. one that this process did not create) when that qpairs process 579 * exits unexpectedly. In that case, we must not try to abort any reqs associated 580 * with that qpair, since the callbacks will also be foreign to this process. 581 */ 582 if (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr)) { 583 nvme_qpair_abort_reqs(qpair, 1); 584 } 585 586 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 587 588 nvme_ctrlr_proc_remove_io_qpair(qpair); 589 590 TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq); 591 spdk_nvme_ctrlr_free_qid(ctrlr, qpair->id); 592 593 if (nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair)) { 594 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 595 return -1; 596 } 597 598 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 599 return 0; 600 } 601 602 static void 603 nvme_ctrlr_construct_intel_support_log_page_list(struct spdk_nvme_ctrlr *ctrlr, 604 struct spdk_nvme_intel_log_page_directory *log_page_directory) 605 { 606 if (log_page_directory == NULL) { 607 return; 608 } 609 610 if (ctrlr->cdata.vid != SPDK_PCI_VID_INTEL) { 611 return; 612 } 613 614 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY] = true; 615 616 if (log_page_directory->read_latency_log_len || 617 (ctrlr->quirks & NVME_INTEL_QUIRK_READ_LATENCY)) { 618 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_READ_CMD_LATENCY] = true; 619 } 620 if (log_page_directory->write_latency_log_len || 621 (ctrlr->quirks & NVME_INTEL_QUIRK_WRITE_LATENCY)) { 622 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_WRITE_CMD_LATENCY] = true; 623 } 624 if (log_page_directory->temperature_statistics_log_len) { 625 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_TEMPERATURE] = true; 626 } 627 if (log_page_directory->smart_log_len) { 628 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_SMART] = true; 629 } 630 if (log_page_directory->marketing_description_log_len) { 631 ctrlr->log_page_supported[SPDK_NVME_INTEL_MARKETING_DESCRIPTION] = true; 632 } 633 } 634 635 static int nvme_ctrlr_set_intel_support_log_pages(struct spdk_nvme_ctrlr *ctrlr) 636 { 637 int rc = 0; 638 struct nvme_completion_poll_status *status; 639 struct spdk_nvme_intel_log_page_directory *log_page_directory; 640 641 log_page_directory = spdk_zmalloc(sizeof(struct spdk_nvme_intel_log_page_directory), 642 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_DMA); 643 if (log_page_directory == NULL) { 644 SPDK_ERRLOG("could not allocate log_page_directory\n"); 645 return -ENXIO; 646 } 647 648 status = calloc(1, sizeof(*status)); 649 if (!status) { 650 SPDK_ERRLOG("Failed to allocate status tracker\n"); 651 spdk_free(log_page_directory); 652 return -ENOMEM; 653 } 654 655 rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY, 656 SPDK_NVME_GLOBAL_NS_TAG, log_page_directory, 657 sizeof(struct spdk_nvme_intel_log_page_directory), 658 0, nvme_completion_poll_cb, status); 659 if (rc != 0) { 660 spdk_free(log_page_directory); 661 free(status); 662 return rc; 663 } 664 665 if (nvme_wait_for_completion_timeout(ctrlr->adminq, status, 666 ctrlr->opts.admin_timeout_ms * 1000)) { 667 spdk_free(log_page_directory); 668 SPDK_WARNLOG("Intel log pages not supported on Intel drive!\n"); 669 if (!status->timed_out) { 670 free(status); 671 } 672 return 0; 673 } 674 675 nvme_ctrlr_construct_intel_support_log_page_list(ctrlr, log_page_directory); 676 spdk_free(log_page_directory); 677 free(status); 678 return 0; 679 } 680 681 static int 682 nvme_ctrlr_update_ana_log_page(struct spdk_nvme_ctrlr *ctrlr) 683 { 684 struct nvme_completion_poll_status *status; 685 int rc; 686 687 status = calloc(1, sizeof(*status)); 688 if (status == NULL) { 689 SPDK_ERRLOG("Failed to allocaate status tracker\n"); 690 return -ENOMEM; 691 } 692 693 rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_LOG_ASYMMETRIC_NAMESPACE_ACCESS, 694 SPDK_NVME_GLOBAL_NS_TAG, ctrlr->ana_log_page, 695 ctrlr->ana_log_page_size, 0, 696 nvme_completion_poll_cb, status); 697 if (rc != 0) { 698 free(status); 699 return rc; 700 } 701 702 if (nvme_wait_for_completion_robust_lock_timeout(ctrlr->adminq, status, &ctrlr->ctrlr_lock, 703 ctrlr->opts.admin_timeout_ms * 1000)) { 704 if (!status->timed_out) { 705 free(status); 706 } 707 return -EIO; 708 } 709 710 free(status); 711 return 0; 712 } 713 714 static int 715 nvme_ctrlr_init_ana_log_page(struct spdk_nvme_ctrlr *ctrlr) 716 { 717 uint32_t ana_log_page_size; 718 719 ana_log_page_size = sizeof(struct spdk_nvme_ana_page) + ctrlr->cdata.nanagrpid * 720 sizeof(struct spdk_nvme_ana_group_descriptor) + ctrlr->cdata.nn * 721 sizeof(uint32_t); 722 723 ctrlr->ana_log_page = spdk_zmalloc(ana_log_page_size, 64, NULL, SPDK_ENV_SOCKET_ID_ANY, 724 SPDK_MALLOC_DMA); 725 if (ctrlr->ana_log_page == NULL) { 726 SPDK_ERRLOG("could not allocate ANA log page buffer\n"); 727 return -ENXIO; 728 } 729 ctrlr->ana_log_page_size = ana_log_page_size; 730 731 ctrlr->log_page_supported[SPDK_NVME_LOG_ASYMMETRIC_NAMESPACE_ACCESS] = true; 732 733 return nvme_ctrlr_update_ana_log_page(ctrlr); 734 } 735 736 static int 737 nvme_ctrlr_update_ns_ana_states(const struct spdk_nvme_ana_group_descriptor *desc, 738 void *cb_arg) 739 { 740 struct spdk_nvme_ctrlr *ctrlr = cb_arg; 741 struct spdk_nvme_ns *ns; 742 uint32_t i, nsid; 743 744 for (i = 0; i < desc->num_of_nsid; i++) { 745 nsid = desc->nsid[i]; 746 if (nsid == 0 || nsid > ctrlr->cdata.nn) { 747 continue; 748 } 749 750 ns = &ctrlr->ns[nsid - 1]; 751 752 ns->ana_group_id = desc->ana_group_id; 753 ns->ana_state = desc->ana_state; 754 } 755 756 return 0; 757 } 758 759 int 760 nvme_ctrlr_parse_ana_log_page(struct spdk_nvme_ctrlr *ctrlr, 761 spdk_nvme_parse_ana_log_page_cb cb_fn, void *cb_arg) 762 { 763 struct spdk_nvme_ana_group_descriptor *desc; 764 uint32_t i; 765 int rc = 0; 766 767 if (ctrlr->ana_log_page == NULL) { 768 return -EINVAL; 769 } 770 771 desc = (void *)((uint8_t *)ctrlr->ana_log_page + sizeof(struct spdk_nvme_ana_page)); 772 773 for (i = 0; i < ctrlr->ana_log_page->num_ana_group_desc; i++) { 774 rc = cb_fn(desc, cb_arg); 775 if (rc != 0) { 776 break; 777 } 778 desc = (void *)((uint8_t *)desc + sizeof(struct spdk_nvme_ana_group_descriptor) + 779 desc->num_of_nsid * sizeof(uint32_t)); 780 } 781 782 return rc; 783 } 784 785 static int 786 nvme_ctrlr_set_supported_log_pages(struct spdk_nvme_ctrlr *ctrlr) 787 { 788 int rc = 0; 789 790 memset(ctrlr->log_page_supported, 0, sizeof(ctrlr->log_page_supported)); 791 /* Mandatory pages */ 792 ctrlr->log_page_supported[SPDK_NVME_LOG_ERROR] = true; 793 ctrlr->log_page_supported[SPDK_NVME_LOG_HEALTH_INFORMATION] = true; 794 ctrlr->log_page_supported[SPDK_NVME_LOG_FIRMWARE_SLOT] = true; 795 if (ctrlr->cdata.lpa.celp) { 796 ctrlr->log_page_supported[SPDK_NVME_LOG_COMMAND_EFFECTS_LOG] = true; 797 } 798 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL && !(ctrlr->quirks & NVME_INTEL_QUIRK_NO_LOG_PAGES)) { 799 rc = nvme_ctrlr_set_intel_support_log_pages(ctrlr); 800 if (rc != 0) { 801 goto out; 802 } 803 } 804 if (ctrlr->cdata.cmic.ana_reporting) { 805 rc = nvme_ctrlr_init_ana_log_page(ctrlr); 806 if (rc == 0) { 807 nvme_ctrlr_parse_ana_log_page(ctrlr, nvme_ctrlr_update_ns_ana_states, 808 ctrlr); 809 } 810 } 811 812 out: 813 return rc; 814 } 815 816 static void 817 nvme_ctrlr_set_intel_supported_features(struct spdk_nvme_ctrlr *ctrlr) 818 { 819 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_MAX_LBA] = true; 820 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_NATIVE_MAX_LBA] = true; 821 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_POWER_GOVERNOR_SETTING] = true; 822 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_SMBUS_ADDRESS] = true; 823 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LED_PATTERN] = true; 824 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_RESET_TIMED_WORKLOAD_COUNTERS] = true; 825 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LATENCY_TRACKING] = true; 826 } 827 828 static void 829 nvme_ctrlr_set_arbitration_feature(struct spdk_nvme_ctrlr *ctrlr) 830 { 831 uint32_t cdw11; 832 struct nvme_completion_poll_status *status; 833 834 if (ctrlr->opts.arbitration_burst == 0) { 835 return; 836 } 837 838 if (ctrlr->opts.arbitration_burst > 7) { 839 SPDK_WARNLOG("Valid arbitration burst values is from 0-7\n"); 840 return; 841 } 842 843 status = calloc(1, sizeof(*status)); 844 if (!status) { 845 SPDK_ERRLOG("Failed to allocate status tracker\n"); 846 return; 847 } 848 849 cdw11 = ctrlr->opts.arbitration_burst; 850 851 if (spdk_nvme_ctrlr_get_flags(ctrlr) & SPDK_NVME_CTRLR_WRR_SUPPORTED) { 852 cdw11 |= (uint32_t)ctrlr->opts.low_priority_weight << 8; 853 cdw11 |= (uint32_t)ctrlr->opts.medium_priority_weight << 16; 854 cdw11 |= (uint32_t)ctrlr->opts.high_priority_weight << 24; 855 } 856 857 if (spdk_nvme_ctrlr_cmd_set_feature(ctrlr, SPDK_NVME_FEAT_ARBITRATION, 858 cdw11, 0, NULL, 0, 859 nvme_completion_poll_cb, status) < 0) { 860 SPDK_ERRLOG("Set arbitration feature failed\n"); 861 free(status); 862 return; 863 } 864 865 if (nvme_wait_for_completion_timeout(ctrlr->adminq, status, 866 ctrlr->opts.admin_timeout_ms * 1000)) { 867 SPDK_ERRLOG("Timeout to set arbitration feature\n"); 868 } 869 870 if (!status->timed_out) { 871 free(status); 872 } 873 } 874 875 static void 876 nvme_ctrlr_set_supported_features(struct spdk_nvme_ctrlr *ctrlr) 877 { 878 memset(ctrlr->feature_supported, 0, sizeof(ctrlr->feature_supported)); 879 /* Mandatory features */ 880 ctrlr->feature_supported[SPDK_NVME_FEAT_ARBITRATION] = true; 881 ctrlr->feature_supported[SPDK_NVME_FEAT_POWER_MANAGEMENT] = true; 882 ctrlr->feature_supported[SPDK_NVME_FEAT_TEMPERATURE_THRESHOLD] = true; 883 ctrlr->feature_supported[SPDK_NVME_FEAT_ERROR_RECOVERY] = true; 884 ctrlr->feature_supported[SPDK_NVME_FEAT_NUMBER_OF_QUEUES] = true; 885 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_COALESCING] = true; 886 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION] = true; 887 ctrlr->feature_supported[SPDK_NVME_FEAT_WRITE_ATOMICITY] = true; 888 ctrlr->feature_supported[SPDK_NVME_FEAT_ASYNC_EVENT_CONFIGURATION] = true; 889 /* Optional features */ 890 if (ctrlr->cdata.vwc.present) { 891 ctrlr->feature_supported[SPDK_NVME_FEAT_VOLATILE_WRITE_CACHE] = true; 892 } 893 if (ctrlr->cdata.apsta.supported) { 894 ctrlr->feature_supported[SPDK_NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION] = true; 895 } 896 if (ctrlr->cdata.hmpre) { 897 ctrlr->feature_supported[SPDK_NVME_FEAT_HOST_MEM_BUFFER] = true; 898 } 899 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL) { 900 nvme_ctrlr_set_intel_supported_features(ctrlr); 901 } 902 903 nvme_ctrlr_set_arbitration_feature(ctrlr); 904 } 905 906 bool 907 spdk_nvme_ctrlr_is_failed(struct spdk_nvme_ctrlr *ctrlr) 908 { 909 return ctrlr->is_failed; 910 } 911 912 void 913 nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove) 914 { 915 /* 916 * Set the flag here and leave the work failure of qpairs to 917 * spdk_nvme_qpair_process_completions(). 918 */ 919 if (hot_remove) { 920 ctrlr->is_removed = true; 921 } 922 ctrlr->is_failed = true; 923 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 924 SPDK_ERRLOG("ctrlr %s in failed state.\n", ctrlr->trid.traddr); 925 } 926 927 /** 928 * This public API function will try to take the controller lock. 929 * Any private functions being called from a thread already holding 930 * the ctrlr lock should call nvme_ctrlr_fail directly. 931 */ 932 void 933 spdk_nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr) 934 { 935 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 936 nvme_ctrlr_fail(ctrlr, false); 937 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 938 } 939 940 static void 941 nvme_ctrlr_shutdown(struct spdk_nvme_ctrlr *ctrlr) 942 { 943 union spdk_nvme_cc_register cc; 944 union spdk_nvme_csts_register csts; 945 uint32_t ms_waited = 0; 946 uint32_t shutdown_timeout_ms; 947 948 if (ctrlr->is_removed) { 949 return; 950 } 951 952 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 953 SPDK_ERRLOG("ctrlr %s get_cc() failed\n", ctrlr->trid.traddr); 954 return; 955 } 956 957 cc.bits.shn = SPDK_NVME_SHN_NORMAL; 958 959 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 960 SPDK_ERRLOG("ctrlr %s set_cc() failed\n", ctrlr->trid.traddr); 961 return; 962 } 963 964 /* 965 * The NVMe specification defines RTD3E to be the time between 966 * setting SHN = 1 until the controller will set SHST = 10b. 967 * If the device doesn't report RTD3 entry latency, or if it 968 * reports RTD3 entry latency less than 10 seconds, pick 969 * 10 seconds as a reasonable amount of time to 970 * wait before proceeding. 971 */ 972 SPDK_DEBUGLOG(nvme, "RTD3E = %" PRIu32 " us\n", ctrlr->cdata.rtd3e); 973 shutdown_timeout_ms = (ctrlr->cdata.rtd3e + 999) / 1000; 974 shutdown_timeout_ms = spdk_max(shutdown_timeout_ms, 10000); 975 SPDK_DEBUGLOG(nvme, "shutdown timeout = %" PRIu32 " ms\n", shutdown_timeout_ms); 976 977 do { 978 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 979 SPDK_ERRLOG("ctrlr %s get_csts() failed\n", ctrlr->trid.traddr); 980 return; 981 } 982 983 if (csts.bits.shst == SPDK_NVME_SHST_COMPLETE) { 984 SPDK_DEBUGLOG(nvme, "ctrlr %s shutdown complete in %u milliseconds\n", 985 ctrlr->trid.traddr, ms_waited); 986 return; 987 } 988 989 nvme_delay(1000); 990 ms_waited++; 991 } while (ms_waited < shutdown_timeout_ms); 992 993 SPDK_ERRLOG("ctrlr %s did not shutdown within %u milliseconds\n", 994 ctrlr->trid.traddr, shutdown_timeout_ms); 995 if (ctrlr->quirks & NVME_QUIRK_SHST_COMPLETE) { 996 SPDK_ERRLOG("likely due to shutdown handling in the VMWare emulated NVMe SSD\n"); 997 } 998 } 999 1000 static int 1001 nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr) 1002 { 1003 union spdk_nvme_cc_register cc; 1004 int rc; 1005 1006 rc = nvme_transport_ctrlr_enable(ctrlr); 1007 if (rc != 0) { 1008 SPDK_ERRLOG("transport ctrlr_enable failed\n"); 1009 return rc; 1010 } 1011 1012 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 1013 SPDK_ERRLOG("get_cc() failed\n"); 1014 return -EIO; 1015 } 1016 1017 if (cc.bits.en != 0) { 1018 SPDK_ERRLOG("called with CC.EN = 1\n"); 1019 return -EINVAL; 1020 } 1021 1022 cc.bits.en = 1; 1023 cc.bits.css = 0; 1024 cc.bits.shn = 0; 1025 cc.bits.iosqes = 6; /* SQ entry size == 64 == 2^6 */ 1026 cc.bits.iocqes = 4; /* CQ entry size == 16 == 2^4 */ 1027 1028 /* Page size is 2 ^ (12 + mps). */ 1029 cc.bits.mps = spdk_u32log2(ctrlr->page_size) - 12; 1030 1031 if (ctrlr->cap.bits.css == 0) { 1032 SPDK_INFOLOG(nvme, 1033 "Drive reports no command sets supported. Assuming NVM is supported.\n"); 1034 ctrlr->cap.bits.css = SPDK_NVME_CAP_CSS_NVM; 1035 } 1036 1037 if (!(ctrlr->cap.bits.css & (1u << ctrlr->opts.command_set))) { 1038 SPDK_DEBUGLOG(nvme, "Requested I/O command set %u but supported mask is 0x%x\n", 1039 ctrlr->opts.command_set, ctrlr->cap.bits.css); 1040 SPDK_DEBUGLOG(nvme, "Falling back to NVM. Assuming NVM is supported.\n"); 1041 ctrlr->opts.command_set = SPDK_NVME_CC_CSS_NVM; 1042 } 1043 1044 cc.bits.css = ctrlr->opts.command_set; 1045 1046 switch (ctrlr->opts.arb_mechanism) { 1047 case SPDK_NVME_CC_AMS_RR: 1048 break; 1049 case SPDK_NVME_CC_AMS_WRR: 1050 if (SPDK_NVME_CAP_AMS_WRR & ctrlr->cap.bits.ams) { 1051 break; 1052 } 1053 return -EINVAL; 1054 case SPDK_NVME_CC_AMS_VS: 1055 if (SPDK_NVME_CAP_AMS_VS & ctrlr->cap.bits.ams) { 1056 break; 1057 } 1058 return -EINVAL; 1059 default: 1060 return -EINVAL; 1061 } 1062 1063 cc.bits.ams = ctrlr->opts.arb_mechanism; 1064 1065 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 1066 SPDK_ERRLOG("set_cc() failed\n"); 1067 return -EIO; 1068 } 1069 1070 return 0; 1071 } 1072 1073 static int 1074 nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr) 1075 { 1076 union spdk_nvme_cc_register cc; 1077 1078 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 1079 SPDK_ERRLOG("get_cc() failed\n"); 1080 return -EIO; 1081 } 1082 1083 if (cc.bits.en == 0) { 1084 return 0; 1085 } 1086 1087 cc.bits.en = 0; 1088 1089 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 1090 SPDK_ERRLOG("set_cc() failed\n"); 1091 return -EIO; 1092 } 1093 1094 return 0; 1095 } 1096 1097 #ifdef DEBUG 1098 static const char * 1099 nvme_ctrlr_state_string(enum nvme_ctrlr_state state) 1100 { 1101 switch (state) { 1102 case NVME_CTRLR_STATE_INIT_DELAY: 1103 return "delay init"; 1104 case NVME_CTRLR_STATE_INIT: 1105 return "init"; 1106 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 1107 return "disable and wait for CSTS.RDY = 1"; 1108 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 1109 return "disable and wait for CSTS.RDY = 0"; 1110 case NVME_CTRLR_STATE_ENABLE: 1111 return "enable controller by writing CC.EN = 1"; 1112 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 1113 return "wait for CSTS.RDY = 1"; 1114 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 1115 return "reset admin queue"; 1116 case NVME_CTRLR_STATE_IDENTIFY: 1117 return "identify controller"; 1118 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 1119 return "wait for identify controller"; 1120 case NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC: 1121 return "identify controller iocs specific"; 1122 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC: 1123 return "wait for identify controller iocs specific"; 1124 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 1125 return "set number of queues"; 1126 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 1127 return "wait for set number of queues"; 1128 case NVME_CTRLR_STATE_CONSTRUCT_NS: 1129 return "construct namespaces"; 1130 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 1131 return "identify active ns"; 1132 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 1133 return "wait for identify active ns"; 1134 case NVME_CTRLR_STATE_IDENTIFY_NS: 1135 return "identify ns"; 1136 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 1137 return "wait for identify ns"; 1138 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 1139 return "identify namespace id descriptors"; 1140 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 1141 return "wait for identify namespace id descriptors"; 1142 case NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC: 1143 return "identify ns iocs specific"; 1144 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC: 1145 return "wait for identify ns iocs specific"; 1146 case NVME_CTRLR_STATE_CONFIGURE_AER: 1147 return "configure AER"; 1148 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 1149 return "wait for configure aer"; 1150 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 1151 return "set supported log pages"; 1152 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 1153 return "set supported features"; 1154 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 1155 return "set doorbell buffer config"; 1156 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 1157 return "wait for doorbell buffer config"; 1158 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 1159 return "set keep alive timeout"; 1160 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 1161 return "wait for set keep alive timeout"; 1162 case NVME_CTRLR_STATE_SET_HOST_ID: 1163 return "set host ID"; 1164 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 1165 return "wait for set host ID"; 1166 case NVME_CTRLR_STATE_READY: 1167 return "ready"; 1168 case NVME_CTRLR_STATE_ERROR: 1169 return "error"; 1170 } 1171 return "unknown"; 1172 }; 1173 #endif /* DEBUG */ 1174 1175 static void 1176 nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state, 1177 uint64_t timeout_in_ms) 1178 { 1179 uint64_t ticks_per_ms, timeout_in_ticks, now_ticks; 1180 1181 ctrlr->state = state; 1182 if (timeout_in_ms == NVME_TIMEOUT_INFINITE) { 1183 goto inf; 1184 } 1185 1186 ticks_per_ms = spdk_get_ticks_hz() / 1000; 1187 if (timeout_in_ms > UINT64_MAX / ticks_per_ms) { 1188 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1189 goto inf; 1190 } 1191 1192 now_ticks = spdk_get_ticks(); 1193 timeout_in_ticks = timeout_in_ms * ticks_per_ms; 1194 if (timeout_in_ticks > UINT64_MAX - now_ticks) { 1195 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1196 goto inf; 1197 } 1198 1199 ctrlr->state_timeout_tsc = timeout_in_ticks + now_ticks; 1200 SPDK_DEBUGLOG(nvme, "setting state to %s (timeout %" PRIu64 " ms)\n", 1201 nvme_ctrlr_state_string(ctrlr->state), timeout_in_ms); 1202 return; 1203 inf: 1204 SPDK_DEBUGLOG(nvme, "setting state to %s (no timeout)\n", 1205 nvme_ctrlr_state_string(ctrlr->state)); 1206 ctrlr->state_timeout_tsc = NVME_TIMEOUT_INFINITE; 1207 } 1208 1209 static void 1210 nvme_ctrlr_free_zns_specific_data(struct spdk_nvme_ctrlr *ctrlr) 1211 { 1212 spdk_free(ctrlr->cdata_zns); 1213 ctrlr->cdata_zns = NULL; 1214 } 1215 1216 static void 1217 nvme_ctrlr_free_iocs_specific_data(struct spdk_nvme_ctrlr *ctrlr) 1218 { 1219 nvme_ctrlr_free_zns_specific_data(ctrlr); 1220 } 1221 1222 static void 1223 nvme_ctrlr_free_doorbell_buffer(struct spdk_nvme_ctrlr *ctrlr) 1224 { 1225 if (ctrlr->shadow_doorbell) { 1226 spdk_free(ctrlr->shadow_doorbell); 1227 ctrlr->shadow_doorbell = NULL; 1228 } 1229 1230 if (ctrlr->eventidx) { 1231 spdk_free(ctrlr->eventidx); 1232 ctrlr->eventidx = NULL; 1233 } 1234 } 1235 1236 static void 1237 nvme_ctrlr_set_doorbell_buffer_config_done(void *arg, const struct spdk_nvme_cpl *cpl) 1238 { 1239 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1240 1241 if (spdk_nvme_cpl_is_error(cpl)) { 1242 SPDK_WARNLOG("Doorbell buffer config failed\n"); 1243 } else { 1244 SPDK_INFOLOG(nvme, "NVMe controller: %s doorbell buffer config enabled\n", 1245 ctrlr->trid.traddr); 1246 } 1247 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1248 ctrlr->opts.admin_timeout_ms); 1249 } 1250 1251 static int 1252 nvme_ctrlr_set_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr) 1253 { 1254 int rc = 0; 1255 uint64_t prp1, prp2, len; 1256 1257 if (!ctrlr->cdata.oacs.doorbell_buffer_config) { 1258 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1259 ctrlr->opts.admin_timeout_ms); 1260 return 0; 1261 } 1262 1263 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 1264 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1265 ctrlr->opts.admin_timeout_ms); 1266 return 0; 1267 } 1268 1269 /* only 1 page size for doorbell buffer */ 1270 ctrlr->shadow_doorbell = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1271 NULL, SPDK_ENV_LCORE_ID_ANY, 1272 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1273 if (ctrlr->shadow_doorbell == NULL) { 1274 rc = -ENOMEM; 1275 goto error; 1276 } 1277 1278 len = ctrlr->page_size; 1279 prp1 = spdk_vtophys(ctrlr->shadow_doorbell, &len); 1280 if (prp1 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1281 rc = -EFAULT; 1282 goto error; 1283 } 1284 1285 ctrlr->eventidx = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1286 NULL, SPDK_ENV_LCORE_ID_ANY, 1287 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1288 if (ctrlr->eventidx == NULL) { 1289 rc = -ENOMEM; 1290 goto error; 1291 } 1292 1293 len = ctrlr->page_size; 1294 prp2 = spdk_vtophys(ctrlr->eventidx, &len); 1295 if (prp2 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1296 rc = -EFAULT; 1297 goto error; 1298 } 1299 1300 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG, 1301 ctrlr->opts.admin_timeout_ms); 1302 1303 rc = nvme_ctrlr_cmd_doorbell_buffer_config(ctrlr, prp1, prp2, 1304 nvme_ctrlr_set_doorbell_buffer_config_done, ctrlr); 1305 if (rc != 0) { 1306 goto error; 1307 } 1308 1309 return 0; 1310 1311 error: 1312 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1313 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1314 return rc; 1315 } 1316 1317 static void 1318 nvme_ctrlr_abort_queued_aborts(struct spdk_nvme_ctrlr *ctrlr) 1319 { 1320 struct nvme_request *req, *tmp; 1321 struct spdk_nvme_cpl cpl = {}; 1322 1323 cpl.status.sc = SPDK_NVME_SC_ABORTED_SQ_DELETION; 1324 cpl.status.sct = SPDK_NVME_SCT_GENERIC; 1325 1326 STAILQ_FOREACH_SAFE(req, &ctrlr->queued_aborts, stailq, tmp) { 1327 STAILQ_REMOVE_HEAD(&ctrlr->queued_aborts, stailq); 1328 1329 nvme_complete_request(req->cb_fn, req->cb_arg, req->qpair, req, &cpl); 1330 nvme_free_request(req); 1331 } 1332 } 1333 1334 int 1335 spdk_nvme_ctrlr_reset(struct spdk_nvme_ctrlr *ctrlr) 1336 { 1337 int rc = 0, rc_tmp = 0; 1338 struct spdk_nvme_qpair *qpair; 1339 1340 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1341 1342 if (ctrlr->is_resetting || ctrlr->is_removed) { 1343 /* 1344 * Controller is already resetting or has been removed. Return 1345 * immediately since there is no need to kick off another 1346 * reset in these cases. 1347 */ 1348 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1349 return ctrlr->is_resetting ? 0 : -ENXIO; 1350 } 1351 1352 ctrlr->is_resetting = true; 1353 ctrlr->is_failed = false; 1354 1355 SPDK_NOTICELOG("resetting controller\n"); 1356 1357 /* Abort all of the queued abort requests */ 1358 nvme_ctrlr_abort_queued_aborts(ctrlr); 1359 1360 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 1361 1362 /* Disable all queues before disabling the controller hardware. */ 1363 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1364 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1365 } 1366 1367 ctrlr->adminq->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1368 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 1369 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, ctrlr->adminq); 1370 if (rc != 0) { 1371 SPDK_ERRLOG("Controller reinitialization failed.\n"); 1372 goto out; 1373 } 1374 1375 /* Doorbell buffer config is invalid during reset */ 1376 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1377 1378 /* I/O Command Set Specific Identify Controller data is invalidated during reset */ 1379 nvme_ctrlr_free_iocs_specific_data(ctrlr); 1380 1381 /* Set the state back to INIT to cause a full hardware reset. */ 1382 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 1383 1384 nvme_qpair_set_state(ctrlr->adminq, NVME_QPAIR_ENABLED); 1385 while (ctrlr->state != NVME_CTRLR_STATE_READY) { 1386 if (nvme_ctrlr_process_init(ctrlr) != 0) { 1387 SPDK_ERRLOG("controller reinitialization failed\n"); 1388 rc = -1; 1389 break; 1390 } 1391 } 1392 1393 /* 1394 * For PCIe controllers, the memory locations of the transport qpair 1395 * don't change when the controller is reset. They simply need to be 1396 * re-enabled with admin commands to the controller. For fabric 1397 * controllers we need to disconnect and reconnect the qpair on its 1398 * own thread outside of the context of the reset. 1399 */ 1400 if (rc == 0 && ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1401 /* Reinitialize qpairs */ 1402 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1403 rc_tmp = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 1404 if (rc_tmp != 0) { 1405 rc = rc_tmp; 1406 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1407 continue; 1408 } 1409 } 1410 } 1411 1412 out: 1413 if (rc) { 1414 nvme_ctrlr_fail(ctrlr, false); 1415 } 1416 ctrlr->is_resetting = false; 1417 1418 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1419 1420 if (!ctrlr->cdata.oaes.ns_attribute_notices) { 1421 /* 1422 * If controller doesn't support ns_attribute_notices and 1423 * namespace attributes change (e.g. number of namespaces) 1424 * we need to update system handling device reset. 1425 */ 1426 nvme_io_msg_ctrlr_update(ctrlr); 1427 } 1428 1429 return rc; 1430 } 1431 1432 int 1433 spdk_nvme_ctrlr_set_trid(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_transport_id *trid) 1434 { 1435 int rc = 0; 1436 1437 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1438 1439 if (ctrlr->is_failed == false) { 1440 rc = -EPERM; 1441 goto out; 1442 } 1443 1444 if (trid->trtype != ctrlr->trid.trtype) { 1445 rc = -EINVAL; 1446 goto out; 1447 } 1448 1449 if (strncmp(trid->subnqn, ctrlr->trid.subnqn, SPDK_NVMF_NQN_MAX_LEN)) { 1450 rc = -EINVAL; 1451 goto out; 1452 } 1453 1454 ctrlr->trid = *trid; 1455 1456 out: 1457 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1458 return rc; 1459 } 1460 1461 static void 1462 nvme_ctrlr_identify_done(void *arg, const struct spdk_nvme_cpl *cpl) 1463 { 1464 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1465 1466 if (spdk_nvme_cpl_is_error(cpl)) { 1467 SPDK_ERRLOG("nvme_identify_controller failed!\n"); 1468 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1469 return; 1470 } 1471 1472 /* 1473 * Use MDTS to ensure our default max_xfer_size doesn't exceed what the 1474 * controller supports. 1475 */ 1476 ctrlr->max_xfer_size = nvme_transport_ctrlr_get_max_xfer_size(ctrlr); 1477 SPDK_DEBUGLOG(nvme, "transport max_xfer_size %u\n", ctrlr->max_xfer_size); 1478 if (ctrlr->cdata.mdts > 0) { 1479 ctrlr->max_xfer_size = spdk_min(ctrlr->max_xfer_size, 1480 ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts))); 1481 SPDK_DEBUGLOG(nvme, "MDTS max_xfer_size %u\n", ctrlr->max_xfer_size); 1482 } 1483 1484 SPDK_DEBUGLOG(nvme, "CNTLID 0x%04" PRIx16 "\n", ctrlr->cdata.cntlid); 1485 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1486 ctrlr->cntlid = ctrlr->cdata.cntlid; 1487 } else { 1488 /* 1489 * Fabrics controllers should already have CNTLID from the Connect command. 1490 * 1491 * If CNTLID from Connect doesn't match CNTLID in the Identify Controller data, 1492 * trust the one from Connect. 1493 */ 1494 if (ctrlr->cntlid != ctrlr->cdata.cntlid) { 1495 SPDK_DEBUGLOG(nvme, 1496 "Identify CNTLID 0x%04" PRIx16 " != Connect CNTLID 0x%04" PRIx16 "\n", 1497 ctrlr->cdata.cntlid, ctrlr->cntlid); 1498 } 1499 } 1500 1501 if (ctrlr->cdata.sgls.supported) { 1502 assert(ctrlr->cdata.sgls.supported != 0x3); 1503 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_SUPPORTED; 1504 if (ctrlr->cdata.sgls.supported == 0x2) { 1505 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT; 1506 } 1507 /* 1508 * Use MSDBD to ensure our max_sges doesn't exceed what the 1509 * controller supports. 1510 */ 1511 ctrlr->max_sges = nvme_transport_ctrlr_get_max_sges(ctrlr); 1512 if (ctrlr->cdata.nvmf_specific.msdbd != 0) { 1513 ctrlr->max_sges = spdk_min(ctrlr->cdata.nvmf_specific.msdbd, ctrlr->max_sges); 1514 } else { 1515 /* A value 0 indicates no limit. */ 1516 } 1517 SPDK_DEBUGLOG(nvme, "transport max_sges %u\n", ctrlr->max_sges); 1518 } 1519 1520 if (ctrlr->cdata.oacs.security && !(ctrlr->quirks & NVME_QUIRK_OACS_SECURITY)) { 1521 ctrlr->flags |= SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED; 1522 } 1523 1524 SPDK_DEBUGLOG(nvme, "fuses compare and write: %d\n", ctrlr->cdata.fuses.compare_and_write); 1525 if (ctrlr->cdata.fuses.compare_and_write) { 1526 ctrlr->flags |= SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED; 1527 } 1528 1529 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC, 1530 ctrlr->opts.admin_timeout_ms); 1531 } 1532 1533 static int 1534 nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr) 1535 { 1536 int rc; 1537 1538 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY, 1539 ctrlr->opts.admin_timeout_ms); 1540 1541 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR, 0, 0, 0, 1542 &ctrlr->cdata, sizeof(ctrlr->cdata), 1543 nvme_ctrlr_identify_done, ctrlr); 1544 if (rc != 0) { 1545 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1546 return rc; 1547 } 1548 1549 return 0; 1550 } 1551 1552 static void 1553 nvme_ctrlr_identify_zns_specific_done(void *arg, const struct spdk_nvme_cpl *cpl) 1554 { 1555 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1556 1557 if (spdk_nvme_cpl_is_error(cpl)) { 1558 /* no need to print an error, the controller simply does not support ZNS */ 1559 nvme_ctrlr_free_zns_specific_data(ctrlr); 1560 } 1561 1562 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES, 1563 ctrlr->opts.admin_timeout_ms); 1564 } 1565 1566 /** 1567 * This function will try to fetch the I/O Command Specific Controller data structure for 1568 * each I/O Command Set supported by SPDK. 1569 * 1570 * If an I/O Command Set is not supported by the controller, "Invalid Field in Command" 1571 * will be returned. Since we are fetching in a exploratively way, getting an error back 1572 * from the controller should not be treated as fatal. 1573 * 1574 * I/O Command Sets not supported by SPDK will be skipped (e.g. Key Value Command Set). 1575 * 1576 * I/O Command Sets without a IOCS specific data structure (i.e. a zero-filled IOCS specific 1577 * data structure) will be skipped (e.g. NVM Command Set, Key Value Command Set). 1578 */ 1579 static int 1580 nvme_ctrlr_identify_iocs_specific(struct spdk_nvme_ctrlr *ctrlr) 1581 { 1582 int rc; 1583 1584 if (!nvme_ctrlr_multi_iocs_enabled(ctrlr)) { 1585 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES, 1586 ctrlr->opts.admin_timeout_ms); 1587 return 0; 1588 } 1589 1590 /* 1591 * Since SPDK currently only needs to fetch a single Command Set, keep the code here, 1592 * instead of creating multiple NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC substates, 1593 * which would require additional functions and complexity for no good reason. 1594 */ 1595 assert(!ctrlr->cdata_zns); 1596 ctrlr->cdata_zns = spdk_zmalloc(sizeof(*ctrlr->cdata_zns), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, 1597 SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA); 1598 if (!ctrlr->cdata_zns) { 1599 rc = -ENOMEM; 1600 goto error; 1601 } 1602 1603 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC, 1604 ctrlr->opts.admin_timeout_ms); 1605 1606 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR_IOCS, 0, 0, SPDK_NVME_CSI_ZNS, 1607 ctrlr->cdata_zns, sizeof(*ctrlr->cdata_zns), 1608 nvme_ctrlr_identify_zns_specific_done, ctrlr); 1609 if (rc != 0) { 1610 goto error; 1611 } 1612 1613 return 0; 1614 1615 error: 1616 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1617 nvme_ctrlr_free_zns_specific_data(ctrlr); 1618 return rc; 1619 } 1620 1621 enum nvme_active_ns_state { 1622 NVME_ACTIVE_NS_STATE_IDLE, 1623 NVME_ACTIVE_NS_STATE_PROCESSING, 1624 NVME_ACTIVE_NS_STATE_DONE, 1625 NVME_ACTIVE_NS_STATE_ERROR 1626 }; 1627 1628 typedef void (*nvme_active_ns_ctx_deleter)(struct nvme_active_ns_ctx *); 1629 1630 struct nvme_active_ns_ctx { 1631 struct spdk_nvme_ctrlr *ctrlr; 1632 uint32_t page; 1633 uint32_t num_pages; 1634 uint32_t next_nsid; 1635 uint32_t *new_ns_list; 1636 nvme_active_ns_ctx_deleter deleter; 1637 1638 enum nvme_active_ns_state state; 1639 }; 1640 1641 static struct nvme_active_ns_ctx * 1642 nvme_active_ns_ctx_create(struct spdk_nvme_ctrlr *ctrlr, nvme_active_ns_ctx_deleter deleter) 1643 { 1644 struct nvme_active_ns_ctx *ctx; 1645 uint32_t num_pages = 0; 1646 uint32_t *new_ns_list = NULL; 1647 1648 ctx = calloc(1, sizeof(*ctx)); 1649 if (!ctx) { 1650 SPDK_ERRLOG("Failed to allocate nvme_active_ns_ctx!\n"); 1651 return NULL; 1652 } 1653 1654 if (ctrlr->num_ns) { 1655 /* The allocated size must be a multiple of sizeof(struct spdk_nvme_ns_list) */ 1656 num_pages = (ctrlr->num_ns * sizeof(new_ns_list[0]) - 1) / sizeof(struct spdk_nvme_ns_list) + 1; 1657 new_ns_list = spdk_zmalloc(num_pages * sizeof(struct spdk_nvme_ns_list), ctrlr->page_size, 1658 NULL, SPDK_ENV_LCORE_ID_ANY, SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1659 if (!new_ns_list) { 1660 SPDK_ERRLOG("Failed to allocate active_ns_list!\n"); 1661 free(ctx); 1662 return NULL; 1663 } 1664 } 1665 1666 ctx->num_pages = num_pages; 1667 ctx->new_ns_list = new_ns_list; 1668 ctx->ctrlr = ctrlr; 1669 ctx->deleter = deleter; 1670 1671 return ctx; 1672 } 1673 1674 static void 1675 nvme_active_ns_ctx_destroy(struct nvme_active_ns_ctx *ctx) 1676 { 1677 spdk_free(ctx->new_ns_list); 1678 free(ctx); 1679 } 1680 1681 static void 1682 nvme_ctrlr_identify_active_ns_swap(struct spdk_nvme_ctrlr *ctrlr, uint32_t **new_ns_list) 1683 { 1684 spdk_free(ctrlr->active_ns_list); 1685 ctrlr->active_ns_list = *new_ns_list; 1686 *new_ns_list = NULL; 1687 } 1688 1689 static void 1690 nvme_ctrlr_identify_active_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1691 { 1692 struct nvme_active_ns_ctx *ctx = arg; 1693 1694 if (spdk_nvme_cpl_is_error(cpl)) { 1695 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1696 goto out; 1697 } 1698 1699 ctx->next_nsid = ctx->new_ns_list[1024 * ctx->page + 1023]; 1700 if (ctx->next_nsid == 0 || ++ctx->page == ctx->num_pages) { 1701 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1702 goto out; 1703 } 1704 1705 nvme_ctrlr_identify_active_ns_async(ctx); 1706 return; 1707 1708 out: 1709 if (ctx->deleter) { 1710 ctx->deleter(ctx); 1711 } 1712 } 1713 1714 static void 1715 nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx) 1716 { 1717 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1718 uint32_t i; 1719 int rc; 1720 1721 if (ctrlr->num_ns == 0) { 1722 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1723 goto out; 1724 } 1725 1726 /* 1727 * If controller doesn't support active ns list CNS 0x02 dummy up 1728 * an active ns list, i.e. all namespaces report as active 1729 */ 1730 if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 1, 0) || ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS) { 1731 for (i = 0; i < ctrlr->num_ns; i++) { 1732 ctx->new_ns_list[i] = i + 1; 1733 } 1734 1735 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1736 goto out; 1737 } 1738 1739 ctx->state = NVME_ACTIVE_NS_STATE_PROCESSING; 1740 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_ACTIVE_NS_LIST, 0, ctx->next_nsid, 0, 1741 &ctx->new_ns_list[1024 * ctx->page], sizeof(struct spdk_nvme_ns_list), 1742 nvme_ctrlr_identify_active_ns_async_done, ctx); 1743 if (rc != 0) { 1744 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1745 goto out; 1746 } 1747 1748 return; 1749 1750 out: 1751 if (ctx->deleter) { 1752 ctx->deleter(ctx); 1753 } 1754 } 1755 1756 static void 1757 _nvme_active_ns_ctx_deleter(struct nvme_active_ns_ctx *ctx) 1758 { 1759 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1760 1761 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1762 nvme_ctrlr_destruct_namespaces(ctrlr); 1763 nvme_active_ns_ctx_destroy(ctx); 1764 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1765 return; 1766 } 1767 1768 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1769 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1770 nvme_active_ns_ctx_destroy(ctx); 1771 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS, ctrlr->opts.admin_timeout_ms); 1772 } 1773 1774 static void 1775 _nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1776 { 1777 struct nvme_active_ns_ctx *ctx; 1778 1779 ctx = nvme_active_ns_ctx_create(ctrlr, _nvme_active_ns_ctx_deleter); 1780 if (!ctx) { 1781 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1782 return; 1783 } 1784 1785 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS, 1786 ctrlr->opts.admin_timeout_ms); 1787 nvme_ctrlr_identify_active_ns_async(ctx); 1788 } 1789 1790 int 1791 nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1792 { 1793 struct nvme_active_ns_ctx *ctx; 1794 int rc; 1795 1796 ctx = nvme_active_ns_ctx_create(ctrlr, NULL); 1797 if (!ctx) { 1798 return -ENOMEM; 1799 } 1800 1801 nvme_ctrlr_identify_active_ns_async(ctx); 1802 while (ctx->state == NVME_ACTIVE_NS_STATE_PROCESSING) { 1803 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 1804 if (rc < 0) { 1805 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1806 break; 1807 } 1808 } 1809 1810 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1811 nvme_active_ns_ctx_destroy(ctx); 1812 return -ENXIO; 1813 } 1814 1815 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1816 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1817 nvme_active_ns_ctx_destroy(ctx); 1818 1819 return 0; 1820 } 1821 1822 static void 1823 nvme_ctrlr_identify_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1824 { 1825 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1826 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1827 uint32_t nsid; 1828 int rc; 1829 1830 if (spdk_nvme_cpl_is_error(cpl)) { 1831 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1832 return; 1833 } 1834 1835 nvme_ns_set_identify_data(ns); 1836 1837 /* move on to the next active NS */ 1838 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1839 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1840 if (ns == NULL) { 1841 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ID_DESCS, 1842 ctrlr->opts.admin_timeout_ms); 1843 return; 1844 } 1845 ns->ctrlr = ctrlr; 1846 ns->id = nsid; 1847 1848 rc = nvme_ctrlr_identify_ns_async(ns); 1849 if (rc) { 1850 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1851 } 1852 } 1853 1854 static int 1855 nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns) 1856 { 1857 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1858 struct spdk_nvme_ns_data *nsdata; 1859 1860 nsdata = &ctrlr->nsdata[ns->id - 1]; 1861 1862 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS, 1863 ctrlr->opts.admin_timeout_ms); 1864 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS, 0, ns->id, 0, 1865 nsdata, sizeof(*nsdata), 1866 nvme_ctrlr_identify_ns_async_done, ns); 1867 } 1868 1869 static int 1870 nvme_ctrlr_identify_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1871 { 1872 uint32_t nsid; 1873 struct spdk_nvme_ns *ns; 1874 int rc; 1875 1876 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1877 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1878 if (ns == NULL) { 1879 /* No active NS, move on to the next state */ 1880 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1881 ctrlr->opts.admin_timeout_ms); 1882 return 0; 1883 } 1884 1885 ns->ctrlr = ctrlr; 1886 ns->id = nsid; 1887 1888 rc = nvme_ctrlr_identify_ns_async(ns); 1889 if (rc) { 1890 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1891 } 1892 1893 return rc; 1894 } 1895 1896 static int 1897 nvme_ctrlr_identify_namespaces_iocs_specific_next(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid) 1898 { 1899 uint32_t nsid; 1900 struct spdk_nvme_ns *ns; 1901 int rc; 1902 1903 if (!prev_nsid) { 1904 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1905 } else { 1906 /* move on to the next active NS */ 1907 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, prev_nsid); 1908 } 1909 1910 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1911 if (ns == NULL) { 1912 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1913 ctrlr->opts.admin_timeout_ms); 1914 return 0; 1915 } 1916 1917 /* loop until we find a ns which has (supported) iocs specific data */ 1918 while (!nvme_ns_has_supported_iocs_specific_data(ns)) { 1919 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1920 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1921 if (ns == NULL) { 1922 /* no namespace with (supported) iocs specific data found */ 1923 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1924 ctrlr->opts.admin_timeout_ms); 1925 return 0; 1926 } 1927 } 1928 1929 rc = nvme_ctrlr_identify_ns_iocs_specific_async(ns); 1930 if (rc) { 1931 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1932 } 1933 1934 return rc; 1935 } 1936 1937 static void 1938 nvme_ctrlr_identify_ns_zns_specific_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1939 { 1940 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1941 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1942 1943 if (spdk_nvme_cpl_is_error(cpl)) { 1944 nvme_ns_free_zns_specific_data(ns); 1945 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1946 return; 1947 } 1948 1949 nvme_ctrlr_identify_namespaces_iocs_specific_next(ctrlr, ns->id); 1950 } 1951 1952 static int 1953 nvme_ctrlr_identify_ns_iocs_specific_async(struct spdk_nvme_ns *ns) 1954 { 1955 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1956 struct spdk_nvme_zns_ns_data **nsdata_zns; 1957 int rc; 1958 1959 switch (ns->csi) { 1960 case SPDK_NVME_CSI_ZNS: 1961 break; 1962 default: 1963 /* 1964 * This switch must handle all cases for which 1965 * nvme_ns_has_supported_iocs_specific_data() returns true, 1966 * other cases should never happen. 1967 */ 1968 assert(0); 1969 } 1970 1971 assert(ctrlr->nsdata_zns); 1972 nsdata_zns = &ctrlr->nsdata_zns[ns->id - 1]; 1973 assert(!*nsdata_zns); 1974 *nsdata_zns = spdk_zmalloc(sizeof(**nsdata_zns), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, 1975 SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA); 1976 if (!*nsdata_zns) { 1977 return -ENOMEM; 1978 } 1979 1980 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC, 1981 ctrlr->opts.admin_timeout_ms); 1982 rc = nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_IOCS, 0, ns->id, ns->csi, 1983 *nsdata_zns, sizeof(**nsdata_zns), 1984 nvme_ctrlr_identify_ns_zns_specific_async_done, ns); 1985 if (rc) { 1986 nvme_ns_free_zns_specific_data(ns); 1987 } 1988 1989 return rc; 1990 } 1991 1992 static int 1993 nvme_ctrlr_identify_namespaces_iocs_specific(struct spdk_nvme_ctrlr *ctrlr) 1994 { 1995 if (!nvme_ctrlr_multi_iocs_enabled(ctrlr)) { 1996 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1997 ctrlr->opts.admin_timeout_ms); 1998 return 0; 1999 } 2000 2001 return nvme_ctrlr_identify_namespaces_iocs_specific_next(ctrlr, 0); 2002 } 2003 2004 static void 2005 nvme_ctrlr_identify_id_desc_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 2006 { 2007 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 2008 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 2009 uint32_t nsid; 2010 int rc; 2011 2012 if (spdk_nvme_cpl_is_error(cpl)) { 2013 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 2014 ctrlr->opts.admin_timeout_ms); 2015 return; 2016 } 2017 2018 nvme_ns_set_id_desc_list_data(ns); 2019 2020 /* move on to the next active NS */ 2021 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 2022 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 2023 if (ns == NULL) { 2024 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC, 2025 ctrlr->opts.admin_timeout_ms); 2026 return; 2027 } 2028 2029 rc = nvme_ctrlr_identify_id_desc_async(ns); 2030 if (rc) { 2031 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2032 } 2033 } 2034 2035 static int 2036 nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns) 2037 { 2038 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 2039 2040 memset(ns->id_desc_list, 0, sizeof(ns->id_desc_list)); 2041 2042 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS, 2043 ctrlr->opts.admin_timeout_ms); 2044 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_ID_DESCRIPTOR_LIST, 2045 0, ns->id, 0, ns->id_desc_list, sizeof(ns->id_desc_list), 2046 nvme_ctrlr_identify_id_desc_async_done, ns); 2047 } 2048 2049 static int 2050 nvme_ctrlr_identify_id_desc_namespaces(struct spdk_nvme_ctrlr *ctrlr) 2051 { 2052 uint32_t nsid; 2053 struct spdk_nvme_ns *ns; 2054 int rc; 2055 2056 if ((ctrlr->vs.raw < SPDK_NVME_VERSION(1, 3, 0) && 2057 !(ctrlr->cap.bits.css & SPDK_NVME_CAP_CSS_IOCS)) || 2058 (ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 2059 SPDK_DEBUGLOG(nvme, "Version < 1.3; not attempting to retrieve NS ID Descriptor List\n"); 2060 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 2061 ctrlr->opts.admin_timeout_ms); 2062 return 0; 2063 } 2064 2065 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 2066 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 2067 if (ns == NULL) { 2068 /* No active NS, move on to the next state */ 2069 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 2070 ctrlr->opts.admin_timeout_ms); 2071 return 0; 2072 } 2073 2074 rc = nvme_ctrlr_identify_id_desc_async(ns); 2075 if (rc) { 2076 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2077 } 2078 2079 return rc; 2080 } 2081 2082 static void 2083 nvme_ctrlr_update_nvmf_ioccsz(struct spdk_nvme_ctrlr *ctrlr) 2084 { 2085 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_RDMA || 2086 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_TCP || 2087 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_FC) { 2088 if (ctrlr->cdata.nvmf_specific.ioccsz < 4) { 2089 SPDK_ERRLOG("Incorrect IOCCSZ %u, the minimum value should be 4\n", 2090 ctrlr->cdata.nvmf_specific.ioccsz); 2091 ctrlr->cdata.nvmf_specific.ioccsz = 4; 2092 assert(0); 2093 } 2094 ctrlr->ioccsz_bytes = ctrlr->cdata.nvmf_specific.ioccsz * 16 - sizeof(struct spdk_nvme_cmd); 2095 ctrlr->icdoff = ctrlr->cdata.nvmf_specific.icdoff; 2096 } 2097 } 2098 2099 static void 2100 nvme_ctrlr_set_num_queues_done(void *arg, const struct spdk_nvme_cpl *cpl) 2101 { 2102 uint32_t cq_allocated, sq_allocated, min_allocated, i; 2103 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2104 2105 if (spdk_nvme_cpl_is_error(cpl)) { 2106 SPDK_ERRLOG("Set Features - Number of Queues failed!\n"); 2107 ctrlr->opts.num_io_queues = 0; 2108 } else { 2109 /* 2110 * Data in cdw0 is 0-based. 2111 * Lower 16-bits indicate number of submission queues allocated. 2112 * Upper 16-bits indicate number of completion queues allocated. 2113 */ 2114 sq_allocated = (cpl->cdw0 & 0xFFFF) + 1; 2115 cq_allocated = (cpl->cdw0 >> 16) + 1; 2116 2117 /* 2118 * For 1:1 queue mapping, set number of allocated queues to be minimum of 2119 * submission and completion queues. 2120 */ 2121 min_allocated = spdk_min(sq_allocated, cq_allocated); 2122 2123 /* Set number of queues to be minimum of requested and actually allocated. */ 2124 ctrlr->opts.num_io_queues = spdk_min(min_allocated, ctrlr->opts.num_io_queues); 2125 } 2126 2127 ctrlr->free_io_qids = spdk_bit_array_create(ctrlr->opts.num_io_queues + 1); 2128 if (ctrlr->free_io_qids == NULL) { 2129 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2130 return; 2131 } 2132 2133 /* Initialize list of free I/O queue IDs. QID 0 is the admin queue (implicitly allocated). */ 2134 for (i = 1; i <= ctrlr->opts.num_io_queues; i++) { 2135 spdk_nvme_ctrlr_free_qid(ctrlr, i); 2136 } 2137 2138 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONSTRUCT_NS, 2139 ctrlr->opts.admin_timeout_ms); 2140 } 2141 2142 static int 2143 nvme_ctrlr_set_num_queues(struct spdk_nvme_ctrlr *ctrlr) 2144 { 2145 int rc; 2146 2147 if (ctrlr->opts.num_io_queues > SPDK_NVME_MAX_IO_QUEUES) { 2148 SPDK_NOTICELOG("Limiting requested num_io_queues %u to max %d\n", 2149 ctrlr->opts.num_io_queues, SPDK_NVME_MAX_IO_QUEUES); 2150 ctrlr->opts.num_io_queues = SPDK_NVME_MAX_IO_QUEUES; 2151 } else if (ctrlr->opts.num_io_queues < 1) { 2152 SPDK_NOTICELOG("Requested num_io_queues 0, increasing to 1\n"); 2153 ctrlr->opts.num_io_queues = 1; 2154 } 2155 2156 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES, 2157 ctrlr->opts.admin_timeout_ms); 2158 2159 rc = nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->opts.num_io_queues, 2160 nvme_ctrlr_set_num_queues_done, ctrlr); 2161 if (rc != 0) { 2162 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2163 return rc; 2164 } 2165 2166 return 0; 2167 } 2168 2169 static void 2170 nvme_ctrlr_set_keep_alive_timeout_done(void *arg, const struct spdk_nvme_cpl *cpl) 2171 { 2172 uint32_t keep_alive_interval_us; 2173 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2174 2175 if (spdk_nvme_cpl_is_error(cpl)) { 2176 if ((cpl->status.sct == SPDK_NVME_SCT_GENERIC) && 2177 (cpl->status.sc == SPDK_NVME_SC_INVALID_FIELD)) { 2178 SPDK_DEBUGLOG(nvme, "Keep alive timeout Get Feature is not supported\n"); 2179 } else { 2180 SPDK_ERRLOG("Keep alive timeout Get Feature failed: SC %x SCT %x\n", 2181 cpl->status.sc, cpl->status.sct); 2182 ctrlr->opts.keep_alive_timeout_ms = 0; 2183 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2184 return; 2185 } 2186 } else { 2187 if (ctrlr->opts.keep_alive_timeout_ms != cpl->cdw0) { 2188 SPDK_DEBUGLOG(nvme, "Controller adjusted keep alive timeout to %u ms\n", 2189 cpl->cdw0); 2190 } 2191 2192 ctrlr->opts.keep_alive_timeout_ms = cpl->cdw0; 2193 } 2194 2195 if (ctrlr->opts.keep_alive_timeout_ms == 0) { 2196 ctrlr->keep_alive_interval_ticks = 0; 2197 } else { 2198 keep_alive_interval_us = ctrlr->opts.keep_alive_timeout_ms * 1000 / 2; 2199 2200 SPDK_DEBUGLOG(nvme, "Sending keep alive every %u us\n", keep_alive_interval_us); 2201 2202 ctrlr->keep_alive_interval_ticks = (keep_alive_interval_us * spdk_get_ticks_hz()) / 2203 UINT64_C(1000000); 2204 2205 /* Schedule the first Keep Alive to be sent as soon as possible. */ 2206 ctrlr->next_keep_alive_tick = spdk_get_ticks(); 2207 } 2208 2209 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 2210 ctrlr->opts.admin_timeout_ms); 2211 } 2212 2213 static int 2214 nvme_ctrlr_set_keep_alive_timeout(struct spdk_nvme_ctrlr *ctrlr) 2215 { 2216 int rc; 2217 2218 if (ctrlr->opts.keep_alive_timeout_ms == 0) { 2219 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 2220 ctrlr->opts.admin_timeout_ms); 2221 return 0; 2222 } 2223 2224 if (ctrlr->cdata.kas == 0) { 2225 SPDK_DEBUGLOG(nvme, "Controller KAS is 0 - not enabling Keep Alive\n"); 2226 ctrlr->opts.keep_alive_timeout_ms = 0; 2227 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 2228 ctrlr->opts.admin_timeout_ms); 2229 return 0; 2230 } 2231 2232 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT, 2233 ctrlr->opts.admin_timeout_ms); 2234 2235 /* Retrieve actual keep alive timeout, since the controller may have adjusted it. */ 2236 rc = spdk_nvme_ctrlr_cmd_get_feature(ctrlr, SPDK_NVME_FEAT_KEEP_ALIVE_TIMER, 0, NULL, 0, 2237 nvme_ctrlr_set_keep_alive_timeout_done, ctrlr); 2238 if (rc != 0) { 2239 SPDK_ERRLOG("Keep alive timeout Get Feature failed: %d\n", rc); 2240 ctrlr->opts.keep_alive_timeout_ms = 0; 2241 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2242 return rc; 2243 } 2244 2245 return 0; 2246 } 2247 2248 static void 2249 nvme_ctrlr_set_host_id_done(void *arg, const struct spdk_nvme_cpl *cpl) 2250 { 2251 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2252 2253 if (spdk_nvme_cpl_is_error(cpl)) { 2254 /* 2255 * Treat Set Features - Host ID failure as non-fatal, since the Host ID feature 2256 * is optional. 2257 */ 2258 SPDK_WARNLOG("Set Features - Host ID failed: SC 0x%x SCT 0x%x\n", 2259 cpl->status.sc, cpl->status.sct); 2260 } else { 2261 SPDK_DEBUGLOG(nvme, "Set Features - Host ID was successful\n"); 2262 } 2263 2264 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 2265 } 2266 2267 static int 2268 nvme_ctrlr_set_host_id(struct spdk_nvme_ctrlr *ctrlr) 2269 { 2270 uint8_t *host_id; 2271 uint32_t host_id_size; 2272 int rc; 2273 2274 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 2275 /* 2276 * NVMe-oF sends the host ID during Connect and doesn't allow 2277 * Set Features - Host Identifier after Connect, so we don't need to do anything here. 2278 */ 2279 SPDK_DEBUGLOG(nvme, "NVMe-oF transport - not sending Set Features - Host ID\n"); 2280 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 2281 return 0; 2282 } 2283 2284 if (ctrlr->cdata.ctratt.host_id_exhid_supported) { 2285 SPDK_DEBUGLOG(nvme, "Using 128-bit extended host identifier\n"); 2286 host_id = ctrlr->opts.extended_host_id; 2287 host_id_size = sizeof(ctrlr->opts.extended_host_id); 2288 } else { 2289 SPDK_DEBUGLOG(nvme, "Using 64-bit host identifier\n"); 2290 host_id = ctrlr->opts.host_id; 2291 host_id_size = sizeof(ctrlr->opts.host_id); 2292 } 2293 2294 /* If the user specified an all-zeroes host identifier, don't send the command. */ 2295 if (spdk_mem_all_zero(host_id, host_id_size)) { 2296 SPDK_DEBUGLOG(nvme, 2297 "User did not specify host ID - not sending Set Features - Host ID\n"); 2298 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 2299 return 0; 2300 } 2301 2302 SPDK_LOGDUMP(nvme, "host_id", host_id, host_id_size); 2303 2304 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_HOST_ID, 2305 ctrlr->opts.admin_timeout_ms); 2306 2307 rc = nvme_ctrlr_cmd_set_host_id(ctrlr, host_id, host_id_size, nvme_ctrlr_set_host_id_done, ctrlr); 2308 if (rc != 0) { 2309 SPDK_ERRLOG("Set Features - Host ID failed: %d\n", rc); 2310 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2311 return rc; 2312 } 2313 2314 return 0; 2315 } 2316 2317 static void 2318 nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 2319 { 2320 if (ctrlr->ns) { 2321 uint32_t i, num_ns = ctrlr->num_ns; 2322 2323 for (i = 0; i < num_ns; i++) { 2324 nvme_ns_destruct(&ctrlr->ns[i]); 2325 } 2326 2327 spdk_free(ctrlr->ns); 2328 ctrlr->ns = NULL; 2329 ctrlr->num_ns = 0; 2330 } 2331 2332 if (ctrlr->nsdata) { 2333 spdk_free(ctrlr->nsdata); 2334 ctrlr->nsdata = NULL; 2335 } 2336 2337 spdk_free(ctrlr->nsdata_zns); 2338 ctrlr->nsdata_zns = NULL; 2339 2340 spdk_free(ctrlr->active_ns_list); 2341 ctrlr->active_ns_list = NULL; 2342 } 2343 2344 static void 2345 nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr) 2346 { 2347 uint32_t i, nn = ctrlr->cdata.nn; 2348 struct spdk_nvme_ns_data *nsdata; 2349 bool ns_is_active; 2350 2351 for (i = 0; i < nn; i++) { 2352 struct spdk_nvme_ns *ns = &ctrlr->ns[i]; 2353 uint32_t nsid = i + 1; 2354 2355 nsdata = &ctrlr->nsdata[nsid - 1]; 2356 ns_is_active = spdk_nvme_ctrlr_is_active_ns(ctrlr, nsid); 2357 2358 if (nsdata->ncap && ns_is_active) { 2359 if (nvme_ns_update(ns) != 0) { 2360 SPDK_ERRLOG("Failed to update active NS %u\n", nsid); 2361 continue; 2362 } 2363 } 2364 2365 if ((nsdata->ncap == 0) && ns_is_active) { 2366 if (nvme_ns_construct(ns, nsid, ctrlr) != 0) { 2367 continue; 2368 } 2369 } 2370 2371 if (nsdata->ncap && !ns_is_active) { 2372 nvme_ns_destruct(ns); 2373 } 2374 } 2375 } 2376 2377 static int 2378 nvme_ctrlr_construct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 2379 { 2380 int rc = 0; 2381 uint32_t i, nn = ctrlr->cdata.nn; 2382 2383 /* ctrlr->num_ns may be 0 (startup) or a different number of namespaces (reset), 2384 * so check if we need to reallocate. 2385 */ 2386 if (nn != ctrlr->num_ns) { 2387 nvme_ctrlr_destruct_namespaces(ctrlr); 2388 2389 if (nn == 0) { 2390 SPDK_WARNLOG("controller has 0 namespaces\n"); 2391 return 0; 2392 } 2393 2394 ctrlr->ns = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns), 64, NULL, 2395 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2396 if (ctrlr->ns == NULL) { 2397 rc = -ENOMEM; 2398 goto fail; 2399 } 2400 2401 ctrlr->nsdata = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns_data), 64, 2402 NULL, SPDK_ENV_SOCKET_ID_ANY, 2403 SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA); 2404 if (ctrlr->nsdata == NULL) { 2405 rc = -ENOMEM; 2406 goto fail; 2407 } 2408 2409 ctrlr->nsdata_zns = spdk_zmalloc(nn * sizeof(struct spdk_nvme_zns_ns_data *), 64, 2410 NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2411 if (ctrlr->nsdata_zns == NULL) { 2412 rc = -ENOMEM; 2413 goto fail; 2414 } 2415 2416 ctrlr->num_ns = nn; 2417 } else { 2418 /* 2419 * The controller could have been reset with the same number of namespaces. 2420 * If so, we still need to free the iocs specific data, to get a clean slate. 2421 */ 2422 for (i = 0; i < ctrlr->num_ns; i++) { 2423 nvme_ns_free_iocs_specific_data(&ctrlr->ns[i]); 2424 } 2425 } 2426 2427 return 0; 2428 2429 fail: 2430 nvme_ctrlr_destruct_namespaces(ctrlr); 2431 return rc; 2432 } 2433 2434 static void 2435 nvme_ctrlr_async_event_cb(void *arg, const struct spdk_nvme_cpl *cpl) 2436 { 2437 struct nvme_async_event_request *aer = arg; 2438 struct spdk_nvme_ctrlr *ctrlr = aer->ctrlr; 2439 struct spdk_nvme_ctrlr_process *active_proc; 2440 union spdk_nvme_async_event_completion event; 2441 int rc; 2442 2443 if (cpl->status.sct == SPDK_NVME_SCT_GENERIC && 2444 cpl->status.sc == SPDK_NVME_SC_ABORTED_SQ_DELETION) { 2445 /* 2446 * This is simulated when controller is being shut down, to 2447 * effectively abort outstanding asynchronous event requests 2448 * and make sure all memory is freed. Do not repost the 2449 * request in this case. 2450 */ 2451 return; 2452 } 2453 2454 if (cpl->status.sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 2455 cpl->status.sc == SPDK_NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED) { 2456 /* 2457 * SPDK will only send as many AERs as the device says it supports, 2458 * so this status code indicates an out-of-spec device. Do not repost 2459 * the request in this case. 2460 */ 2461 SPDK_ERRLOG("Controller appears out-of-spec for asynchronous event request\n" 2462 "handling. Do not repost this AER.\n"); 2463 return; 2464 } 2465 2466 event.raw = cpl->cdw0; 2467 if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) && 2468 (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_NS_ATTR_CHANGED)) { 2469 rc = nvme_ctrlr_identify_active_ns(ctrlr); 2470 if (rc) { 2471 return; 2472 } 2473 nvme_ctrlr_update_namespaces(ctrlr); 2474 nvme_io_msg_ctrlr_update(ctrlr); 2475 } 2476 2477 if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) && 2478 (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_ANA_CHANGE)) { 2479 rc = nvme_ctrlr_update_ana_log_page(ctrlr); 2480 if (rc) { 2481 return; 2482 } 2483 nvme_ctrlr_parse_ana_log_page(ctrlr, nvme_ctrlr_update_ns_ana_states, ctrlr); 2484 } 2485 2486 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2487 if (active_proc && active_proc->aer_cb_fn) { 2488 active_proc->aer_cb_fn(active_proc->aer_cb_arg, cpl); 2489 } 2490 2491 /* If the ctrlr was removed or in the destruct state, we should not send aer again */ 2492 if (ctrlr->is_removed || ctrlr->is_destructed) { 2493 return; 2494 } 2495 2496 /* 2497 * Repost another asynchronous event request to replace the one 2498 * that just completed. 2499 */ 2500 if (nvme_ctrlr_construct_and_submit_aer(ctrlr, aer)) { 2501 /* 2502 * We can't do anything to recover from a failure here, 2503 * so just print a warning message and leave the AER unsubmitted. 2504 */ 2505 SPDK_ERRLOG("resubmitting AER failed!\n"); 2506 } 2507 } 2508 2509 static int 2510 nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 2511 struct nvme_async_event_request *aer) 2512 { 2513 struct nvme_request *req; 2514 2515 aer->ctrlr = ctrlr; 2516 req = nvme_allocate_request_null(ctrlr->adminq, nvme_ctrlr_async_event_cb, aer); 2517 aer->req = req; 2518 if (req == NULL) { 2519 return -1; 2520 } 2521 2522 req->cmd.opc = SPDK_NVME_OPC_ASYNC_EVENT_REQUEST; 2523 return nvme_ctrlr_submit_admin_request(ctrlr, req); 2524 } 2525 2526 static void 2527 nvme_ctrlr_configure_aer_done(void *arg, const struct spdk_nvme_cpl *cpl) 2528 { 2529 struct nvme_async_event_request *aer; 2530 int rc; 2531 uint32_t i; 2532 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2533 2534 if (spdk_nvme_cpl_is_error(cpl)) { 2535 SPDK_NOTICELOG("nvme_ctrlr_configure_aer failed!\n"); 2536 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2537 ctrlr->opts.admin_timeout_ms); 2538 return; 2539 } 2540 2541 /* aerl is a zero-based value, so we need to add 1 here. */ 2542 ctrlr->num_aers = spdk_min(NVME_MAX_ASYNC_EVENTS, (ctrlr->cdata.aerl + 1)); 2543 2544 for (i = 0; i < ctrlr->num_aers; i++) { 2545 aer = &ctrlr->aer[i]; 2546 rc = nvme_ctrlr_construct_and_submit_aer(ctrlr, aer); 2547 if (rc) { 2548 SPDK_ERRLOG("nvme_ctrlr_construct_and_submit_aer failed!\n"); 2549 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2550 return; 2551 } 2552 } 2553 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2554 ctrlr->opts.admin_timeout_ms); 2555 } 2556 2557 static int 2558 nvme_ctrlr_configure_aer(struct spdk_nvme_ctrlr *ctrlr) 2559 { 2560 union spdk_nvme_feat_async_event_configuration config; 2561 int rc; 2562 2563 config.raw = 0; 2564 config.bits.crit_warn.bits.available_spare = 1; 2565 config.bits.crit_warn.bits.temperature = 1; 2566 config.bits.crit_warn.bits.device_reliability = 1; 2567 config.bits.crit_warn.bits.read_only = 1; 2568 config.bits.crit_warn.bits.volatile_memory_backup = 1; 2569 2570 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 2, 0)) { 2571 if (ctrlr->cdata.oaes.ns_attribute_notices) { 2572 config.bits.ns_attr_notice = 1; 2573 } 2574 if (ctrlr->cdata.oaes.fw_activation_notices) { 2575 config.bits.fw_activation_notice = 1; 2576 } 2577 if (ctrlr->cdata.oaes.ana_change_notices) { 2578 config.bits.ana_change_notice = 1; 2579 } 2580 } 2581 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 3, 0) && ctrlr->cdata.lpa.telemetry) { 2582 config.bits.telemetry_log_notice = 1; 2583 } 2584 2585 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER, 2586 ctrlr->opts.admin_timeout_ms); 2587 2588 rc = nvme_ctrlr_cmd_set_async_event_config(ctrlr, config, 2589 nvme_ctrlr_configure_aer_done, 2590 ctrlr); 2591 if (rc != 0) { 2592 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2593 return rc; 2594 } 2595 2596 return 0; 2597 } 2598 2599 struct spdk_nvme_ctrlr_process * 2600 nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr, pid_t pid) 2601 { 2602 struct spdk_nvme_ctrlr_process *active_proc; 2603 2604 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2605 if (active_proc->pid == pid) { 2606 return active_proc; 2607 } 2608 } 2609 2610 return NULL; 2611 } 2612 2613 struct spdk_nvme_ctrlr_process * 2614 nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr) 2615 { 2616 return nvme_ctrlr_get_process(ctrlr, getpid()); 2617 } 2618 2619 /** 2620 * This function will be called when a process is using the controller. 2621 * 1. For the primary process, it is called when constructing the controller. 2622 * 2. For the secondary process, it is called at probing the controller. 2623 * Note: will check whether the process is already added for the same process. 2624 */ 2625 int 2626 nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle) 2627 { 2628 struct spdk_nvme_ctrlr_process *ctrlr_proc; 2629 pid_t pid = getpid(); 2630 2631 /* Check whether the process is already added or not */ 2632 if (nvme_ctrlr_get_process(ctrlr, pid)) { 2633 return 0; 2634 } 2635 2636 /* Initialize the per process properties for this ctrlr */ 2637 ctrlr_proc = spdk_zmalloc(sizeof(struct spdk_nvme_ctrlr_process), 2638 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2639 if (ctrlr_proc == NULL) { 2640 SPDK_ERRLOG("failed to allocate memory to track the process props\n"); 2641 2642 return -1; 2643 } 2644 2645 ctrlr_proc->is_primary = spdk_process_is_primary(); 2646 ctrlr_proc->pid = pid; 2647 STAILQ_INIT(&ctrlr_proc->active_reqs); 2648 ctrlr_proc->devhandle = devhandle; 2649 ctrlr_proc->ref = 0; 2650 TAILQ_INIT(&ctrlr_proc->allocated_io_qpairs); 2651 2652 TAILQ_INSERT_TAIL(&ctrlr->active_procs, ctrlr_proc, tailq); 2653 2654 return 0; 2655 } 2656 2657 /** 2658 * This function will be called when the process detaches the controller. 2659 * Note: the ctrlr_lock must be held when calling this function. 2660 */ 2661 static void 2662 nvme_ctrlr_remove_process(struct spdk_nvme_ctrlr *ctrlr, 2663 struct spdk_nvme_ctrlr_process *proc) 2664 { 2665 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2666 2667 assert(STAILQ_EMPTY(&proc->active_reqs)); 2668 2669 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2670 spdk_nvme_ctrlr_free_io_qpair(qpair); 2671 } 2672 2673 TAILQ_REMOVE(&ctrlr->active_procs, proc, tailq); 2674 2675 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 2676 spdk_pci_device_detach(proc->devhandle); 2677 } 2678 2679 spdk_free(proc); 2680 } 2681 2682 /** 2683 * This function will be called when the process exited unexpectedly 2684 * in order to free any incomplete nvme request, allocated IO qpairs 2685 * and allocated memory. 2686 * Note: the ctrlr_lock must be held when calling this function. 2687 */ 2688 static void 2689 nvme_ctrlr_cleanup_process(struct spdk_nvme_ctrlr_process *proc) 2690 { 2691 struct nvme_request *req, *tmp_req; 2692 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2693 2694 STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) { 2695 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq); 2696 2697 assert(req->pid == proc->pid); 2698 2699 nvme_free_request(req); 2700 } 2701 2702 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2703 TAILQ_REMOVE(&proc->allocated_io_qpairs, qpair, per_process_tailq); 2704 2705 /* 2706 * The process may have been killed while some qpairs were in their 2707 * completion context. Clear that flag here to allow these IO 2708 * qpairs to be deleted. 2709 */ 2710 qpair->in_completion_context = 0; 2711 2712 qpair->no_deletion_notification_needed = 1; 2713 2714 spdk_nvme_ctrlr_free_io_qpair(qpair); 2715 } 2716 2717 spdk_free(proc); 2718 } 2719 2720 /** 2721 * This function will be called when destructing the controller. 2722 * 1. There is no more admin request on this controller. 2723 * 2. Clean up any left resource allocation when its associated process is gone. 2724 */ 2725 void 2726 nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr) 2727 { 2728 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2729 2730 /* Free all the processes' properties and make sure no pending admin IOs */ 2731 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2732 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2733 2734 assert(STAILQ_EMPTY(&active_proc->active_reqs)); 2735 2736 spdk_free(active_proc); 2737 } 2738 } 2739 2740 /** 2741 * This function will be called when any other process attaches or 2742 * detaches the controller in order to cleanup those unexpectedly 2743 * terminated processes. 2744 * Note: the ctrlr_lock must be held when calling this function. 2745 */ 2746 static int 2747 nvme_ctrlr_remove_inactive_proc(struct spdk_nvme_ctrlr *ctrlr) 2748 { 2749 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2750 int active_proc_count = 0; 2751 2752 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2753 if ((kill(active_proc->pid, 0) == -1) && (errno == ESRCH)) { 2754 SPDK_ERRLOG("process %d terminated unexpected\n", active_proc->pid); 2755 2756 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2757 2758 nvme_ctrlr_cleanup_process(active_proc); 2759 } else { 2760 active_proc_count++; 2761 } 2762 } 2763 2764 return active_proc_count; 2765 } 2766 2767 void 2768 nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr) 2769 { 2770 struct spdk_nvme_ctrlr_process *active_proc; 2771 2772 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2773 2774 nvme_ctrlr_remove_inactive_proc(ctrlr); 2775 2776 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2777 if (active_proc) { 2778 active_proc->ref++; 2779 } 2780 2781 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2782 } 2783 2784 void 2785 nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr) 2786 { 2787 struct spdk_nvme_ctrlr_process *active_proc; 2788 int proc_count; 2789 2790 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2791 2792 proc_count = nvme_ctrlr_remove_inactive_proc(ctrlr); 2793 2794 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2795 if (active_proc) { 2796 active_proc->ref--; 2797 assert(active_proc->ref >= 0); 2798 2799 /* 2800 * The last active process will be removed at the end of 2801 * the destruction of the controller. 2802 */ 2803 if (active_proc->ref == 0 && proc_count != 1) { 2804 nvme_ctrlr_remove_process(ctrlr, active_proc); 2805 } 2806 } 2807 2808 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2809 } 2810 2811 int 2812 nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr) 2813 { 2814 struct spdk_nvme_ctrlr_process *active_proc; 2815 int ref = 0; 2816 2817 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2818 2819 nvme_ctrlr_remove_inactive_proc(ctrlr); 2820 2821 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2822 ref += active_proc->ref; 2823 } 2824 2825 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2826 2827 return ref; 2828 } 2829 2830 /** 2831 * Get the PCI device handle which is only visible to its associated process. 2832 */ 2833 struct spdk_pci_device * 2834 nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr) 2835 { 2836 struct spdk_nvme_ctrlr_process *active_proc; 2837 struct spdk_pci_device *devhandle = NULL; 2838 2839 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2840 2841 active_proc = nvme_ctrlr_get_current_process(ctrlr); 2842 if (active_proc) { 2843 devhandle = active_proc->devhandle; 2844 } 2845 2846 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2847 2848 return devhandle; 2849 } 2850 2851 /** 2852 * This function will be called repeatedly during initialization until the controller is ready. 2853 */ 2854 int 2855 nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr) 2856 { 2857 union spdk_nvme_cc_register cc; 2858 union spdk_nvme_csts_register csts; 2859 uint32_t ready_timeout_in_ms; 2860 int rc = 0; 2861 2862 /* 2863 * May need to avoid accessing any register on the target controller 2864 * for a while. Return early without touching the FSM. 2865 * Check sleep_timeout_tsc > 0 for unit test. 2866 */ 2867 if ((ctrlr->sleep_timeout_tsc > 0) && 2868 (spdk_get_ticks() <= ctrlr->sleep_timeout_tsc)) { 2869 return 0; 2870 } 2871 ctrlr->sleep_timeout_tsc = 0; 2872 2873 if (nvme_ctrlr_get_cc(ctrlr, &cc) || 2874 nvme_ctrlr_get_csts(ctrlr, &csts)) { 2875 if (!ctrlr->is_failed && ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) { 2876 /* While a device is resetting, it may be unable to service MMIO reads 2877 * temporarily. Allow for this case. 2878 */ 2879 SPDK_DEBUGLOG(nvme, "Get registers failed while waiting for CSTS.RDY == 0\n"); 2880 goto init_timeout; 2881 } 2882 SPDK_ERRLOG("Failed to read CC and CSTS in state %d\n", ctrlr->state); 2883 return -EIO; 2884 } 2885 2886 ready_timeout_in_ms = 500 * ctrlr->cap.bits.to; 2887 2888 /* 2889 * Check if the current initialization step is done or has timed out. 2890 */ 2891 switch (ctrlr->state) { 2892 case NVME_CTRLR_STATE_INIT_DELAY: 2893 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, ready_timeout_in_ms); 2894 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_INIT) { 2895 /* 2896 * Controller may need some delay before it's enabled. 2897 * 2898 * This is a workaround for an issue where the PCIe-attached NVMe controller 2899 * is not ready after VFIO reset. We delay the initialization rather than the 2900 * enabling itself, because this is required only for the very first enabling 2901 * - directly after a VFIO reset. 2902 */ 2903 SPDK_DEBUGLOG(nvme, "Adding 2 second delay before initializing the controller\n"); 2904 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2000 * spdk_get_ticks_hz() / 1000); 2905 } 2906 break; 2907 2908 case NVME_CTRLR_STATE_INIT: 2909 /* Begin the hardware initialization by making sure the controller is disabled. */ 2910 if (cc.bits.en) { 2911 SPDK_DEBUGLOG(nvme, "CC.EN = 1\n"); 2912 /* 2913 * Controller is currently enabled. We need to disable it to cause a reset. 2914 * 2915 * If CC.EN = 1 && CSTS.RDY = 0, the controller is in the process of becoming ready. 2916 * Wait for the ready bit to be 1 before disabling the controller. 2917 */ 2918 if (csts.bits.rdy == 0) { 2919 SPDK_DEBUGLOG(nvme, "CC.EN = 1 && CSTS.RDY = 0 - waiting for reset to complete\n"); 2920 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2921 return 0; 2922 } 2923 2924 /* CC.EN = 1 && CSTS.RDY == 1, so we can immediately disable the controller. */ 2925 SPDK_DEBUGLOG(nvme, "Setting CC.EN = 0\n"); 2926 cc.bits.en = 0; 2927 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2928 SPDK_ERRLOG("set_cc() failed\n"); 2929 return -EIO; 2930 } 2931 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2932 2933 /* 2934 * Wait 2.5 seconds before accessing PCI registers. 2935 * Not using sleep() to avoid blocking other controller's initialization. 2936 */ 2937 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) { 2938 SPDK_DEBUGLOG(nvme, "Applying quirk: delay 2.5 seconds before reading registers\n"); 2939 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2500 * spdk_get_ticks_hz() / 1000); 2940 } 2941 return 0; 2942 } else { 2943 if (csts.bits.rdy == 1) { 2944 SPDK_DEBUGLOG(nvme, "CC.EN = 0 && CSTS.RDY = 1 - waiting for shutdown to complete\n"); 2945 } 2946 2947 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2948 return 0; 2949 } 2950 break; 2951 2952 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 2953 if (csts.bits.rdy == 1) { 2954 SPDK_DEBUGLOG(nvme, "CC.EN = 1 && CSTS.RDY = 1 - disabling controller\n"); 2955 /* CC.EN = 1 && CSTS.RDY = 1, so we can set CC.EN = 0 now. */ 2956 SPDK_DEBUGLOG(nvme, "Setting CC.EN = 0\n"); 2957 cc.bits.en = 0; 2958 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2959 SPDK_ERRLOG("set_cc() failed\n"); 2960 return -EIO; 2961 } 2962 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2963 return 0; 2964 } 2965 break; 2966 2967 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 2968 if (csts.bits.rdy == 0) { 2969 SPDK_DEBUGLOG(nvme, "CC.EN = 0 && CSTS.RDY = 0\n"); 2970 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE, ready_timeout_in_ms); 2971 /* 2972 * Delay 100us before setting CC.EN = 1. Some NVMe SSDs miss CC.EN getting 2973 * set to 1 if it is too soon after CSTS.RDY is reported as 0. 2974 */ 2975 spdk_delay_us(100); 2976 return 0; 2977 } 2978 break; 2979 2980 case NVME_CTRLR_STATE_ENABLE: 2981 SPDK_DEBUGLOG(nvme, "Setting CC.EN = 1\n"); 2982 rc = nvme_ctrlr_enable(ctrlr); 2983 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2984 return rc; 2985 2986 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 2987 if (csts.bits.rdy == 1) { 2988 SPDK_DEBUGLOG(nvme, "CC.EN = 1 && CSTS.RDY = 1 - controller is ready\n"); 2989 /* 2990 * The controller has been enabled. 2991 * Perform the rest of initialization serially. 2992 */ 2993 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_RESET_ADMIN_QUEUE, 2994 ctrlr->opts.admin_timeout_ms); 2995 return 0; 2996 } 2997 break; 2998 2999 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 3000 nvme_transport_qpair_reset(ctrlr->adminq); 3001 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY, 3002 ctrlr->opts.admin_timeout_ms); 3003 break; 3004 3005 case NVME_CTRLR_STATE_IDENTIFY: 3006 rc = nvme_ctrlr_identify(ctrlr); 3007 break; 3008 3009 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 3010 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3011 break; 3012 3013 case NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC: 3014 rc = nvme_ctrlr_identify_iocs_specific(ctrlr); 3015 break; 3016 3017 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC: 3018 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3019 break; 3020 3021 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 3022 nvme_ctrlr_update_nvmf_ioccsz(ctrlr); 3023 rc = nvme_ctrlr_set_num_queues(ctrlr); 3024 break; 3025 3026 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 3027 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3028 break; 3029 3030 case NVME_CTRLR_STATE_CONSTRUCT_NS: 3031 rc = nvme_ctrlr_construct_namespaces(ctrlr); 3032 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS, 3033 ctrlr->opts.admin_timeout_ms); 3034 break; 3035 3036 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 3037 _nvme_ctrlr_identify_active_ns(ctrlr); 3038 break; 3039 3040 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 3041 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3042 break; 3043 3044 case NVME_CTRLR_STATE_IDENTIFY_NS: 3045 rc = nvme_ctrlr_identify_namespaces(ctrlr); 3046 break; 3047 3048 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 3049 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3050 break; 3051 3052 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 3053 rc = nvme_ctrlr_identify_id_desc_namespaces(ctrlr); 3054 break; 3055 3056 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 3057 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3058 break; 3059 3060 case NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC: 3061 rc = nvme_ctrlr_identify_namespaces_iocs_specific(ctrlr); 3062 break; 3063 3064 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC: 3065 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3066 break; 3067 3068 case NVME_CTRLR_STATE_CONFIGURE_AER: 3069 rc = nvme_ctrlr_configure_aer(ctrlr); 3070 break; 3071 3072 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 3073 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3074 break; 3075 3076 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 3077 rc = nvme_ctrlr_set_supported_log_pages(ctrlr); 3078 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES, 3079 ctrlr->opts.admin_timeout_ms); 3080 break; 3081 3082 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 3083 nvme_ctrlr_set_supported_features(ctrlr); 3084 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_DB_BUF_CFG, 3085 ctrlr->opts.admin_timeout_ms); 3086 break; 3087 3088 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 3089 rc = nvme_ctrlr_set_doorbell_buffer_config(ctrlr); 3090 break; 3091 3092 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 3093 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3094 break; 3095 3096 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 3097 rc = nvme_ctrlr_set_keep_alive_timeout(ctrlr); 3098 break; 3099 3100 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 3101 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3102 break; 3103 3104 case NVME_CTRLR_STATE_SET_HOST_ID: 3105 rc = nvme_ctrlr_set_host_id(ctrlr); 3106 break; 3107 3108 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 3109 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3110 break; 3111 3112 case NVME_CTRLR_STATE_READY: 3113 SPDK_DEBUGLOG(nvme, "Ctrlr already in ready state\n"); 3114 return 0; 3115 3116 case NVME_CTRLR_STATE_ERROR: 3117 SPDK_ERRLOG("Ctrlr %s is in error state\n", ctrlr->trid.traddr); 3118 return -1; 3119 3120 default: 3121 assert(0); 3122 return -1; 3123 } 3124 3125 init_timeout: 3126 if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE && 3127 spdk_get_ticks() > ctrlr->state_timeout_tsc) { 3128 SPDK_ERRLOG("Initialization timed out in state %d\n", ctrlr->state); 3129 return -1; 3130 } 3131 3132 return rc; 3133 } 3134 3135 int 3136 nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx) 3137 { 3138 pthread_mutexattr_t attr; 3139 int rc = 0; 3140 3141 if (pthread_mutexattr_init(&attr)) { 3142 return -1; 3143 } 3144 if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) || 3145 #ifndef __FreeBSD__ 3146 pthread_mutexattr_setrobust(&attr, PTHREAD_MUTEX_ROBUST) || 3147 pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) || 3148 #endif 3149 pthread_mutex_init(mtx, &attr)) { 3150 rc = -1; 3151 } 3152 pthread_mutexattr_destroy(&attr); 3153 return rc; 3154 } 3155 3156 int 3157 nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr) 3158 { 3159 int rc; 3160 3161 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 3162 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT_DELAY, NVME_TIMEOUT_INFINITE); 3163 } else { 3164 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 3165 } 3166 3167 if (ctrlr->opts.admin_queue_size > SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES) { 3168 SPDK_ERRLOG("admin_queue_size %u exceeds max defined by NVMe spec, use max value\n", 3169 ctrlr->opts.admin_queue_size); 3170 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES; 3171 } 3172 3173 if (ctrlr->opts.admin_queue_size < SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES) { 3174 SPDK_ERRLOG("admin_queue_size %u is less than minimum defined by NVMe spec, use min value\n", 3175 ctrlr->opts.admin_queue_size); 3176 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES; 3177 } 3178 3179 ctrlr->flags = 0; 3180 ctrlr->free_io_qids = NULL; 3181 ctrlr->is_resetting = false; 3182 ctrlr->is_failed = false; 3183 ctrlr->is_destructed = false; 3184 3185 TAILQ_INIT(&ctrlr->active_io_qpairs); 3186 STAILQ_INIT(&ctrlr->queued_aborts); 3187 ctrlr->outstanding_aborts = 0; 3188 3189 ctrlr->ana_log_page = NULL; 3190 ctrlr->ana_log_page_size = 0; 3191 3192 rc = nvme_robust_mutex_init_recursive_shared(&ctrlr->ctrlr_lock); 3193 if (rc != 0) { 3194 return rc; 3195 } 3196 3197 TAILQ_INIT(&ctrlr->active_procs); 3198 3199 return rc; 3200 } 3201 3202 /* This function should be called once at ctrlr initialization to set up constant properties. */ 3203 void 3204 nvme_ctrlr_init_cap(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cap_register *cap, 3205 const union spdk_nvme_vs_register *vs) 3206 { 3207 ctrlr->cap = *cap; 3208 ctrlr->vs = *vs; 3209 3210 if (ctrlr->cap.bits.ams & SPDK_NVME_CAP_AMS_WRR) { 3211 ctrlr->flags |= SPDK_NVME_CTRLR_WRR_SUPPORTED; 3212 } 3213 3214 ctrlr->min_page_size = 1u << (12 + ctrlr->cap.bits.mpsmin); 3215 3216 /* For now, always select page_size == min_page_size. */ 3217 ctrlr->page_size = ctrlr->min_page_size; 3218 3219 ctrlr->opts.io_queue_size = spdk_max(ctrlr->opts.io_queue_size, SPDK_NVME_IO_QUEUE_MIN_ENTRIES); 3220 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, MAX_IO_QUEUE_ENTRIES); 3221 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, ctrlr->cap.bits.mqes + 1u); 3222 3223 ctrlr->opts.io_queue_requests = spdk_max(ctrlr->opts.io_queue_requests, ctrlr->opts.io_queue_size); 3224 } 3225 3226 void 3227 nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr) 3228 { 3229 pthread_mutex_destroy(&ctrlr->ctrlr_lock); 3230 } 3231 3232 void 3233 nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr) 3234 { 3235 struct spdk_nvme_qpair *qpair, *tmp; 3236 3237 SPDK_DEBUGLOG(nvme, "Prepare to destruct SSD: %s\n", ctrlr->trid.traddr); 3238 3239 ctrlr->is_destructed = true; 3240 3241 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3242 3243 nvme_ctrlr_abort_queued_aborts(ctrlr); 3244 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 3245 3246 TAILQ_FOREACH_SAFE(qpair, &ctrlr->active_io_qpairs, tailq, tmp) { 3247 spdk_nvme_ctrlr_free_io_qpair(qpair); 3248 } 3249 3250 nvme_ctrlr_free_doorbell_buffer(ctrlr); 3251 nvme_ctrlr_free_iocs_specific_data(ctrlr); 3252 3253 if (ctrlr->opts.no_shn_notification) { 3254 SPDK_INFOLOG(nvme, "Disable SSD: %s without shutdown notification\n", 3255 ctrlr->trid.traddr); 3256 nvme_ctrlr_disable(ctrlr); 3257 } else { 3258 nvme_ctrlr_shutdown(ctrlr); 3259 } 3260 3261 nvme_ctrlr_destruct_namespaces(ctrlr); 3262 3263 spdk_bit_array_free(&ctrlr->free_io_qids); 3264 3265 spdk_free(ctrlr->ana_log_page); 3266 ctrlr->ana_log_page = NULL; 3267 ctrlr->ana_log_page_size = 0; 3268 3269 nvme_transport_ctrlr_destruct(ctrlr); 3270 } 3271 3272 int 3273 nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr, 3274 struct nvme_request *req) 3275 { 3276 return nvme_qpair_submit_request(ctrlr->adminq, req); 3277 } 3278 3279 static void 3280 nvme_keep_alive_completion(void *cb_ctx, const struct spdk_nvme_cpl *cpl) 3281 { 3282 /* Do nothing */ 3283 } 3284 3285 /* 3286 * Check if we need to send a Keep Alive command. 3287 * Caller must hold ctrlr->ctrlr_lock. 3288 */ 3289 static int 3290 nvme_ctrlr_keep_alive(struct spdk_nvme_ctrlr *ctrlr) 3291 { 3292 uint64_t now; 3293 struct nvme_request *req; 3294 struct spdk_nvme_cmd *cmd; 3295 int rc = 0; 3296 3297 now = spdk_get_ticks(); 3298 if (now < ctrlr->next_keep_alive_tick) { 3299 return rc; 3300 } 3301 3302 req = nvme_allocate_request_null(ctrlr->adminq, nvme_keep_alive_completion, NULL); 3303 if (req == NULL) { 3304 return rc; 3305 } 3306 3307 cmd = &req->cmd; 3308 cmd->opc = SPDK_NVME_OPC_KEEP_ALIVE; 3309 3310 rc = nvme_ctrlr_submit_admin_request(ctrlr, req); 3311 if (rc != 0) { 3312 SPDK_ERRLOG("Submitting Keep Alive failed\n"); 3313 rc = -ENXIO; 3314 } 3315 3316 ctrlr->next_keep_alive_tick = now + ctrlr->keep_alive_interval_ticks; 3317 return rc; 3318 } 3319 3320 int32_t 3321 spdk_nvme_ctrlr_process_admin_completions(struct spdk_nvme_ctrlr *ctrlr) 3322 { 3323 int32_t num_completions; 3324 int32_t rc; 3325 3326 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3327 3328 if (ctrlr->keep_alive_interval_ticks) { 3329 rc = nvme_ctrlr_keep_alive(ctrlr); 3330 if (rc) { 3331 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3332 return rc; 3333 } 3334 } 3335 3336 rc = nvme_io_msg_process(ctrlr); 3337 if (rc < 0) { 3338 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3339 return rc; 3340 } 3341 num_completions = rc; 3342 3343 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 3344 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3345 3346 if (rc < 0) { 3347 num_completions = rc; 3348 } else { 3349 num_completions += rc; 3350 } 3351 3352 return num_completions; 3353 } 3354 3355 const struct spdk_nvme_ctrlr_data * 3356 spdk_nvme_ctrlr_get_data(struct spdk_nvme_ctrlr *ctrlr) 3357 { 3358 return &ctrlr->cdata; 3359 } 3360 3361 union spdk_nvme_csts_register spdk_nvme_ctrlr_get_regs_csts(struct spdk_nvme_ctrlr *ctrlr) 3362 { 3363 union spdk_nvme_csts_register csts; 3364 3365 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 3366 csts.raw = 0xFFFFFFFFu; 3367 } 3368 return csts; 3369 } 3370 3371 union spdk_nvme_cap_register spdk_nvme_ctrlr_get_regs_cap(struct spdk_nvme_ctrlr *ctrlr) 3372 { 3373 return ctrlr->cap; 3374 } 3375 3376 union spdk_nvme_vs_register spdk_nvme_ctrlr_get_regs_vs(struct spdk_nvme_ctrlr *ctrlr) 3377 { 3378 return ctrlr->vs; 3379 } 3380 3381 union spdk_nvme_cmbsz_register spdk_nvme_ctrlr_get_regs_cmbsz(struct spdk_nvme_ctrlr *ctrlr) 3382 { 3383 union spdk_nvme_cmbsz_register cmbsz; 3384 3385 if (nvme_ctrlr_get_cmbsz(ctrlr, &cmbsz)) { 3386 cmbsz.raw = 0; 3387 } 3388 3389 return cmbsz; 3390 } 3391 3392 uint32_t 3393 spdk_nvme_ctrlr_get_num_ns(struct spdk_nvme_ctrlr *ctrlr) 3394 { 3395 return ctrlr->num_ns; 3396 } 3397 3398 static int32_t 3399 nvme_ctrlr_active_ns_idx(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3400 { 3401 int32_t result = -1; 3402 3403 if (ctrlr->active_ns_list == NULL || nsid == 0 || nsid > ctrlr->num_ns) { 3404 return result; 3405 } 3406 3407 int32_t lower = 0; 3408 int32_t upper = ctrlr->num_ns - 1; 3409 int32_t mid; 3410 3411 while (lower <= upper) { 3412 mid = lower + (upper - lower) / 2; 3413 if (ctrlr->active_ns_list[mid] == nsid) { 3414 result = mid; 3415 break; 3416 } else { 3417 if (ctrlr->active_ns_list[mid] != 0 && ctrlr->active_ns_list[mid] < nsid) { 3418 lower = mid + 1; 3419 } else { 3420 upper = mid - 1; 3421 } 3422 3423 } 3424 } 3425 3426 return result; 3427 } 3428 3429 bool 3430 spdk_nvme_ctrlr_is_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3431 { 3432 return nvme_ctrlr_active_ns_idx(ctrlr, nsid) != -1; 3433 } 3434 3435 uint32_t 3436 spdk_nvme_ctrlr_get_first_active_ns(struct spdk_nvme_ctrlr *ctrlr) 3437 { 3438 return ctrlr->active_ns_list ? ctrlr->active_ns_list[0] : 0; 3439 } 3440 3441 uint32_t 3442 spdk_nvme_ctrlr_get_next_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid) 3443 { 3444 int32_t nsid_idx = nvme_ctrlr_active_ns_idx(ctrlr, prev_nsid); 3445 if (ctrlr->active_ns_list && nsid_idx >= 0 && (uint32_t)nsid_idx < ctrlr->num_ns - 1) { 3446 return ctrlr->active_ns_list[nsid_idx + 1]; 3447 } 3448 return 0; 3449 } 3450 3451 struct spdk_nvme_ns * 3452 spdk_nvme_ctrlr_get_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3453 { 3454 if (nsid < 1 || nsid > ctrlr->num_ns) { 3455 return NULL; 3456 } 3457 3458 return &ctrlr->ns[nsid - 1]; 3459 } 3460 3461 struct spdk_pci_device * 3462 spdk_nvme_ctrlr_get_pci_device(struct spdk_nvme_ctrlr *ctrlr) 3463 { 3464 if (ctrlr == NULL) { 3465 return NULL; 3466 } 3467 3468 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 3469 return NULL; 3470 } 3471 3472 return nvme_ctrlr_proc_get_devhandle(ctrlr); 3473 } 3474 3475 uint32_t 3476 spdk_nvme_ctrlr_get_max_xfer_size(const struct spdk_nvme_ctrlr *ctrlr) 3477 { 3478 return ctrlr->max_xfer_size; 3479 } 3480 3481 void 3482 spdk_nvme_ctrlr_register_aer_callback(struct spdk_nvme_ctrlr *ctrlr, 3483 spdk_nvme_aer_cb aer_cb_fn, 3484 void *aer_cb_arg) 3485 { 3486 struct spdk_nvme_ctrlr_process *active_proc; 3487 3488 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3489 3490 active_proc = nvme_ctrlr_get_current_process(ctrlr); 3491 if (active_proc) { 3492 active_proc->aer_cb_fn = aer_cb_fn; 3493 active_proc->aer_cb_arg = aer_cb_arg; 3494 } 3495 3496 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3497 } 3498 3499 void 3500 spdk_nvme_ctrlr_register_timeout_callback(struct spdk_nvme_ctrlr *ctrlr, 3501 uint64_t timeout_us, spdk_nvme_timeout_cb cb_fn, void *cb_arg) 3502 { 3503 struct spdk_nvme_ctrlr_process *active_proc; 3504 3505 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3506 3507 active_proc = nvme_ctrlr_get_current_process(ctrlr); 3508 if (active_proc) { 3509 active_proc->timeout_ticks = timeout_us * spdk_get_ticks_hz() / 1000000ULL; 3510 active_proc->timeout_cb_fn = cb_fn; 3511 active_proc->timeout_cb_arg = cb_arg; 3512 } 3513 3514 ctrlr->timeout_enabled = true; 3515 3516 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3517 } 3518 3519 bool 3520 spdk_nvme_ctrlr_is_log_page_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t log_page) 3521 { 3522 /* No bounds check necessary, since log_page is uint8_t and log_page_supported has 256 entries */ 3523 SPDK_STATIC_ASSERT(sizeof(ctrlr->log_page_supported) == 256, "log_page_supported size mismatch"); 3524 return ctrlr->log_page_supported[log_page]; 3525 } 3526 3527 bool 3528 spdk_nvme_ctrlr_is_feature_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t feature_code) 3529 { 3530 /* No bounds check necessary, since feature_code is uint8_t and feature_supported has 256 entries */ 3531 SPDK_STATIC_ASSERT(sizeof(ctrlr->feature_supported) == 256, "feature_supported size mismatch"); 3532 return ctrlr->feature_supported[feature_code]; 3533 } 3534 3535 int 3536 spdk_nvme_ctrlr_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3537 struct spdk_nvme_ctrlr_list *payload) 3538 { 3539 struct nvme_completion_poll_status *status; 3540 int res; 3541 struct spdk_nvme_ns *ns; 3542 3543 status = calloc(1, sizeof(*status)); 3544 if (!status) { 3545 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3546 return -ENOMEM; 3547 } 3548 3549 res = nvme_ctrlr_cmd_attach_ns(ctrlr, nsid, payload, 3550 nvme_completion_poll_cb, status); 3551 if (res) { 3552 free(status); 3553 return res; 3554 } 3555 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3556 SPDK_ERRLOG("spdk_nvme_ctrlr_attach_ns failed!\n"); 3557 if (!status->timed_out) { 3558 free(status); 3559 } 3560 return -ENXIO; 3561 } 3562 free(status); 3563 3564 res = nvme_ctrlr_identify_active_ns(ctrlr); 3565 if (res) { 3566 return res; 3567 } 3568 3569 ns = &ctrlr->ns[nsid - 1]; 3570 return nvme_ns_construct(ns, nsid, ctrlr); 3571 } 3572 3573 int 3574 spdk_nvme_ctrlr_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3575 struct spdk_nvme_ctrlr_list *payload) 3576 { 3577 struct nvme_completion_poll_status *status; 3578 int res; 3579 struct spdk_nvme_ns *ns; 3580 3581 status = calloc(1, sizeof(*status)); 3582 if (!status) { 3583 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3584 return -ENOMEM; 3585 } 3586 3587 res = nvme_ctrlr_cmd_detach_ns(ctrlr, nsid, payload, 3588 nvme_completion_poll_cb, status); 3589 if (res) { 3590 free(status); 3591 return res; 3592 } 3593 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3594 SPDK_ERRLOG("spdk_nvme_ctrlr_detach_ns failed!\n"); 3595 if (!status->timed_out) { 3596 free(status); 3597 } 3598 return -ENXIO; 3599 } 3600 free(status); 3601 3602 res = nvme_ctrlr_identify_active_ns(ctrlr); 3603 if (res) { 3604 return res; 3605 } 3606 3607 ns = &ctrlr->ns[nsid - 1]; 3608 /* Inactive NS */ 3609 nvme_ns_destruct(ns); 3610 3611 return 0; 3612 } 3613 3614 uint32_t 3615 spdk_nvme_ctrlr_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload) 3616 { 3617 struct nvme_completion_poll_status *status; 3618 int res; 3619 uint32_t nsid; 3620 struct spdk_nvme_ns *ns; 3621 3622 status = calloc(1, sizeof(*status)); 3623 if (!status) { 3624 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3625 return 0; 3626 } 3627 3628 res = nvme_ctrlr_cmd_create_ns(ctrlr, payload, nvme_completion_poll_cb, status); 3629 if (res) { 3630 free(status); 3631 return 0; 3632 } 3633 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3634 SPDK_ERRLOG("spdk_nvme_ctrlr_create_ns failed!\n"); 3635 if (!status->timed_out) { 3636 free(status); 3637 } 3638 return 0; 3639 } 3640 3641 nsid = status->cpl.cdw0; 3642 ns = &ctrlr->ns[nsid - 1]; 3643 free(status); 3644 /* Inactive NS */ 3645 res = nvme_ns_construct(ns, nsid, ctrlr); 3646 if (res) { 3647 return 0; 3648 } 3649 3650 /* Return the namespace ID that was created */ 3651 return nsid; 3652 } 3653 3654 int 3655 spdk_nvme_ctrlr_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3656 { 3657 struct nvme_completion_poll_status *status; 3658 int res; 3659 struct spdk_nvme_ns *ns; 3660 3661 status = calloc(1, sizeof(*status)); 3662 if (!status) { 3663 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3664 return -ENOMEM; 3665 } 3666 3667 res = nvme_ctrlr_cmd_delete_ns(ctrlr, nsid, nvme_completion_poll_cb, status); 3668 if (res) { 3669 free(status); 3670 return res; 3671 } 3672 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3673 SPDK_ERRLOG("spdk_nvme_ctrlr_delete_ns failed!\n"); 3674 if (!status->timed_out) { 3675 free(status); 3676 } 3677 return -ENXIO; 3678 } 3679 free(status); 3680 3681 res = nvme_ctrlr_identify_active_ns(ctrlr); 3682 if (res) { 3683 return res; 3684 } 3685 3686 ns = &ctrlr->ns[nsid - 1]; 3687 nvme_ns_destruct(ns); 3688 3689 return 0; 3690 } 3691 3692 int 3693 spdk_nvme_ctrlr_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3694 struct spdk_nvme_format *format) 3695 { 3696 struct nvme_completion_poll_status *status; 3697 int res; 3698 3699 status = calloc(1, sizeof(*status)); 3700 if (!status) { 3701 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3702 return -ENOMEM; 3703 } 3704 3705 res = nvme_ctrlr_cmd_format(ctrlr, nsid, format, nvme_completion_poll_cb, 3706 status); 3707 if (res) { 3708 free(status); 3709 return res; 3710 } 3711 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3712 SPDK_ERRLOG("spdk_nvme_ctrlr_format failed!\n"); 3713 if (!status->timed_out) { 3714 free(status); 3715 } 3716 return -ENXIO; 3717 } 3718 free(status); 3719 3720 return spdk_nvme_ctrlr_reset(ctrlr); 3721 } 3722 3723 int 3724 spdk_nvme_ctrlr_update_firmware(struct spdk_nvme_ctrlr *ctrlr, void *payload, uint32_t size, 3725 int slot, enum spdk_nvme_fw_commit_action commit_action, struct spdk_nvme_status *completion_status) 3726 { 3727 struct spdk_nvme_fw_commit fw_commit; 3728 struct nvme_completion_poll_status *status; 3729 int res; 3730 unsigned int size_remaining; 3731 unsigned int offset; 3732 unsigned int transfer; 3733 void *p; 3734 3735 if (!completion_status) { 3736 return -EINVAL; 3737 } 3738 memset(completion_status, 0, sizeof(struct spdk_nvme_status)); 3739 if (size % 4) { 3740 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid size!\n"); 3741 return -1; 3742 } 3743 3744 /* Current support only for SPDK_NVME_FW_COMMIT_REPLACE_IMG 3745 * and SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG 3746 */ 3747 if ((commit_action != SPDK_NVME_FW_COMMIT_REPLACE_IMG) && 3748 (commit_action != SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG)) { 3749 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid command!\n"); 3750 return -1; 3751 } 3752 3753 status = calloc(1, sizeof(*status)); 3754 if (!status) { 3755 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3756 return -ENOMEM; 3757 } 3758 3759 /* Firmware download */ 3760 size_remaining = size; 3761 offset = 0; 3762 p = payload; 3763 3764 while (size_remaining > 0) { 3765 transfer = spdk_min(size_remaining, ctrlr->min_page_size); 3766 3767 memset(status, 0, sizeof(*status)); 3768 res = nvme_ctrlr_cmd_fw_image_download(ctrlr, transfer, offset, p, 3769 nvme_completion_poll_cb, 3770 status); 3771 if (res) { 3772 free(status); 3773 return res; 3774 } 3775 3776 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3777 SPDK_ERRLOG("spdk_nvme_ctrlr_fw_image_download failed!\n"); 3778 if (!status->timed_out) { 3779 free(status); 3780 } 3781 return -ENXIO; 3782 } 3783 p += transfer; 3784 offset += transfer; 3785 size_remaining -= transfer; 3786 } 3787 3788 /* Firmware commit */ 3789 memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit)); 3790 fw_commit.fs = slot; 3791 fw_commit.ca = commit_action; 3792 3793 memset(status, 0, sizeof(*status)); 3794 res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit, nvme_completion_poll_cb, 3795 status); 3796 if (res) { 3797 free(status); 3798 return res; 3799 } 3800 3801 res = nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock); 3802 3803 memcpy(completion_status, &status->cpl.status, sizeof(struct spdk_nvme_status)); 3804 3805 if (!status->timed_out) { 3806 free(status); 3807 } 3808 3809 if (res) { 3810 if (completion_status->sct != SPDK_NVME_SCT_COMMAND_SPECIFIC || 3811 completion_status->sc != SPDK_NVME_SC_FIRMWARE_REQ_NVM_RESET) { 3812 if (completion_status->sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 3813 completion_status->sc == SPDK_NVME_SC_FIRMWARE_REQ_CONVENTIONAL_RESET) { 3814 SPDK_NOTICELOG("firmware activation requires conventional reset to be performed. !\n"); 3815 } else { 3816 SPDK_ERRLOG("nvme_ctrlr_cmd_fw_commit failed!\n"); 3817 } 3818 return -ENXIO; 3819 } 3820 } 3821 3822 return spdk_nvme_ctrlr_reset(ctrlr); 3823 } 3824 3825 int 3826 spdk_nvme_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr) 3827 { 3828 int rc, size; 3829 union spdk_nvme_cmbsz_register cmbsz; 3830 3831 cmbsz = spdk_nvme_ctrlr_get_regs_cmbsz(ctrlr); 3832 3833 if (cmbsz.bits.rds == 0 || cmbsz.bits.wds == 0) { 3834 return -ENOTSUP; 3835 } 3836 3837 size = cmbsz.bits.sz * (0x1000 << (cmbsz.bits.szu * 4)); 3838 3839 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3840 rc = nvme_transport_ctrlr_reserve_cmb(ctrlr); 3841 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3842 3843 if (rc < 0) { 3844 return rc; 3845 } 3846 3847 return size; 3848 } 3849 3850 void * 3851 spdk_nvme_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size) 3852 { 3853 void *buf; 3854 3855 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3856 buf = nvme_transport_ctrlr_map_cmb(ctrlr, size); 3857 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3858 3859 return buf; 3860 } 3861 3862 void 3863 spdk_nvme_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr) 3864 { 3865 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3866 nvme_transport_ctrlr_unmap_cmb(ctrlr); 3867 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3868 } 3869 3870 bool 3871 spdk_nvme_ctrlr_is_discovery(struct spdk_nvme_ctrlr *ctrlr) 3872 { 3873 assert(ctrlr); 3874 3875 return !strncmp(ctrlr->trid.subnqn, SPDK_NVMF_DISCOVERY_NQN, 3876 strlen(SPDK_NVMF_DISCOVERY_NQN)); 3877 } 3878 3879 int 3880 spdk_nvme_ctrlr_security_receive(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3881 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3882 { 3883 struct nvme_completion_poll_status *status; 3884 int res; 3885 3886 status = calloc(1, sizeof(*status)); 3887 if (!status) { 3888 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3889 return -ENOMEM; 3890 } 3891 3892 res = spdk_nvme_ctrlr_cmd_security_receive(ctrlr, secp, spsp, nssf, payload, size, 3893 nvme_completion_poll_cb, status); 3894 if (res) { 3895 free(status); 3896 return res; 3897 } 3898 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3899 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_receive failed!\n"); 3900 if (!status->timed_out) { 3901 free(status); 3902 } 3903 return -ENXIO; 3904 } 3905 free(status); 3906 3907 return 0; 3908 } 3909 3910 int 3911 spdk_nvme_ctrlr_security_send(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3912 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3913 { 3914 struct nvme_completion_poll_status *status; 3915 int res; 3916 3917 status = calloc(1, sizeof(*status)); 3918 if (!status) { 3919 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3920 return -ENOMEM; 3921 } 3922 3923 res = spdk_nvme_ctrlr_cmd_security_send(ctrlr, secp, spsp, nssf, payload, size, 3924 nvme_completion_poll_cb, 3925 status); 3926 if (res) { 3927 free(status); 3928 return res; 3929 } 3930 if (nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3931 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_send failed!\n"); 3932 if (!status->timed_out) { 3933 free(status); 3934 } 3935 return -ENXIO; 3936 } 3937 3938 free(status); 3939 3940 return 0; 3941 } 3942 3943 uint64_t 3944 spdk_nvme_ctrlr_get_flags(struct spdk_nvme_ctrlr *ctrlr) 3945 { 3946 return ctrlr->flags; 3947 } 3948 3949 const struct spdk_nvme_transport_id * 3950 spdk_nvme_ctrlr_get_transport_id(struct spdk_nvme_ctrlr *ctrlr) 3951 { 3952 return &ctrlr->trid; 3953 } 3954 3955 int32_t 3956 spdk_nvme_ctrlr_alloc_qid(struct spdk_nvme_ctrlr *ctrlr) 3957 { 3958 uint32_t qid; 3959 3960 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3961 qid = spdk_bit_array_find_first_set(ctrlr->free_io_qids, 1); 3962 if (qid > ctrlr->opts.num_io_queues) { 3963 SPDK_ERRLOG("No free I/O queue IDs\n"); 3964 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3965 return -1; 3966 } 3967 3968 spdk_bit_array_clear(ctrlr->free_io_qids, qid); 3969 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3970 return qid; 3971 } 3972 3973 void 3974 spdk_nvme_ctrlr_free_qid(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid) 3975 { 3976 assert(qid <= ctrlr->opts.num_io_queues); 3977 3978 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3979 spdk_bit_array_set(ctrlr->free_io_qids, qid); 3980 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3981 } 3982 3983 /* FIXME need to specify max number of iovs */ 3984 int 3985 spdk_nvme_map_prps(void *prv, struct spdk_nvme_cmd *cmd, struct iovec *iovs, 3986 uint32_t len, size_t mps, 3987 void *(*gpa_to_vva)(void *prv, uint64_t addr, uint64_t len)) 3988 { 3989 uint64_t prp1, prp2; 3990 void *vva; 3991 uint32_t i; 3992 uint32_t residue_len, nents; 3993 uint64_t *prp_list; 3994 int iovcnt; 3995 3996 prp1 = cmd->dptr.prp.prp1; 3997 prp2 = cmd->dptr.prp.prp2; 3998 3999 /* PRP1 may started with unaligned page address */ 4000 residue_len = mps - (prp1 % mps); 4001 residue_len = spdk_min(len, residue_len); 4002 4003 vva = gpa_to_vva(prv, prp1, residue_len); 4004 if (spdk_unlikely(vva == NULL)) { 4005 SPDK_ERRLOG("GPA to VVA failed\n"); 4006 return -1; 4007 } 4008 iovs[0].iov_base = vva; 4009 iovs[0].iov_len = residue_len; 4010 len -= residue_len; 4011 4012 if (len) { 4013 if (spdk_unlikely(prp2 == 0)) { 4014 SPDK_ERRLOG("no PRP2, %d remaining\n", len); 4015 return -1; 4016 } 4017 4018 if (len <= mps) { 4019 /* 2 PRP used */ 4020 iovcnt = 2; 4021 vva = gpa_to_vva(prv, prp2, len); 4022 if (spdk_unlikely(vva == NULL)) { 4023 SPDK_ERRLOG("no VVA for %#lx, len%#x\n", 4024 prp2, len); 4025 return -1; 4026 } 4027 iovs[1].iov_base = vva; 4028 iovs[1].iov_len = len; 4029 } else { 4030 /* PRP list used */ 4031 nents = (len + mps - 1) / mps; 4032 vva = gpa_to_vva(prv, prp2, nents * sizeof(*prp_list)); 4033 if (spdk_unlikely(vva == NULL)) { 4034 SPDK_ERRLOG("no VVA for %#lx, nents=%#x\n", 4035 prp2, nents); 4036 return -1; 4037 } 4038 prp_list = vva; 4039 i = 0; 4040 while (len != 0) { 4041 residue_len = spdk_min(len, mps); 4042 vva = gpa_to_vva(prv, prp_list[i], residue_len); 4043 if (spdk_unlikely(vva == NULL)) { 4044 SPDK_ERRLOG("no VVA for %#lx, residue_len=%#x\n", 4045 prp_list[i], residue_len); 4046 return -1; 4047 } 4048 iovs[i + 1].iov_base = vva; 4049 iovs[i + 1].iov_len = residue_len; 4050 len -= residue_len; 4051 i++; 4052 } 4053 iovcnt = i + 1; 4054 } 4055 } else { 4056 /* 1 PRP used */ 4057 iovcnt = 1; 4058 } 4059 4060 return iovcnt; 4061 } 4062