1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) Intel Corporation. All rights reserved. 5 * Copyright (c) 2019, 2020 Mellanox Technologies LTD. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include "spdk/stdinc.h" 35 36 #include "nvme_internal.h" 37 #include "nvme_io_msg.h" 38 39 #include "spdk/env.h" 40 #include "spdk/string.h" 41 42 struct nvme_active_ns_ctx; 43 44 static void nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr); 45 static int nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 46 struct nvme_async_event_request *aer); 47 static void nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx); 48 static int nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns); 49 static int nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns); 50 51 static int 52 nvme_ctrlr_get_cc(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cc_register *cc) 53 { 54 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 55 &cc->raw); 56 } 57 58 static int 59 nvme_ctrlr_get_csts(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_csts_register *csts) 60 { 61 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, csts.raw), 62 &csts->raw); 63 } 64 65 int 66 nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap) 67 { 68 return nvme_transport_ctrlr_get_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, cap.raw), 69 &cap->raw); 70 } 71 72 int 73 nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs) 74 { 75 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, vs.raw), 76 &vs->raw); 77 } 78 79 static int 80 nvme_ctrlr_set_cc(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cc_register *cc) 81 { 82 return nvme_transport_ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cc.raw), 83 cc->raw); 84 } 85 86 int 87 nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz) 88 { 89 return nvme_transport_ctrlr_get_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, cmbsz.raw), 90 &cmbsz->raw); 91 } 92 93 void 94 spdk_nvme_ctrlr_get_default_ctrlr_opts(struct spdk_nvme_ctrlr_opts *opts, size_t opts_size) 95 { 96 char host_id_str[SPDK_UUID_STRING_LEN]; 97 98 assert(opts); 99 100 memset(opts, 0, opts_size); 101 102 #define FIELD_OK(field) \ 103 offsetof(struct spdk_nvme_ctrlr_opts, field) + sizeof(opts->field) <= opts_size 104 105 if (FIELD_OK(num_io_queues)) { 106 opts->num_io_queues = DEFAULT_MAX_IO_QUEUES; 107 } 108 109 if (FIELD_OK(use_cmb_sqs)) { 110 opts->use_cmb_sqs = true; 111 } 112 113 if (FIELD_OK(no_shn_notification)) { 114 opts->no_shn_notification = false; 115 } 116 117 if (FIELD_OK(arb_mechanism)) { 118 opts->arb_mechanism = SPDK_NVME_CC_AMS_RR; 119 } 120 121 if (FIELD_OK(keep_alive_timeout_ms)) { 122 opts->keep_alive_timeout_ms = MIN_KEEP_ALIVE_TIMEOUT_IN_MS; 123 } 124 125 if (FIELD_OK(transport_retry_count)) { 126 opts->transport_retry_count = SPDK_NVME_DEFAULT_RETRY_COUNT; 127 } 128 129 if (FIELD_OK(io_queue_size)) { 130 opts->io_queue_size = DEFAULT_IO_QUEUE_SIZE; 131 } 132 133 if (FIELD_OK(io_queue_requests)) { 134 opts->io_queue_requests = DEFAULT_IO_QUEUE_REQUESTS; 135 } 136 137 if (FIELD_OK(host_id)) { 138 memset(opts->host_id, 0, sizeof(opts->host_id)); 139 } 140 141 if (nvme_driver_init() == 0) { 142 if (FIELD_OK(extended_host_id)) { 143 memcpy(opts->extended_host_id, &g_spdk_nvme_driver->default_extended_host_id, 144 sizeof(opts->extended_host_id)); 145 } 146 147 if (FIELD_OK(hostnqn)) { 148 spdk_uuid_fmt_lower(host_id_str, sizeof(host_id_str), 149 &g_spdk_nvme_driver->default_extended_host_id); 150 snprintf(opts->hostnqn, sizeof(opts->hostnqn), "2014-08.org.nvmexpress:uuid:%s", host_id_str); 151 } 152 } 153 154 if (FIELD_OK(src_addr)) { 155 memset(opts->src_addr, 0, sizeof(opts->src_addr)); 156 } 157 158 if (FIELD_OK(src_svcid)) { 159 memset(opts->src_svcid, 0, sizeof(opts->src_svcid)); 160 } 161 162 if (FIELD_OK(command_set)) { 163 opts->command_set = SPDK_NVME_CC_CSS_NVM; 164 } 165 166 if (FIELD_OK(admin_timeout_ms)) { 167 opts->admin_timeout_ms = NVME_MAX_ADMIN_TIMEOUT_IN_SECS * 1000; 168 } 169 170 if (FIELD_OK(header_digest)) { 171 opts->header_digest = false; 172 } 173 174 if (FIELD_OK(data_digest)) { 175 opts->data_digest = false; 176 } 177 178 if (FIELD_OK(disable_error_logging)) { 179 opts->disable_error_logging = false; 180 } 181 182 if (FIELD_OK(transport_ack_timeout)) { 183 opts->transport_ack_timeout = SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT; 184 } 185 186 if (FIELD_OK(admin_queue_size)) { 187 opts->admin_queue_size = DEFAULT_ADMIN_QUEUE_SIZE; 188 } 189 #undef FIELD_OK 190 } 191 192 /** 193 * This function will be called when the process allocates the IO qpair. 194 * Note: the ctrlr_lock must be held when calling this function. 195 */ 196 static void 197 nvme_ctrlr_proc_add_io_qpair(struct spdk_nvme_qpair *qpair) 198 { 199 struct spdk_nvme_ctrlr_process *active_proc; 200 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 201 202 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 203 if (active_proc) { 204 TAILQ_INSERT_TAIL(&active_proc->allocated_io_qpairs, qpair, per_process_tailq); 205 qpair->active_proc = active_proc; 206 } 207 } 208 209 /** 210 * This function will be called when the process frees the IO qpair. 211 * Note: the ctrlr_lock must be held when calling this function. 212 */ 213 static void 214 nvme_ctrlr_proc_remove_io_qpair(struct spdk_nvme_qpair *qpair) 215 { 216 struct spdk_nvme_ctrlr_process *active_proc; 217 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 218 struct spdk_nvme_qpair *active_qpair, *tmp_qpair; 219 220 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 221 if (!active_proc) { 222 return; 223 } 224 225 TAILQ_FOREACH_SAFE(active_qpair, &active_proc->allocated_io_qpairs, 226 per_process_tailq, tmp_qpair) { 227 if (active_qpair == qpair) { 228 TAILQ_REMOVE(&active_proc->allocated_io_qpairs, 229 active_qpair, per_process_tailq); 230 231 break; 232 } 233 } 234 } 235 236 void 237 spdk_nvme_ctrlr_get_default_io_qpair_opts(struct spdk_nvme_ctrlr *ctrlr, 238 struct spdk_nvme_io_qpair_opts *opts, 239 size_t opts_size) 240 { 241 assert(ctrlr); 242 243 assert(opts); 244 245 memset(opts, 0, opts_size); 246 247 #define FIELD_OK(field) \ 248 offsetof(struct spdk_nvme_io_qpair_opts, field) + sizeof(opts->field) <= opts_size 249 250 if (FIELD_OK(qprio)) { 251 opts->qprio = SPDK_NVME_QPRIO_URGENT; 252 } 253 254 if (FIELD_OK(io_queue_size)) { 255 opts->io_queue_size = ctrlr->opts.io_queue_size; 256 } 257 258 if (FIELD_OK(io_queue_requests)) { 259 opts->io_queue_requests = ctrlr->opts.io_queue_requests; 260 } 261 262 if (FIELD_OK(delay_cmd_submit)) { 263 opts->delay_cmd_submit = false; 264 } 265 266 if (FIELD_OK(sq.vaddr)) { 267 opts->sq.vaddr = NULL; 268 } 269 270 if (FIELD_OK(sq.paddr)) { 271 opts->sq.paddr = 0; 272 } 273 274 if (FIELD_OK(sq.buffer_size)) { 275 opts->sq.buffer_size = 0; 276 } 277 278 if (FIELD_OK(cq.vaddr)) { 279 opts->cq.vaddr = NULL; 280 } 281 282 if (FIELD_OK(cq.paddr)) { 283 opts->cq.paddr = 0; 284 } 285 286 if (FIELD_OK(cq.buffer_size)) { 287 opts->cq.buffer_size = 0; 288 } 289 290 if (FIELD_OK(create_only)) { 291 opts->create_only = false; 292 } 293 294 #undef FIELD_OK 295 } 296 297 static struct spdk_nvme_qpair * 298 nvme_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 299 const struct spdk_nvme_io_qpair_opts *opts) 300 { 301 uint32_t qid; 302 struct spdk_nvme_qpair *qpair; 303 union spdk_nvme_cc_register cc; 304 305 if (!ctrlr) { 306 return NULL; 307 } 308 309 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 310 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 311 SPDK_ERRLOG("get_cc failed\n"); 312 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 313 return NULL; 314 } 315 316 if (opts->qprio & ~SPDK_NVME_CREATE_IO_SQ_QPRIO_MASK) { 317 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 318 return NULL; 319 } 320 321 /* 322 * Only value SPDK_NVME_QPRIO_URGENT(0) is valid for the 323 * default round robin arbitration method. 324 */ 325 if ((cc.bits.ams == SPDK_NVME_CC_AMS_RR) && (opts->qprio != SPDK_NVME_QPRIO_URGENT)) { 326 SPDK_ERRLOG("invalid queue priority for default round robin arbitration method\n"); 327 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 328 return NULL; 329 } 330 331 /* 332 * Get the first available I/O queue ID. 333 */ 334 qid = spdk_bit_array_find_first_set(ctrlr->free_io_qids, 1); 335 if (qid > ctrlr->opts.num_io_queues) { 336 SPDK_ERRLOG("No free I/O queue IDs\n"); 337 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 338 return NULL; 339 } 340 341 qpair = nvme_transport_ctrlr_create_io_qpair(ctrlr, qid, opts); 342 if (qpair == NULL) { 343 SPDK_ERRLOG("nvme_transport_ctrlr_create_io_qpair() failed\n"); 344 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 345 return NULL; 346 } 347 348 spdk_bit_array_clear(ctrlr->free_io_qids, qid); 349 TAILQ_INSERT_TAIL(&ctrlr->active_io_qpairs, qpair, tailq); 350 351 nvme_ctrlr_proc_add_io_qpair(qpair); 352 353 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 354 355 return qpair; 356 } 357 358 int 359 spdk_nvme_ctrlr_connect_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair) 360 { 361 int rc; 362 363 if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) { 364 return -EISCONN; 365 } 366 367 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 368 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 369 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 370 371 if (ctrlr->quirks & NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC) { 372 spdk_delay_us(100); 373 } 374 375 return rc; 376 } 377 378 void 379 spdk_nvme_ctrlr_disconnect_io_qpair(struct spdk_nvme_qpair *qpair) 380 { 381 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 382 383 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 384 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 385 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 386 } 387 388 struct spdk_nvme_qpair * 389 spdk_nvme_ctrlr_alloc_io_qpair(struct spdk_nvme_ctrlr *ctrlr, 390 const struct spdk_nvme_io_qpair_opts *user_opts, 391 size_t opts_size) 392 { 393 394 struct spdk_nvme_qpair *qpair; 395 struct spdk_nvme_io_qpair_opts opts; 396 int rc; 397 398 /* 399 * Get the default options, then overwrite them with the user-provided options 400 * up to opts_size. 401 * 402 * This allows for extensions of the opts structure without breaking 403 * ABI compatibility. 404 */ 405 spdk_nvme_ctrlr_get_default_io_qpair_opts(ctrlr, &opts, sizeof(opts)); 406 if (user_opts) { 407 memcpy(&opts, user_opts, spdk_min(sizeof(opts), opts_size)); 408 409 /* If user passes buffers, make sure they're big enough for the requested queue size */ 410 if (opts.sq.vaddr) { 411 if (opts.sq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))) { 412 SPDK_ERRLOG("sq buffer size %lx is too small for sq size %lx\n", 413 opts.sq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cmd))); 414 return NULL; 415 } 416 } 417 if (opts.cq.vaddr) { 418 if (opts.cq.buffer_size < (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))) { 419 SPDK_ERRLOG("cq buffer size %lx is too small for cq size %lx\n", 420 opts.cq.buffer_size, (opts.io_queue_size * sizeof(struct spdk_nvme_cpl))); 421 return NULL; 422 } 423 } 424 } 425 426 qpair = nvme_ctrlr_create_io_qpair(ctrlr, &opts); 427 428 if (qpair == NULL || opts.create_only == true) { 429 return qpair; 430 } 431 432 rc = spdk_nvme_ctrlr_connect_io_qpair(ctrlr, qpair); 433 if (rc != 0) { 434 SPDK_ERRLOG("nvme_transport_ctrlr_connect_io_qpair() failed\n"); 435 nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair); 436 return NULL; 437 } 438 439 return qpair; 440 } 441 442 int 443 spdk_nvme_ctrlr_reconnect_io_qpair(struct spdk_nvme_qpair *qpair) 444 { 445 struct spdk_nvme_ctrlr *ctrlr; 446 int rc; 447 448 assert(qpair != NULL); 449 assert(nvme_qpair_is_admin_queue(qpair) == false); 450 assert(qpair->ctrlr != NULL); 451 452 ctrlr = qpair->ctrlr; 453 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 454 455 if (ctrlr->is_removed) { 456 rc = -ENODEV; 457 goto out; 458 } 459 460 if (ctrlr->is_resetting) { 461 rc = -EAGAIN; 462 goto out; 463 } 464 465 if (ctrlr->is_failed) { 466 rc = -ENXIO; 467 goto out; 468 } 469 470 if (nvme_qpair_get_state(qpair) != NVME_QPAIR_DISCONNECTED) { 471 rc = 0; 472 goto out; 473 } 474 475 rc = nvme_transport_ctrlr_connect_qpair(ctrlr, qpair); 476 if (rc) { 477 rc = -EAGAIN; 478 goto out; 479 } 480 481 out: 482 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 483 return rc; 484 } 485 486 spdk_nvme_qp_failure_reason 487 spdk_nvme_ctrlr_get_admin_qp_failure_reason(struct spdk_nvme_ctrlr *ctrlr) 488 { 489 return ctrlr->adminq->transport_failure_reason; 490 } 491 492 /* 493 * This internal function will attempt to take the controller 494 * lock before calling disconnect on a controller qpair. 495 * Functions already holding the controller lock should 496 * call nvme_transport_ctrlr_disconnect_qpair directly. 497 */ 498 void 499 nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair) 500 { 501 struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr; 502 503 assert(ctrlr != NULL); 504 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 505 nvme_transport_ctrlr_disconnect_qpair(ctrlr, qpair); 506 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 507 } 508 509 int 510 spdk_nvme_ctrlr_free_io_qpair(struct spdk_nvme_qpair *qpair) 511 { 512 struct spdk_nvme_ctrlr *ctrlr; 513 514 if (qpair == NULL) { 515 return 0; 516 } 517 518 ctrlr = qpair->ctrlr; 519 520 if (qpair->in_completion_context) { 521 /* 522 * There are many cases where it is convenient to delete an io qpair in the context 523 * of that qpair's completion routine. To handle this properly, set a flag here 524 * so that the completion routine will perform an actual delete after the context 525 * unwinds. 526 */ 527 qpair->delete_after_completion_context = 1; 528 return 0; 529 } 530 531 if (qpair->poll_group && qpair->poll_group->in_completion_context) { 532 /* Same as above, but in a poll group. */ 533 qpair->poll_group->num_qpairs_to_delete++; 534 qpair->delete_after_completion_context = 1; 535 return 0; 536 } 537 538 if (qpair->poll_group) { 539 spdk_nvme_poll_group_remove(qpair->poll_group->group, qpair); 540 } 541 542 /* Do not retry. */ 543 nvme_qpair_set_state(qpair, NVME_QPAIR_DESTROYING); 544 nvme_qpair_abort_reqs(qpair, 1); 545 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 546 547 nvme_ctrlr_proc_remove_io_qpair(qpair); 548 549 TAILQ_REMOVE(&ctrlr->active_io_qpairs, qpair, tailq); 550 spdk_bit_array_set(ctrlr->free_io_qids, qpair->id); 551 552 if (nvme_transport_ctrlr_delete_io_qpair(ctrlr, qpair)) { 553 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 554 return -1; 555 } 556 557 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 558 return 0; 559 } 560 561 static void 562 nvme_ctrlr_construct_intel_support_log_page_list(struct spdk_nvme_ctrlr *ctrlr, 563 struct spdk_nvme_intel_log_page_directory *log_page_directory) 564 { 565 if (log_page_directory == NULL) { 566 return; 567 } 568 569 if (ctrlr->cdata.vid != SPDK_PCI_VID_INTEL) { 570 return; 571 } 572 573 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY] = true; 574 575 if (log_page_directory->read_latency_log_len || 576 (ctrlr->quirks & NVME_INTEL_QUIRK_READ_LATENCY)) { 577 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_READ_CMD_LATENCY] = true; 578 } 579 if (log_page_directory->write_latency_log_len || 580 (ctrlr->quirks & NVME_INTEL_QUIRK_WRITE_LATENCY)) { 581 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_WRITE_CMD_LATENCY] = true; 582 } 583 if (log_page_directory->temperature_statistics_log_len) { 584 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_TEMPERATURE] = true; 585 } 586 if (log_page_directory->smart_log_len) { 587 ctrlr->log_page_supported[SPDK_NVME_INTEL_LOG_SMART] = true; 588 } 589 if (log_page_directory->marketing_description_log_len) { 590 ctrlr->log_page_supported[SPDK_NVME_INTEL_MARKETING_DESCRIPTION] = true; 591 } 592 } 593 594 static int nvme_ctrlr_set_intel_support_log_pages(struct spdk_nvme_ctrlr *ctrlr) 595 { 596 int rc = 0; 597 struct nvme_completion_poll_status *status; 598 struct spdk_nvme_intel_log_page_directory *log_page_directory; 599 600 log_page_directory = spdk_zmalloc(sizeof(struct spdk_nvme_intel_log_page_directory), 601 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_DMA); 602 if (log_page_directory == NULL) { 603 SPDK_ERRLOG("could not allocate log_page_directory\n"); 604 return -ENXIO; 605 } 606 607 status = calloc(1, sizeof(*status)); 608 if (!status) { 609 SPDK_ERRLOG("Failed to allocate status tracker\n"); 610 spdk_free(log_page_directory); 611 return -ENOMEM; 612 } 613 614 rc = spdk_nvme_ctrlr_cmd_get_log_page(ctrlr, SPDK_NVME_INTEL_LOG_PAGE_DIRECTORY, 615 SPDK_NVME_GLOBAL_NS_TAG, log_page_directory, 616 sizeof(struct spdk_nvme_intel_log_page_directory), 617 0, nvme_completion_poll_cb, status); 618 if (rc != 0) { 619 spdk_free(log_page_directory); 620 free(status); 621 return rc; 622 } 623 624 if (spdk_nvme_wait_for_completion_timeout(ctrlr->adminq, status, 625 ctrlr->opts.admin_timeout_ms / 1000)) { 626 spdk_free(log_page_directory); 627 SPDK_WARNLOG("Intel log pages not supported on Intel drive!\n"); 628 if (!status->timed_out) { 629 free(status); 630 } 631 return 0; 632 } 633 634 nvme_ctrlr_construct_intel_support_log_page_list(ctrlr, log_page_directory); 635 spdk_free(log_page_directory); 636 free(status); 637 return 0; 638 } 639 640 static int 641 nvme_ctrlr_set_supported_log_pages(struct spdk_nvme_ctrlr *ctrlr) 642 { 643 int rc = 0; 644 645 memset(ctrlr->log_page_supported, 0, sizeof(ctrlr->log_page_supported)); 646 /* Mandatory pages */ 647 ctrlr->log_page_supported[SPDK_NVME_LOG_ERROR] = true; 648 ctrlr->log_page_supported[SPDK_NVME_LOG_HEALTH_INFORMATION] = true; 649 ctrlr->log_page_supported[SPDK_NVME_LOG_FIRMWARE_SLOT] = true; 650 if (ctrlr->cdata.lpa.celp) { 651 ctrlr->log_page_supported[SPDK_NVME_LOG_COMMAND_EFFECTS_LOG] = true; 652 } 653 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL && !(ctrlr->quirks & NVME_INTEL_QUIRK_NO_LOG_PAGES)) { 654 rc = nvme_ctrlr_set_intel_support_log_pages(ctrlr); 655 } 656 657 return rc; 658 } 659 660 static void 661 nvme_ctrlr_set_intel_supported_features(struct spdk_nvme_ctrlr *ctrlr) 662 { 663 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_MAX_LBA] = true; 664 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_NATIVE_MAX_LBA] = true; 665 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_POWER_GOVERNOR_SETTING] = true; 666 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_SMBUS_ADDRESS] = true; 667 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LED_PATTERN] = true; 668 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_RESET_TIMED_WORKLOAD_COUNTERS] = true; 669 ctrlr->feature_supported[SPDK_NVME_INTEL_FEAT_LATENCY_TRACKING] = true; 670 } 671 672 static void 673 nvme_ctrlr_set_arbitration_feature(struct spdk_nvme_ctrlr *ctrlr) 674 { 675 uint32_t cdw11; 676 struct nvme_completion_poll_status *status; 677 678 if (ctrlr->opts.arbitration_burst == 0) { 679 return; 680 } 681 682 if (ctrlr->opts.arbitration_burst > 7) { 683 SPDK_WARNLOG("Valid arbitration burst values is from 0-7\n"); 684 return; 685 } 686 687 status = calloc(1, sizeof(*status)); 688 if (!status) { 689 SPDK_ERRLOG("Failed to allocate status tracker\n"); 690 return; 691 } 692 693 cdw11 = ctrlr->opts.arbitration_burst; 694 695 if (spdk_nvme_ctrlr_get_flags(ctrlr) & SPDK_NVME_CTRLR_WRR_SUPPORTED) { 696 cdw11 |= (uint32_t)ctrlr->opts.low_priority_weight << 8; 697 cdw11 |= (uint32_t)ctrlr->opts.medium_priority_weight << 16; 698 cdw11 |= (uint32_t)ctrlr->opts.high_priority_weight << 24; 699 } 700 701 if (spdk_nvme_ctrlr_cmd_set_feature(ctrlr, SPDK_NVME_FEAT_ARBITRATION, 702 cdw11, 0, NULL, 0, 703 nvme_completion_poll_cb, status) < 0) { 704 SPDK_ERRLOG("Set arbitration feature failed\n"); 705 free(status); 706 return; 707 } 708 709 if (spdk_nvme_wait_for_completion_timeout(ctrlr->adminq, status, 710 ctrlr->opts.admin_timeout_ms / 1000)) { 711 SPDK_ERRLOG("Timeout to set arbitration feature\n"); 712 } 713 714 if (!status->timed_out) { 715 free(status); 716 } 717 } 718 719 static void 720 nvme_ctrlr_set_supported_features(struct spdk_nvme_ctrlr *ctrlr) 721 { 722 memset(ctrlr->feature_supported, 0, sizeof(ctrlr->feature_supported)); 723 /* Mandatory features */ 724 ctrlr->feature_supported[SPDK_NVME_FEAT_ARBITRATION] = true; 725 ctrlr->feature_supported[SPDK_NVME_FEAT_POWER_MANAGEMENT] = true; 726 ctrlr->feature_supported[SPDK_NVME_FEAT_TEMPERATURE_THRESHOLD] = true; 727 ctrlr->feature_supported[SPDK_NVME_FEAT_ERROR_RECOVERY] = true; 728 ctrlr->feature_supported[SPDK_NVME_FEAT_NUMBER_OF_QUEUES] = true; 729 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_COALESCING] = true; 730 ctrlr->feature_supported[SPDK_NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION] = true; 731 ctrlr->feature_supported[SPDK_NVME_FEAT_WRITE_ATOMICITY] = true; 732 ctrlr->feature_supported[SPDK_NVME_FEAT_ASYNC_EVENT_CONFIGURATION] = true; 733 /* Optional features */ 734 if (ctrlr->cdata.vwc.present) { 735 ctrlr->feature_supported[SPDK_NVME_FEAT_VOLATILE_WRITE_CACHE] = true; 736 } 737 if (ctrlr->cdata.apsta.supported) { 738 ctrlr->feature_supported[SPDK_NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION] = true; 739 } 740 if (ctrlr->cdata.hmpre) { 741 ctrlr->feature_supported[SPDK_NVME_FEAT_HOST_MEM_BUFFER] = true; 742 } 743 if (ctrlr->cdata.vid == SPDK_PCI_VID_INTEL) { 744 nvme_ctrlr_set_intel_supported_features(ctrlr); 745 } 746 747 nvme_ctrlr_set_arbitration_feature(ctrlr); 748 } 749 750 bool 751 spdk_nvme_ctrlr_is_failed(struct spdk_nvme_ctrlr *ctrlr) 752 { 753 return ctrlr->is_failed; 754 } 755 756 void 757 nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove) 758 { 759 /* 760 * Set the flag here and leave the work failure of qpairs to 761 * spdk_nvme_qpair_process_completions(). 762 */ 763 if (hot_remove) { 764 ctrlr->is_removed = true; 765 } 766 ctrlr->is_failed = true; 767 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 768 SPDK_ERRLOG("ctrlr %s in failed state.\n", ctrlr->trid.traddr); 769 } 770 771 /** 772 * This public API function will try to take the controller lock. 773 * Any private functions being called from a thread already holding 774 * the ctrlr lock should call nvme_ctrlr_fail directly. 775 */ 776 void 777 spdk_nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr) 778 { 779 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 780 nvme_ctrlr_fail(ctrlr, false); 781 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 782 } 783 784 static void 785 nvme_ctrlr_shutdown(struct spdk_nvme_ctrlr *ctrlr) 786 { 787 union spdk_nvme_cc_register cc; 788 union spdk_nvme_csts_register csts; 789 uint32_t ms_waited = 0; 790 uint32_t shutdown_timeout_ms; 791 792 if (ctrlr->is_removed) { 793 return; 794 } 795 796 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 797 SPDK_ERRLOG("get_cc() failed\n"); 798 return; 799 } 800 801 cc.bits.shn = SPDK_NVME_SHN_NORMAL; 802 803 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 804 SPDK_ERRLOG("set_cc() failed\n"); 805 return; 806 } 807 808 /* 809 * The NVMe specification defines RTD3E to be the time between 810 * setting SHN = 1 until the controller will set SHST = 10b. 811 * If the device doesn't report RTD3 entry latency, or if it 812 * reports RTD3 entry latency less than 10 seconds, pick 813 * 10 seconds as a reasonable amount of time to 814 * wait before proceeding. 815 */ 816 SPDK_DEBUGLOG(SPDK_LOG_NVME, "RTD3E = %" PRIu32 " us\n", ctrlr->cdata.rtd3e); 817 shutdown_timeout_ms = (ctrlr->cdata.rtd3e + 999) / 1000; 818 shutdown_timeout_ms = spdk_max(shutdown_timeout_ms, 10000); 819 SPDK_DEBUGLOG(SPDK_LOG_NVME, "shutdown timeout = %" PRIu32 " ms\n", shutdown_timeout_ms); 820 821 do { 822 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 823 SPDK_ERRLOG("get_csts() failed\n"); 824 return; 825 } 826 827 if (csts.bits.shst == SPDK_NVME_SHST_COMPLETE) { 828 SPDK_DEBUGLOG(SPDK_LOG_NVME, "shutdown complete in %u milliseconds\n", 829 ms_waited); 830 return; 831 } 832 833 nvme_delay(1000); 834 ms_waited++; 835 } while (ms_waited < shutdown_timeout_ms); 836 837 SPDK_ERRLOG("did not shutdown within %u milliseconds\n", shutdown_timeout_ms); 838 if (ctrlr->quirks & NVME_QUIRK_SHST_COMPLETE) { 839 SPDK_ERRLOG("likely due to shutdown handling in the VMWare emulated NVMe SSD\n"); 840 } 841 } 842 843 static int 844 nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr) 845 { 846 union spdk_nvme_cc_register cc; 847 int rc; 848 849 rc = nvme_transport_ctrlr_enable(ctrlr); 850 if (rc != 0) { 851 SPDK_ERRLOG("transport ctrlr_enable failed\n"); 852 return rc; 853 } 854 855 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 856 SPDK_ERRLOG("get_cc() failed\n"); 857 return -EIO; 858 } 859 860 if (cc.bits.en != 0) { 861 SPDK_ERRLOG("called with CC.EN = 1\n"); 862 return -EINVAL; 863 } 864 865 cc.bits.en = 1; 866 cc.bits.css = 0; 867 cc.bits.shn = 0; 868 cc.bits.iosqes = 6; /* SQ entry size == 64 == 2^6 */ 869 cc.bits.iocqes = 4; /* CQ entry size == 16 == 2^4 */ 870 871 /* Page size is 2 ^ (12 + mps). */ 872 cc.bits.mps = spdk_u32log2(ctrlr->page_size) - 12; 873 874 if (ctrlr->cap.bits.css == 0) { 875 SPDK_INFOLOG(SPDK_LOG_NVME, 876 "Drive reports no command sets supported. Assuming NVM is supported.\n"); 877 ctrlr->cap.bits.css = SPDK_NVME_CAP_CSS_NVM; 878 } 879 880 if (!(ctrlr->cap.bits.css & (1u << ctrlr->opts.command_set))) { 881 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Requested I/O command set %u but supported mask is 0x%x\n", 882 ctrlr->opts.command_set, ctrlr->cap.bits.css); 883 return -EINVAL; 884 } 885 886 cc.bits.css = ctrlr->opts.command_set; 887 888 switch (ctrlr->opts.arb_mechanism) { 889 case SPDK_NVME_CC_AMS_RR: 890 break; 891 case SPDK_NVME_CC_AMS_WRR: 892 if (SPDK_NVME_CAP_AMS_WRR & ctrlr->cap.bits.ams) { 893 break; 894 } 895 return -EINVAL; 896 case SPDK_NVME_CC_AMS_VS: 897 if (SPDK_NVME_CAP_AMS_VS & ctrlr->cap.bits.ams) { 898 break; 899 } 900 return -EINVAL; 901 default: 902 return -EINVAL; 903 } 904 905 cc.bits.ams = ctrlr->opts.arb_mechanism; 906 907 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 908 SPDK_ERRLOG("set_cc() failed\n"); 909 return -EIO; 910 } 911 912 return 0; 913 } 914 915 static int 916 nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr) 917 { 918 union spdk_nvme_cc_register cc; 919 920 if (nvme_ctrlr_get_cc(ctrlr, &cc)) { 921 SPDK_ERRLOG("get_cc() failed\n"); 922 return -EIO; 923 } 924 925 if (cc.bits.en == 0) { 926 return 0; 927 } 928 929 cc.bits.en = 0; 930 931 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 932 SPDK_ERRLOG("set_cc() failed\n"); 933 return -EIO; 934 } 935 936 return 0; 937 } 938 939 #ifdef DEBUG 940 static const char * 941 nvme_ctrlr_state_string(enum nvme_ctrlr_state state) 942 { 943 switch (state) { 944 case NVME_CTRLR_STATE_INIT_DELAY: 945 return "delay init"; 946 case NVME_CTRLR_STATE_INIT: 947 return "init"; 948 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 949 return "disable and wait for CSTS.RDY = 1"; 950 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 951 return "disable and wait for CSTS.RDY = 0"; 952 case NVME_CTRLR_STATE_ENABLE: 953 return "enable controller by writing CC.EN = 1"; 954 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 955 return "wait for CSTS.RDY = 1"; 956 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 957 return "reset admin queue"; 958 case NVME_CTRLR_STATE_IDENTIFY: 959 return "identify controller"; 960 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 961 return "wait for identify controller"; 962 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 963 return "set number of queues"; 964 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 965 return "wait for set number of queues"; 966 case NVME_CTRLR_STATE_CONSTRUCT_NS: 967 return "construct namespaces"; 968 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 969 return "identify active ns"; 970 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 971 return "wait for identify active ns"; 972 case NVME_CTRLR_STATE_IDENTIFY_NS: 973 return "identify ns"; 974 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 975 return "wait for identify ns"; 976 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 977 return "identify namespace id descriptors"; 978 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 979 return "wait for identify namespace id descriptors"; 980 case NVME_CTRLR_STATE_CONFIGURE_AER: 981 return "configure AER"; 982 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 983 return "wait for configure aer"; 984 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 985 return "set supported log pages"; 986 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 987 return "set supported features"; 988 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 989 return "set doorbell buffer config"; 990 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 991 return "wait for doorbell buffer config"; 992 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 993 return "set keep alive timeout"; 994 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 995 return "wait for set keep alive timeout"; 996 case NVME_CTRLR_STATE_SET_HOST_ID: 997 return "set host ID"; 998 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 999 return "wait for set host ID"; 1000 case NVME_CTRLR_STATE_READY: 1001 return "ready"; 1002 case NVME_CTRLR_STATE_ERROR: 1003 return "error"; 1004 } 1005 return "unknown"; 1006 }; 1007 #endif /* DEBUG */ 1008 1009 static void 1010 nvme_ctrlr_set_state(struct spdk_nvme_ctrlr *ctrlr, enum nvme_ctrlr_state state, 1011 uint64_t timeout_in_ms) 1012 { 1013 uint64_t ticks_per_ms, timeout_in_ticks, now_ticks; 1014 1015 ctrlr->state = state; 1016 if (timeout_in_ms == NVME_TIMEOUT_INFINITE) { 1017 goto inf; 1018 } 1019 1020 ticks_per_ms = spdk_get_ticks_hz() / 1000; 1021 if (timeout_in_ms > UINT64_MAX / ticks_per_ms) { 1022 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1023 goto inf; 1024 } 1025 1026 now_ticks = spdk_get_ticks(); 1027 timeout_in_ticks = timeout_in_ms * ticks_per_ms; 1028 if (timeout_in_ticks > UINT64_MAX - now_ticks) { 1029 SPDK_ERRLOG("Specified timeout would cause integer overflow. Defaulting to no timeout.\n"); 1030 goto inf; 1031 } 1032 1033 ctrlr->state_timeout_tsc = timeout_in_ticks + now_ticks; 1034 SPDK_DEBUGLOG(SPDK_LOG_NVME, "setting state to %s (timeout %" PRIu64 " ms)\n", 1035 nvme_ctrlr_state_string(ctrlr->state), ctrlr->state_timeout_tsc); 1036 return; 1037 inf: 1038 SPDK_DEBUGLOG(SPDK_LOG_NVME, "setting state to %s (no timeout)\n", 1039 nvme_ctrlr_state_string(ctrlr->state)); 1040 ctrlr->state_timeout_tsc = NVME_TIMEOUT_INFINITE; 1041 } 1042 1043 static void 1044 nvme_ctrlr_free_doorbell_buffer(struct spdk_nvme_ctrlr *ctrlr) 1045 { 1046 if (ctrlr->shadow_doorbell) { 1047 spdk_free(ctrlr->shadow_doorbell); 1048 ctrlr->shadow_doorbell = NULL; 1049 } 1050 1051 if (ctrlr->eventidx) { 1052 spdk_free(ctrlr->eventidx); 1053 ctrlr->eventidx = NULL; 1054 } 1055 } 1056 1057 static void 1058 nvme_ctrlr_set_doorbell_buffer_config_done(void *arg, const struct spdk_nvme_cpl *cpl) 1059 { 1060 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1061 1062 if (spdk_nvme_cpl_is_error(cpl)) { 1063 SPDK_WARNLOG("Doorbell buffer config failed\n"); 1064 } else { 1065 SPDK_INFOLOG(SPDK_LOG_NVME, "NVMe controller: %s doorbell buffer config enabled\n", 1066 ctrlr->trid.traddr); 1067 } 1068 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1069 ctrlr->opts.admin_timeout_ms); 1070 } 1071 1072 static int 1073 nvme_ctrlr_set_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr) 1074 { 1075 int rc = 0; 1076 uint64_t prp1, prp2, len; 1077 1078 if (!ctrlr->cdata.oacs.doorbell_buffer_config) { 1079 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1080 ctrlr->opts.admin_timeout_ms); 1081 return 0; 1082 } 1083 1084 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 1085 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT, 1086 ctrlr->opts.admin_timeout_ms); 1087 return 0; 1088 } 1089 1090 /* only 1 page size for doorbell buffer */ 1091 ctrlr->shadow_doorbell = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1092 NULL, SPDK_ENV_LCORE_ID_ANY, 1093 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1094 if (ctrlr->shadow_doorbell == NULL) { 1095 rc = -ENOMEM; 1096 goto error; 1097 } 1098 1099 len = ctrlr->page_size; 1100 prp1 = spdk_vtophys(ctrlr->shadow_doorbell, &len); 1101 if (prp1 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1102 rc = -EFAULT; 1103 goto error; 1104 } 1105 1106 ctrlr->eventidx = spdk_zmalloc(ctrlr->page_size, ctrlr->page_size, 1107 NULL, SPDK_ENV_LCORE_ID_ANY, 1108 SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1109 if (ctrlr->eventidx == NULL) { 1110 rc = -ENOMEM; 1111 goto error; 1112 } 1113 1114 len = ctrlr->page_size; 1115 prp2 = spdk_vtophys(ctrlr->eventidx, &len); 1116 if (prp2 == SPDK_VTOPHYS_ERROR || len != ctrlr->page_size) { 1117 rc = -EFAULT; 1118 goto error; 1119 } 1120 1121 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG, 1122 ctrlr->opts.admin_timeout_ms); 1123 1124 rc = nvme_ctrlr_cmd_doorbell_buffer_config(ctrlr, prp1, prp2, 1125 nvme_ctrlr_set_doorbell_buffer_config_done, ctrlr); 1126 if (rc != 0) { 1127 goto error; 1128 } 1129 1130 return 0; 1131 1132 error: 1133 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1134 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1135 return rc; 1136 } 1137 1138 int 1139 spdk_nvme_ctrlr_reset(struct spdk_nvme_ctrlr *ctrlr) 1140 { 1141 int rc = 0; 1142 struct spdk_nvme_qpair *qpair; 1143 struct nvme_request *req, *tmp; 1144 1145 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1146 1147 if (ctrlr->is_resetting || ctrlr->is_removed) { 1148 /* 1149 * Controller is already resetting or has been removed. Return 1150 * immediately since there is no need to kick off another 1151 * reset in these cases. 1152 */ 1153 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1154 return ctrlr->is_resetting ? 0 : -ENXIO; 1155 } 1156 1157 ctrlr->is_resetting = true; 1158 ctrlr->is_failed = false; 1159 1160 SPDK_NOTICELOG("resetting controller\n"); 1161 1162 /* Free all of the queued abort requests */ 1163 STAILQ_FOREACH_SAFE(req, &ctrlr->queued_aborts, stailq, tmp) { 1164 STAILQ_REMOVE_HEAD(&ctrlr->queued_aborts, stailq); 1165 nvme_free_request(req); 1166 ctrlr->outstanding_aborts--; 1167 } 1168 1169 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 1170 1171 /* Disable all queues before disabling the controller hardware. */ 1172 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1173 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1174 } 1175 1176 ctrlr->adminq->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1177 nvme_transport_ctrlr_disconnect_qpair(ctrlr, ctrlr->adminq); 1178 if (nvme_transport_ctrlr_connect_qpair(ctrlr, ctrlr->adminq) != 0) { 1179 SPDK_ERRLOG("Controller reinitialization failed.\n"); 1180 rc = -1; 1181 goto out; 1182 } 1183 1184 /* Doorbell buffer config is invalid during reset */ 1185 nvme_ctrlr_free_doorbell_buffer(ctrlr); 1186 1187 /* Set the state back to INIT to cause a full hardware reset. */ 1188 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 1189 1190 nvme_qpair_set_state(ctrlr->adminq, NVME_QPAIR_ENABLED); 1191 while (ctrlr->state != NVME_CTRLR_STATE_READY) { 1192 if (nvme_ctrlr_process_init(ctrlr) != 0) { 1193 SPDK_ERRLOG("controller reinitialization failed\n"); 1194 rc = -1; 1195 break; 1196 } 1197 } 1198 1199 /* 1200 * For PCIe controllers, the memory locations of the tranpsort qpair 1201 * don't change when the controller is reset. They simply need to be 1202 * re-enabled with admin commands to the controller. For fabric 1203 * controllers we need to disconnect and reconnect the qpair on its 1204 * own thread outside of the context of the reset. 1205 */ 1206 if (rc == 0 && ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1207 /* Reinitialize qpairs */ 1208 TAILQ_FOREACH(qpair, &ctrlr->active_io_qpairs, tailq) { 1209 if (nvme_transport_ctrlr_connect_qpair(ctrlr, qpair) != 0) { 1210 qpair->transport_failure_reason = SPDK_NVME_QPAIR_FAILURE_LOCAL; 1211 rc = -1; 1212 continue; 1213 } 1214 } 1215 } 1216 1217 out: 1218 if (rc) { 1219 nvme_ctrlr_fail(ctrlr, false); 1220 } 1221 ctrlr->is_resetting = false; 1222 1223 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1224 1225 return rc; 1226 } 1227 1228 int 1229 spdk_nvme_ctrlr_set_trid(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_transport_id *trid) 1230 { 1231 int rc = 0; 1232 1233 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 1234 1235 if (ctrlr->is_failed == false) { 1236 rc = -EPERM; 1237 goto out; 1238 } 1239 1240 if (trid->trtype != ctrlr->trid.trtype) { 1241 rc = -EINVAL; 1242 goto out; 1243 } 1244 1245 if (strncmp(trid->subnqn, ctrlr->trid.subnqn, SPDK_NVMF_NQN_MAX_LEN)) { 1246 rc = -EINVAL; 1247 goto out; 1248 } 1249 1250 ctrlr->trid = *trid; 1251 1252 out: 1253 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 1254 return rc; 1255 } 1256 1257 static void 1258 nvme_ctrlr_identify_done(void *arg, const struct spdk_nvme_cpl *cpl) 1259 { 1260 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1261 1262 if (spdk_nvme_cpl_is_error(cpl)) { 1263 SPDK_ERRLOG("nvme_identify_controller failed!\n"); 1264 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1265 return; 1266 } 1267 1268 /* 1269 * Use MDTS to ensure our default max_xfer_size doesn't exceed what the 1270 * controller supports. 1271 */ 1272 ctrlr->max_xfer_size = nvme_transport_ctrlr_get_max_xfer_size(ctrlr); 1273 SPDK_DEBUGLOG(SPDK_LOG_NVME, "transport max_xfer_size %u\n", ctrlr->max_xfer_size); 1274 if (ctrlr->cdata.mdts > 0) { 1275 ctrlr->max_xfer_size = spdk_min(ctrlr->max_xfer_size, 1276 ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts))); 1277 SPDK_DEBUGLOG(SPDK_LOG_NVME, "MDTS max_xfer_size %u\n", ctrlr->max_xfer_size); 1278 } 1279 1280 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CNTLID 0x%04" PRIx16 "\n", ctrlr->cdata.cntlid); 1281 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 1282 ctrlr->cntlid = ctrlr->cdata.cntlid; 1283 } else { 1284 /* 1285 * Fabrics controllers should already have CNTLID from the Connect command. 1286 * 1287 * If CNTLID from Connect doesn't match CNTLID in the Identify Controller data, 1288 * trust the one from Connect. 1289 */ 1290 if (ctrlr->cntlid != ctrlr->cdata.cntlid) { 1291 SPDK_DEBUGLOG(SPDK_LOG_NVME, 1292 "Identify CNTLID 0x%04" PRIx16 " != Connect CNTLID 0x%04" PRIx16 "\n", 1293 ctrlr->cdata.cntlid, ctrlr->cntlid); 1294 } 1295 } 1296 1297 if (ctrlr->cdata.sgls.supported) { 1298 assert(ctrlr->cdata.sgls.supported != 0x3); 1299 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_SUPPORTED; 1300 if (ctrlr->cdata.sgls.supported == 0x2) { 1301 ctrlr->flags |= SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT; 1302 } 1303 /* 1304 * Use MSDBD to ensure our max_sges doesn't exceed what the 1305 * controller supports. 1306 */ 1307 ctrlr->max_sges = nvme_transport_ctrlr_get_max_sges(ctrlr); 1308 if (ctrlr->cdata.nvmf_specific.msdbd != 0) { 1309 ctrlr->max_sges = spdk_min(ctrlr->cdata.nvmf_specific.msdbd, ctrlr->max_sges); 1310 } else { 1311 /* A value 0 indicates no limit. */ 1312 } 1313 SPDK_DEBUGLOG(SPDK_LOG_NVME, "transport max_sges %u\n", ctrlr->max_sges); 1314 } 1315 1316 if (ctrlr->cdata.oacs.security) { 1317 ctrlr->flags |= SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED; 1318 } 1319 1320 SPDK_DEBUGLOG(SPDK_LOG_NVME, "fuses compare and write: %d\n", ctrlr->cdata.fuses.compare_and_write); 1321 if (ctrlr->cdata.fuses.compare_and_write) { 1322 ctrlr->flags |= SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED; 1323 } 1324 1325 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_NUM_QUEUES, 1326 ctrlr->opts.admin_timeout_ms); 1327 } 1328 1329 static int 1330 nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr) 1331 { 1332 int rc; 1333 1334 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY, 1335 ctrlr->opts.admin_timeout_ms); 1336 1337 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_CTRLR, 0, 0, 1338 &ctrlr->cdata, sizeof(ctrlr->cdata), 1339 nvme_ctrlr_identify_done, ctrlr); 1340 if (rc != 0) { 1341 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1342 return rc; 1343 } 1344 1345 return 0; 1346 } 1347 1348 enum nvme_active_ns_state { 1349 NVME_ACTIVE_NS_STATE_IDLE, 1350 NVME_ACTIVE_NS_STATE_PROCESSING, 1351 NVME_ACTIVE_NS_STATE_DONE, 1352 NVME_ACTIVE_NS_STATE_ERROR 1353 }; 1354 1355 typedef void (*nvme_active_ns_ctx_deleter)(struct nvme_active_ns_ctx *); 1356 1357 struct nvme_active_ns_ctx { 1358 struct spdk_nvme_ctrlr *ctrlr; 1359 uint32_t page; 1360 uint32_t num_pages; 1361 uint32_t next_nsid; 1362 uint32_t *new_ns_list; 1363 nvme_active_ns_ctx_deleter deleter; 1364 1365 enum nvme_active_ns_state state; 1366 }; 1367 1368 static struct nvme_active_ns_ctx * 1369 nvme_active_ns_ctx_create(struct spdk_nvme_ctrlr *ctrlr, nvme_active_ns_ctx_deleter deleter) 1370 { 1371 struct nvme_active_ns_ctx *ctx; 1372 uint32_t num_pages = 0; 1373 uint32_t *new_ns_list = NULL; 1374 1375 ctx = calloc(1, sizeof(*ctx)); 1376 if (!ctx) { 1377 SPDK_ERRLOG("Failed to allocate nvme_active_ns_ctx!\n"); 1378 return NULL; 1379 } 1380 1381 if (ctrlr->num_ns) { 1382 /* The allocated size must be a multiple of sizeof(struct spdk_nvme_ns_list) */ 1383 num_pages = (ctrlr->num_ns * sizeof(new_ns_list[0]) - 1) / sizeof(struct spdk_nvme_ns_list) + 1; 1384 new_ns_list = spdk_zmalloc(num_pages * sizeof(struct spdk_nvme_ns_list), ctrlr->page_size, 1385 NULL, SPDK_ENV_LCORE_ID_ANY, SPDK_MALLOC_DMA | SPDK_MALLOC_SHARE); 1386 if (!new_ns_list) { 1387 SPDK_ERRLOG("Failed to allocate active_ns_list!\n"); 1388 free(ctx); 1389 return NULL; 1390 } 1391 } 1392 1393 ctx->num_pages = num_pages; 1394 ctx->new_ns_list = new_ns_list; 1395 ctx->ctrlr = ctrlr; 1396 ctx->deleter = deleter; 1397 1398 return ctx; 1399 } 1400 1401 static void 1402 nvme_active_ns_ctx_destroy(struct nvme_active_ns_ctx *ctx) 1403 { 1404 spdk_free(ctx->new_ns_list); 1405 free(ctx); 1406 } 1407 1408 static void 1409 nvme_ctrlr_identify_active_ns_swap(struct spdk_nvme_ctrlr *ctrlr, uint32_t **new_ns_list) 1410 { 1411 spdk_free(ctrlr->active_ns_list); 1412 ctrlr->active_ns_list = *new_ns_list; 1413 *new_ns_list = NULL; 1414 } 1415 1416 static void 1417 nvme_ctrlr_identify_active_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1418 { 1419 struct nvme_active_ns_ctx *ctx = arg; 1420 1421 if (spdk_nvme_cpl_is_error(cpl)) { 1422 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1423 goto out; 1424 } 1425 1426 ctx->next_nsid = ctx->new_ns_list[1024 * ctx->page + 1023]; 1427 if (ctx->next_nsid == 0 || ++ctx->page == ctx->num_pages) { 1428 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1429 goto out; 1430 } 1431 1432 nvme_ctrlr_identify_active_ns_async(ctx); 1433 return; 1434 1435 out: 1436 if (ctx->deleter) { 1437 ctx->deleter(ctx); 1438 } 1439 } 1440 1441 static void 1442 nvme_ctrlr_identify_active_ns_async(struct nvme_active_ns_ctx *ctx) 1443 { 1444 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1445 uint32_t i; 1446 int rc; 1447 1448 if (ctrlr->num_ns == 0) { 1449 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1450 goto out; 1451 } 1452 1453 /* 1454 * If controller doesn't support active ns list CNS 0x02 dummy up 1455 * an active ns list, i.e. all namespaces report as active 1456 */ 1457 if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 1, 0) || ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS) { 1458 for (i = 0; i < ctrlr->num_ns; i++) { 1459 ctx->new_ns_list[i] = i + 1; 1460 } 1461 1462 ctx->state = NVME_ACTIVE_NS_STATE_DONE; 1463 goto out; 1464 } 1465 1466 ctx->state = NVME_ACTIVE_NS_STATE_PROCESSING; 1467 rc = nvme_ctrlr_cmd_identify(ctrlr, SPDK_NVME_IDENTIFY_ACTIVE_NS_LIST, 0, ctx->next_nsid, 1468 &ctx->new_ns_list[1024 * ctx->page], sizeof(struct spdk_nvme_ns_list), 1469 nvme_ctrlr_identify_active_ns_async_done, ctx); 1470 if (rc != 0) { 1471 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1472 goto out; 1473 } 1474 1475 return; 1476 1477 out: 1478 if (ctx->deleter) { 1479 ctx->deleter(ctx); 1480 } 1481 } 1482 1483 static void 1484 _nvme_active_ns_ctx_deleter(struct nvme_active_ns_ctx *ctx) 1485 { 1486 struct spdk_nvme_ctrlr *ctrlr = ctx->ctrlr; 1487 1488 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1489 nvme_ctrlr_destruct_namespaces(ctrlr); 1490 nvme_active_ns_ctx_destroy(ctx); 1491 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1492 return; 1493 } 1494 1495 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1496 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1497 nvme_active_ns_ctx_destroy(ctx); 1498 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_NS, ctrlr->opts.admin_timeout_ms); 1499 } 1500 1501 static void 1502 _nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1503 { 1504 struct nvme_active_ns_ctx *ctx; 1505 1506 ctx = nvme_active_ns_ctx_create(ctrlr, _nvme_active_ns_ctx_deleter); 1507 if (!ctx) { 1508 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1509 return; 1510 } 1511 1512 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS, 1513 ctrlr->opts.admin_timeout_ms); 1514 nvme_ctrlr_identify_active_ns_async(ctx); 1515 } 1516 1517 int 1518 nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr) 1519 { 1520 struct nvme_active_ns_ctx *ctx; 1521 int rc; 1522 1523 ctx = nvme_active_ns_ctx_create(ctrlr, NULL); 1524 if (!ctx) { 1525 return -ENOMEM; 1526 } 1527 1528 nvme_ctrlr_identify_active_ns_async(ctx); 1529 while (ctx->state == NVME_ACTIVE_NS_STATE_PROCESSING) { 1530 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 1531 if (rc < 0) { 1532 ctx->state = NVME_ACTIVE_NS_STATE_ERROR; 1533 break; 1534 } 1535 } 1536 1537 if (ctx->state == NVME_ACTIVE_NS_STATE_ERROR) { 1538 nvme_active_ns_ctx_destroy(ctx); 1539 return -ENXIO; 1540 } 1541 1542 assert(ctx->state == NVME_ACTIVE_NS_STATE_DONE); 1543 nvme_ctrlr_identify_active_ns_swap(ctrlr, &ctx->new_ns_list); 1544 nvme_active_ns_ctx_destroy(ctx); 1545 1546 return 0; 1547 } 1548 1549 static void 1550 nvme_ctrlr_identify_ns_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1551 { 1552 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1553 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1554 uint32_t nsid; 1555 int rc; 1556 1557 if (spdk_nvme_cpl_is_error(cpl)) { 1558 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1559 return; 1560 } else { 1561 nvme_ns_set_identify_data(ns); 1562 } 1563 1564 /* move on to the next active NS */ 1565 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1566 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1567 if (ns == NULL) { 1568 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ID_DESCS, 1569 ctrlr->opts.admin_timeout_ms); 1570 return; 1571 } 1572 ns->ctrlr = ctrlr; 1573 ns->id = nsid; 1574 1575 rc = nvme_ctrlr_identify_ns_async(ns); 1576 if (rc) { 1577 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1578 } 1579 } 1580 1581 static int 1582 nvme_ctrlr_identify_ns_async(struct spdk_nvme_ns *ns) 1583 { 1584 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1585 struct spdk_nvme_ns_data *nsdata; 1586 1587 nsdata = &ctrlr->nsdata[ns->id - 1]; 1588 1589 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS, 1590 ctrlr->opts.admin_timeout_ms); 1591 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS, 0, ns->id, 1592 nsdata, sizeof(*nsdata), 1593 nvme_ctrlr_identify_ns_async_done, ns); 1594 } 1595 1596 static int 1597 nvme_ctrlr_identify_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1598 { 1599 uint32_t nsid; 1600 struct spdk_nvme_ns *ns; 1601 int rc; 1602 1603 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1604 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1605 if (ns == NULL) { 1606 /* No active NS, move on to the next state */ 1607 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1608 ctrlr->opts.admin_timeout_ms); 1609 return 0; 1610 } 1611 1612 ns->ctrlr = ctrlr; 1613 ns->id = nsid; 1614 1615 rc = nvme_ctrlr_identify_ns_async(ns); 1616 if (rc) { 1617 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1618 } 1619 1620 return rc; 1621 } 1622 1623 static void 1624 nvme_ctrlr_identify_id_desc_async_done(void *arg, const struct spdk_nvme_cpl *cpl) 1625 { 1626 struct spdk_nvme_ns *ns = (struct spdk_nvme_ns *)arg; 1627 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1628 uint32_t nsid; 1629 int rc; 1630 1631 if (spdk_nvme_cpl_is_error(cpl)) { 1632 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1633 ctrlr->opts.admin_timeout_ms); 1634 return; 1635 } 1636 1637 /* move on to the next active NS */ 1638 nsid = spdk_nvme_ctrlr_get_next_active_ns(ctrlr, ns->id); 1639 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1640 if (ns == NULL) { 1641 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1642 ctrlr->opts.admin_timeout_ms); 1643 return; 1644 } 1645 1646 rc = nvme_ctrlr_identify_id_desc_async(ns); 1647 if (rc) { 1648 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1649 } 1650 } 1651 1652 static int 1653 nvme_ctrlr_identify_id_desc_async(struct spdk_nvme_ns *ns) 1654 { 1655 struct spdk_nvme_ctrlr *ctrlr = ns->ctrlr; 1656 1657 memset(ns->id_desc_list, 0, sizeof(ns->id_desc_list)); 1658 1659 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS, 1660 ctrlr->opts.admin_timeout_ms); 1661 return nvme_ctrlr_cmd_identify(ns->ctrlr, SPDK_NVME_IDENTIFY_NS_ID_DESCRIPTOR_LIST, 1662 0, ns->id, ns->id_desc_list, sizeof(ns->id_desc_list), 1663 nvme_ctrlr_identify_id_desc_async_done, ns); 1664 } 1665 1666 static int 1667 nvme_ctrlr_identify_id_desc_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1668 { 1669 uint32_t nsid; 1670 struct spdk_nvme_ns *ns; 1671 int rc; 1672 1673 if (ctrlr->vs.raw < SPDK_NVME_VERSION(1, 3, 0) || 1674 (ctrlr->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 1675 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Version < 1.3; not attempting to retrieve NS ID Descriptor List\n"); 1676 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1677 ctrlr->opts.admin_timeout_ms); 1678 return 0; 1679 } 1680 1681 nsid = spdk_nvme_ctrlr_get_first_active_ns(ctrlr); 1682 ns = spdk_nvme_ctrlr_get_ns(ctrlr, nsid); 1683 if (ns == NULL) { 1684 /* No active NS, move on to the next state */ 1685 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONFIGURE_AER, 1686 ctrlr->opts.admin_timeout_ms); 1687 return 0; 1688 } 1689 1690 rc = nvme_ctrlr_identify_id_desc_async(ns); 1691 if (rc) { 1692 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1693 } 1694 1695 return rc; 1696 } 1697 1698 static void 1699 nvme_ctrlr_update_nvmf_ioccsz(struct spdk_nvme_ctrlr *ctrlr) 1700 { 1701 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_RDMA || 1702 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_TCP || 1703 ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_FC) { 1704 if (ctrlr->cdata.nvmf_specific.ioccsz < 4) { 1705 SPDK_ERRLOG("Incorrect IOCCSZ %u, the minimum value should be 4\n", 1706 ctrlr->cdata.nvmf_specific.ioccsz); 1707 ctrlr->cdata.nvmf_specific.ioccsz = 4; 1708 assert(0); 1709 } 1710 ctrlr->ioccsz_bytes = ctrlr->cdata.nvmf_specific.ioccsz * 16 - sizeof(struct spdk_nvme_cmd); 1711 ctrlr->icdoff = ctrlr->cdata.nvmf_specific.icdoff; 1712 } 1713 } 1714 1715 static void 1716 nvme_ctrlr_set_num_queues_done(void *arg, const struct spdk_nvme_cpl *cpl) 1717 { 1718 uint32_t cq_allocated, sq_allocated, min_allocated, i; 1719 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1720 1721 if (spdk_nvme_cpl_is_error(cpl)) { 1722 SPDK_ERRLOG("Set Features - Number of Queues failed!\n"); 1723 ctrlr->opts.num_io_queues = 0; 1724 } else { 1725 /* 1726 * Data in cdw0 is 0-based. 1727 * Lower 16-bits indicate number of submission queues allocated. 1728 * Upper 16-bits indicate number of completion queues allocated. 1729 */ 1730 sq_allocated = (cpl->cdw0 & 0xFFFF) + 1; 1731 cq_allocated = (cpl->cdw0 >> 16) + 1; 1732 1733 /* 1734 * For 1:1 queue mapping, set number of allocated queues to be minimum of 1735 * submission and completion queues. 1736 */ 1737 min_allocated = spdk_min(sq_allocated, cq_allocated); 1738 1739 /* Set number of queues to be minimum of requested and actually allocated. */ 1740 ctrlr->opts.num_io_queues = spdk_min(min_allocated, ctrlr->opts.num_io_queues); 1741 } 1742 1743 ctrlr->free_io_qids = spdk_bit_array_create(ctrlr->opts.num_io_queues + 1); 1744 if (ctrlr->free_io_qids == NULL) { 1745 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1746 return; 1747 } 1748 1749 /* Initialize list of free I/O queue IDs. QID 0 is the admin queue. */ 1750 spdk_bit_array_clear(ctrlr->free_io_qids, 0); 1751 for (i = 1; i <= ctrlr->opts.num_io_queues; i++) { 1752 spdk_bit_array_set(ctrlr->free_io_qids, i); 1753 } 1754 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_CONSTRUCT_NS, 1755 ctrlr->opts.admin_timeout_ms); 1756 } 1757 1758 static int 1759 nvme_ctrlr_set_num_queues(struct spdk_nvme_ctrlr *ctrlr) 1760 { 1761 int rc; 1762 1763 if (ctrlr->opts.num_io_queues > SPDK_NVME_MAX_IO_QUEUES) { 1764 SPDK_NOTICELOG("Limiting requested num_io_queues %u to max %d\n", 1765 ctrlr->opts.num_io_queues, SPDK_NVME_MAX_IO_QUEUES); 1766 ctrlr->opts.num_io_queues = SPDK_NVME_MAX_IO_QUEUES; 1767 } else if (ctrlr->opts.num_io_queues < 1) { 1768 SPDK_NOTICELOG("Requested num_io_queues 0, increasing to 1\n"); 1769 ctrlr->opts.num_io_queues = 1; 1770 } 1771 1772 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES, 1773 ctrlr->opts.admin_timeout_ms); 1774 1775 rc = nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->opts.num_io_queues, 1776 nvme_ctrlr_set_num_queues_done, ctrlr); 1777 if (rc != 0) { 1778 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1779 return rc; 1780 } 1781 1782 return 0; 1783 } 1784 1785 static void 1786 nvme_ctrlr_set_keep_alive_timeout_done(void *arg, const struct spdk_nvme_cpl *cpl) 1787 { 1788 uint32_t keep_alive_interval_ms; 1789 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1790 1791 if (spdk_nvme_cpl_is_error(cpl)) { 1792 if ((cpl->status.sct == SPDK_NVME_SCT_GENERIC) && 1793 (cpl->status.sc == SPDK_NVME_SC_INVALID_FIELD)) { 1794 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Keep alive timeout Get Feature is not supported\n"); 1795 } else { 1796 SPDK_ERRLOG("Keep alive timeout Get Feature failed: SC %x SCT %x\n", 1797 cpl->status.sc, cpl->status.sct); 1798 ctrlr->opts.keep_alive_timeout_ms = 0; 1799 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1800 return; 1801 } 1802 } else { 1803 if (ctrlr->opts.keep_alive_timeout_ms != cpl->cdw0) { 1804 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Controller adjusted keep alive timeout to %u ms\n", 1805 cpl->cdw0); 1806 } 1807 1808 ctrlr->opts.keep_alive_timeout_ms = cpl->cdw0; 1809 } 1810 1811 keep_alive_interval_ms = ctrlr->opts.keep_alive_timeout_ms / 2; 1812 if (keep_alive_interval_ms == 0) { 1813 keep_alive_interval_ms = 1; 1814 } 1815 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Sending keep alive every %u ms\n", keep_alive_interval_ms); 1816 1817 ctrlr->keep_alive_interval_ticks = (keep_alive_interval_ms * spdk_get_ticks_hz()) / UINT64_C(1000); 1818 1819 /* Schedule the first Keep Alive to be sent as soon as possible. */ 1820 ctrlr->next_keep_alive_tick = spdk_get_ticks(); 1821 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1822 ctrlr->opts.admin_timeout_ms); 1823 } 1824 1825 static int 1826 nvme_ctrlr_set_keep_alive_timeout(struct spdk_nvme_ctrlr *ctrlr) 1827 { 1828 int rc; 1829 1830 if (ctrlr->opts.keep_alive_timeout_ms == 0) { 1831 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1832 ctrlr->opts.admin_timeout_ms); 1833 return 0; 1834 } 1835 1836 if (ctrlr->cdata.kas == 0) { 1837 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Controller KAS is 0 - not enabling Keep Alive\n"); 1838 ctrlr->opts.keep_alive_timeout_ms = 0; 1839 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_HOST_ID, 1840 ctrlr->opts.admin_timeout_ms); 1841 return 0; 1842 } 1843 1844 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT, 1845 ctrlr->opts.admin_timeout_ms); 1846 1847 /* Retrieve actual keep alive timeout, since the controller may have adjusted it. */ 1848 rc = spdk_nvme_ctrlr_cmd_get_feature(ctrlr, SPDK_NVME_FEAT_KEEP_ALIVE_TIMER, 0, NULL, 0, 1849 nvme_ctrlr_set_keep_alive_timeout_done, ctrlr); 1850 if (rc != 0) { 1851 SPDK_ERRLOG("Keep alive timeout Get Feature failed: %d\n", rc); 1852 ctrlr->opts.keep_alive_timeout_ms = 0; 1853 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1854 return rc; 1855 } 1856 1857 return 0; 1858 } 1859 1860 static void 1861 nvme_ctrlr_set_host_id_done(void *arg, const struct spdk_nvme_cpl *cpl) 1862 { 1863 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 1864 1865 if (spdk_nvme_cpl_is_error(cpl)) { 1866 /* 1867 * Treat Set Features - Host ID failure as non-fatal, since the Host ID feature 1868 * is optional. 1869 */ 1870 SPDK_WARNLOG("Set Features - Host ID failed: SC 0x%x SCT 0x%x\n", 1871 cpl->status.sc, cpl->status.sct); 1872 } else { 1873 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Set Features - Host ID was successful\n"); 1874 } 1875 1876 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1877 } 1878 1879 static int 1880 nvme_ctrlr_set_host_id(struct spdk_nvme_ctrlr *ctrlr) 1881 { 1882 uint8_t *host_id; 1883 uint32_t host_id_size; 1884 int rc; 1885 1886 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 1887 /* 1888 * NVMe-oF sends the host ID during Connect and doesn't allow 1889 * Set Features - Host Identifier after Connect, so we don't need to do anything here. 1890 */ 1891 SPDK_DEBUGLOG(SPDK_LOG_NVME, "NVMe-oF transport - not sending Set Features - Host ID\n"); 1892 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1893 return 0; 1894 } 1895 1896 if (ctrlr->cdata.ctratt.host_id_exhid_supported) { 1897 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Using 128-bit extended host identifier\n"); 1898 host_id = ctrlr->opts.extended_host_id; 1899 host_id_size = sizeof(ctrlr->opts.extended_host_id); 1900 } else { 1901 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Using 64-bit host identifier\n"); 1902 host_id = ctrlr->opts.host_id; 1903 host_id_size = sizeof(ctrlr->opts.host_id); 1904 } 1905 1906 /* If the user specified an all-zeroes host identifier, don't send the command. */ 1907 if (spdk_mem_all_zero(host_id, host_id_size)) { 1908 SPDK_DEBUGLOG(SPDK_LOG_NVME, 1909 "User did not specify host ID - not sending Set Features - Host ID\n"); 1910 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_READY, NVME_TIMEOUT_INFINITE); 1911 return 0; 1912 } 1913 1914 SPDK_LOGDUMP(SPDK_LOG_NVME, "host_id", host_id, host_id_size); 1915 1916 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_HOST_ID, 1917 ctrlr->opts.admin_timeout_ms); 1918 1919 rc = nvme_ctrlr_cmd_set_host_id(ctrlr, host_id, host_id_size, nvme_ctrlr_set_host_id_done, ctrlr); 1920 if (rc != 0) { 1921 SPDK_ERRLOG("Set Features - Host ID failed: %d\n", rc); 1922 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 1923 return rc; 1924 } 1925 1926 return 0; 1927 } 1928 1929 static void 1930 nvme_ctrlr_destruct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1931 { 1932 if (ctrlr->ns) { 1933 uint32_t i, num_ns = ctrlr->num_ns; 1934 1935 for (i = 0; i < num_ns; i++) { 1936 nvme_ns_destruct(&ctrlr->ns[i]); 1937 } 1938 1939 spdk_free(ctrlr->ns); 1940 ctrlr->ns = NULL; 1941 ctrlr->num_ns = 0; 1942 } 1943 1944 if (ctrlr->nsdata) { 1945 spdk_free(ctrlr->nsdata); 1946 ctrlr->nsdata = NULL; 1947 } 1948 1949 spdk_free(ctrlr->active_ns_list); 1950 ctrlr->active_ns_list = NULL; 1951 } 1952 1953 static void 1954 nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1955 { 1956 uint32_t i, nn = ctrlr->cdata.nn; 1957 struct spdk_nvme_ns_data *nsdata; 1958 bool ns_is_active; 1959 1960 for (i = 0; i < nn; i++) { 1961 struct spdk_nvme_ns *ns = &ctrlr->ns[i]; 1962 uint32_t nsid = i + 1; 1963 1964 nsdata = &ctrlr->nsdata[nsid - 1]; 1965 ns_is_active = spdk_nvme_ctrlr_is_active_ns(ctrlr, nsid); 1966 1967 if (nsdata->ncap && ns_is_active) { 1968 if (nvme_ns_update(ns) != 0) { 1969 SPDK_ERRLOG("Failed to update active NS %u\n", nsid); 1970 continue; 1971 } 1972 } 1973 1974 if ((nsdata->ncap == 0) && ns_is_active) { 1975 if (nvme_ns_construct(ns, nsid, ctrlr) != 0) { 1976 continue; 1977 } 1978 } 1979 1980 if (nsdata->ncap && !ns_is_active) { 1981 nvme_ns_destruct(ns); 1982 } 1983 } 1984 } 1985 1986 static int 1987 nvme_ctrlr_construct_namespaces(struct spdk_nvme_ctrlr *ctrlr) 1988 { 1989 int rc = 0; 1990 uint32_t nn = ctrlr->cdata.nn; 1991 1992 /* ctrlr->num_ns may be 0 (startup) or a different number of namespaces (reset), 1993 * so check if we need to reallocate. 1994 */ 1995 if (nn != ctrlr->num_ns) { 1996 nvme_ctrlr_destruct_namespaces(ctrlr); 1997 1998 if (nn == 0) { 1999 SPDK_WARNLOG("controller has 0 namespaces\n"); 2000 return 0; 2001 } 2002 2003 ctrlr->ns = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns), 64, NULL, 2004 SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2005 if (ctrlr->ns == NULL) { 2006 rc = -ENOMEM; 2007 goto fail; 2008 } 2009 2010 ctrlr->nsdata = spdk_zmalloc(nn * sizeof(struct spdk_nvme_ns_data), 64, 2011 NULL, SPDK_ENV_SOCKET_ID_ANY, 2012 SPDK_MALLOC_SHARE | SPDK_MALLOC_DMA); 2013 if (ctrlr->nsdata == NULL) { 2014 rc = -ENOMEM; 2015 goto fail; 2016 } 2017 2018 ctrlr->num_ns = nn; 2019 } 2020 2021 return 0; 2022 2023 fail: 2024 nvme_ctrlr_destruct_namespaces(ctrlr); 2025 return rc; 2026 } 2027 2028 static void 2029 nvme_ctrlr_async_event_cb(void *arg, const struct spdk_nvme_cpl *cpl) 2030 { 2031 struct nvme_async_event_request *aer = arg; 2032 struct spdk_nvme_ctrlr *ctrlr = aer->ctrlr; 2033 struct spdk_nvme_ctrlr_process *active_proc; 2034 union spdk_nvme_async_event_completion event; 2035 int rc; 2036 2037 if (cpl->status.sct == SPDK_NVME_SCT_GENERIC && 2038 cpl->status.sc == SPDK_NVME_SC_ABORTED_SQ_DELETION) { 2039 /* 2040 * This is simulated when controller is being shut down, to 2041 * effectively abort outstanding asynchronous event requests 2042 * and make sure all memory is freed. Do not repost the 2043 * request in this case. 2044 */ 2045 return; 2046 } 2047 2048 if (cpl->status.sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 2049 cpl->status.sc == SPDK_NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED) { 2050 /* 2051 * SPDK will only send as many AERs as the device says it supports, 2052 * so this status code indicates an out-of-spec device. Do not repost 2053 * the request in this case. 2054 */ 2055 SPDK_ERRLOG("Controller appears out-of-spec for asynchronous event request\n" 2056 "handling. Do not repost this AER.\n"); 2057 return; 2058 } 2059 2060 event.raw = cpl->cdw0; 2061 if ((event.bits.async_event_type == SPDK_NVME_ASYNC_EVENT_TYPE_NOTICE) && 2062 (event.bits.async_event_info == SPDK_NVME_ASYNC_EVENT_NS_ATTR_CHANGED)) { 2063 rc = nvme_ctrlr_identify_active_ns(ctrlr); 2064 if (rc) { 2065 return; 2066 } 2067 nvme_ctrlr_update_namespaces(ctrlr); 2068 } 2069 2070 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 2071 if (active_proc && active_proc->aer_cb_fn) { 2072 active_proc->aer_cb_fn(active_proc->aer_cb_arg, cpl); 2073 } 2074 2075 /* If the ctrlr was removed or in the destruct state, we should not send aer again */ 2076 if (ctrlr->is_removed || ctrlr->is_destructed) { 2077 return; 2078 } 2079 2080 /* 2081 * Repost another asynchronous event request to replace the one 2082 * that just completed. 2083 */ 2084 if (nvme_ctrlr_construct_and_submit_aer(ctrlr, aer)) { 2085 /* 2086 * We can't do anything to recover from a failure here, 2087 * so just print a warning message and leave the AER unsubmitted. 2088 */ 2089 SPDK_ERRLOG("resubmitting AER failed!\n"); 2090 } 2091 } 2092 2093 static int 2094 nvme_ctrlr_construct_and_submit_aer(struct spdk_nvme_ctrlr *ctrlr, 2095 struct nvme_async_event_request *aer) 2096 { 2097 struct nvme_request *req; 2098 2099 aer->ctrlr = ctrlr; 2100 req = nvme_allocate_request_null(ctrlr->adminq, nvme_ctrlr_async_event_cb, aer); 2101 aer->req = req; 2102 if (req == NULL) { 2103 return -1; 2104 } 2105 2106 req->cmd.opc = SPDK_NVME_OPC_ASYNC_EVENT_REQUEST; 2107 return nvme_ctrlr_submit_admin_request(ctrlr, req); 2108 } 2109 2110 static void 2111 nvme_ctrlr_configure_aer_done(void *arg, const struct spdk_nvme_cpl *cpl) 2112 { 2113 struct nvme_async_event_request *aer; 2114 int rc; 2115 uint32_t i; 2116 struct spdk_nvme_ctrlr *ctrlr = (struct spdk_nvme_ctrlr *)arg; 2117 2118 if (spdk_nvme_cpl_is_error(cpl)) { 2119 SPDK_NOTICELOG("nvme_ctrlr_configure_aer failed!\n"); 2120 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2121 ctrlr->opts.admin_timeout_ms); 2122 return; 2123 } 2124 2125 /* aerl is a zero-based value, so we need to add 1 here. */ 2126 ctrlr->num_aers = spdk_min(NVME_MAX_ASYNC_EVENTS, (ctrlr->cdata.aerl + 1)); 2127 2128 for (i = 0; i < ctrlr->num_aers; i++) { 2129 aer = &ctrlr->aer[i]; 2130 rc = nvme_ctrlr_construct_and_submit_aer(ctrlr, aer); 2131 if (rc) { 2132 SPDK_ERRLOG("nvme_ctrlr_construct_and_submit_aer failed!\n"); 2133 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2134 return; 2135 } 2136 } 2137 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES, 2138 ctrlr->opts.admin_timeout_ms); 2139 } 2140 2141 static int 2142 nvme_ctrlr_configure_aer(struct spdk_nvme_ctrlr *ctrlr) 2143 { 2144 union spdk_nvme_feat_async_event_configuration config; 2145 int rc; 2146 2147 config.raw = 0; 2148 config.bits.crit_warn.bits.available_spare = 1; 2149 config.bits.crit_warn.bits.temperature = 1; 2150 config.bits.crit_warn.bits.device_reliability = 1; 2151 config.bits.crit_warn.bits.read_only = 1; 2152 config.bits.crit_warn.bits.volatile_memory_backup = 1; 2153 2154 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 2, 0)) { 2155 if (ctrlr->cdata.oaes.ns_attribute_notices) { 2156 config.bits.ns_attr_notice = 1; 2157 } 2158 if (ctrlr->cdata.oaes.fw_activation_notices) { 2159 config.bits.fw_activation_notice = 1; 2160 } 2161 } 2162 if (ctrlr->vs.raw >= SPDK_NVME_VERSION(1, 3, 0) && ctrlr->cdata.lpa.telemetry) { 2163 config.bits.telemetry_log_notice = 1; 2164 } 2165 2166 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER, 2167 ctrlr->opts.admin_timeout_ms); 2168 2169 rc = nvme_ctrlr_cmd_set_async_event_config(ctrlr, config, 2170 nvme_ctrlr_configure_aer_done, 2171 ctrlr); 2172 if (rc != 0) { 2173 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ERROR, NVME_TIMEOUT_INFINITE); 2174 return rc; 2175 } 2176 2177 return 0; 2178 } 2179 2180 struct spdk_nvme_ctrlr_process * 2181 spdk_nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr, pid_t pid) 2182 { 2183 struct spdk_nvme_ctrlr_process *active_proc; 2184 2185 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2186 if (active_proc->pid == pid) { 2187 return active_proc; 2188 } 2189 } 2190 2191 return NULL; 2192 } 2193 2194 struct spdk_nvme_ctrlr_process * 2195 spdk_nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr) 2196 { 2197 return spdk_nvme_ctrlr_get_process(ctrlr, getpid()); 2198 } 2199 2200 /** 2201 * This function will be called when a process is using the controller. 2202 * 1. For the primary process, it is called when constructing the controller. 2203 * 2. For the secondary process, it is called at probing the controller. 2204 * Note: will check whether the process is already added for the same process. 2205 */ 2206 int 2207 nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle) 2208 { 2209 struct spdk_nvme_ctrlr_process *ctrlr_proc; 2210 pid_t pid = getpid(); 2211 2212 /* Check whether the process is already added or not */ 2213 if (spdk_nvme_ctrlr_get_process(ctrlr, pid)) { 2214 return 0; 2215 } 2216 2217 /* Initialize the per process properties for this ctrlr */ 2218 ctrlr_proc = spdk_zmalloc(sizeof(struct spdk_nvme_ctrlr_process), 2219 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE); 2220 if (ctrlr_proc == NULL) { 2221 SPDK_ERRLOG("failed to allocate memory to track the process props\n"); 2222 2223 return -1; 2224 } 2225 2226 ctrlr_proc->is_primary = spdk_process_is_primary(); 2227 ctrlr_proc->pid = pid; 2228 STAILQ_INIT(&ctrlr_proc->active_reqs); 2229 ctrlr_proc->devhandle = devhandle; 2230 ctrlr_proc->ref = 0; 2231 TAILQ_INIT(&ctrlr_proc->allocated_io_qpairs); 2232 2233 TAILQ_INSERT_TAIL(&ctrlr->active_procs, ctrlr_proc, tailq); 2234 2235 return 0; 2236 } 2237 2238 /** 2239 * This function will be called when the process detaches the controller. 2240 * Note: the ctrlr_lock must be held when calling this function. 2241 */ 2242 static void 2243 nvme_ctrlr_remove_process(struct spdk_nvme_ctrlr *ctrlr, 2244 struct spdk_nvme_ctrlr_process *proc) 2245 { 2246 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2247 2248 assert(STAILQ_EMPTY(&proc->active_reqs)); 2249 2250 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2251 spdk_nvme_ctrlr_free_io_qpair(qpair); 2252 } 2253 2254 TAILQ_REMOVE(&ctrlr->active_procs, proc, tailq); 2255 2256 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 2257 spdk_pci_device_detach(proc->devhandle); 2258 } 2259 2260 spdk_free(proc); 2261 } 2262 2263 /** 2264 * This function will be called when the process exited unexpectedly 2265 * in order to free any incomplete nvme request, allocated IO qpairs 2266 * and allocated memory. 2267 * Note: the ctrlr_lock must be held when calling this function. 2268 */ 2269 static void 2270 nvme_ctrlr_cleanup_process(struct spdk_nvme_ctrlr_process *proc) 2271 { 2272 struct nvme_request *req, *tmp_req; 2273 struct spdk_nvme_qpair *qpair, *tmp_qpair; 2274 2275 STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) { 2276 STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq); 2277 2278 assert(req->pid == proc->pid); 2279 2280 nvme_free_request(req); 2281 } 2282 2283 TAILQ_FOREACH_SAFE(qpair, &proc->allocated_io_qpairs, per_process_tailq, tmp_qpair) { 2284 TAILQ_REMOVE(&proc->allocated_io_qpairs, qpair, per_process_tailq); 2285 2286 /* 2287 * The process may have been killed while some qpairs were in their 2288 * completion context. Clear that flag here to allow these IO 2289 * qpairs to be deleted. 2290 */ 2291 qpair->in_completion_context = 0; 2292 2293 qpair->no_deletion_notification_needed = 1; 2294 2295 spdk_nvme_ctrlr_free_io_qpair(qpair); 2296 } 2297 2298 spdk_free(proc); 2299 } 2300 2301 /** 2302 * This function will be called when destructing the controller. 2303 * 1. There is no more admin request on this controller. 2304 * 2. Clean up any left resource allocation when its associated process is gone. 2305 */ 2306 void 2307 nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr) 2308 { 2309 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2310 2311 /* Free all the processes' properties and make sure no pending admin IOs */ 2312 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2313 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2314 2315 assert(STAILQ_EMPTY(&active_proc->active_reqs)); 2316 2317 spdk_free(active_proc); 2318 } 2319 } 2320 2321 /** 2322 * This function will be called when any other process attaches or 2323 * detaches the controller in order to cleanup those unexpectedly 2324 * terminated processes. 2325 * Note: the ctrlr_lock must be held when calling this function. 2326 */ 2327 static int 2328 nvme_ctrlr_remove_inactive_proc(struct spdk_nvme_ctrlr *ctrlr) 2329 { 2330 struct spdk_nvme_ctrlr_process *active_proc, *tmp; 2331 int active_proc_count = 0; 2332 2333 TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) { 2334 if ((kill(active_proc->pid, 0) == -1) && (errno == ESRCH)) { 2335 SPDK_ERRLOG("process %d terminated unexpected\n", active_proc->pid); 2336 2337 TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq); 2338 2339 nvme_ctrlr_cleanup_process(active_proc); 2340 } else { 2341 active_proc_count++; 2342 } 2343 } 2344 2345 return active_proc_count; 2346 } 2347 2348 void 2349 nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr) 2350 { 2351 struct spdk_nvme_ctrlr_process *active_proc; 2352 2353 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2354 2355 nvme_ctrlr_remove_inactive_proc(ctrlr); 2356 2357 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 2358 if (active_proc) { 2359 active_proc->ref++; 2360 } 2361 2362 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2363 } 2364 2365 void 2366 nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr) 2367 { 2368 struct spdk_nvme_ctrlr_process *active_proc; 2369 int proc_count; 2370 2371 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2372 2373 proc_count = nvme_ctrlr_remove_inactive_proc(ctrlr); 2374 2375 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 2376 if (active_proc) { 2377 active_proc->ref--; 2378 assert(active_proc->ref >= 0); 2379 2380 /* 2381 * The last active process will be removed at the end of 2382 * the destruction of the controller. 2383 */ 2384 if (active_proc->ref == 0 && proc_count != 1) { 2385 nvme_ctrlr_remove_process(ctrlr, active_proc); 2386 } 2387 } 2388 2389 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2390 } 2391 2392 int 2393 nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr) 2394 { 2395 struct spdk_nvme_ctrlr_process *active_proc; 2396 int ref = 0; 2397 2398 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2399 2400 nvme_ctrlr_remove_inactive_proc(ctrlr); 2401 2402 TAILQ_FOREACH(active_proc, &ctrlr->active_procs, tailq) { 2403 ref += active_proc->ref; 2404 } 2405 2406 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2407 2408 return ref; 2409 } 2410 2411 /** 2412 * Get the PCI device handle which is only visible to its associated process. 2413 */ 2414 struct spdk_pci_device * 2415 nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr) 2416 { 2417 struct spdk_nvme_ctrlr_process *active_proc; 2418 struct spdk_pci_device *devhandle = NULL; 2419 2420 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2421 2422 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 2423 if (active_proc) { 2424 devhandle = active_proc->devhandle; 2425 } 2426 2427 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2428 2429 return devhandle; 2430 } 2431 2432 /** 2433 * This function will be called repeatedly during initialization until the controller is ready. 2434 */ 2435 int 2436 nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr) 2437 { 2438 union spdk_nvme_cc_register cc; 2439 union spdk_nvme_csts_register csts; 2440 uint32_t ready_timeout_in_ms; 2441 int rc = 0; 2442 2443 /* 2444 * May need to avoid accessing any register on the target controller 2445 * for a while. Return early without touching the FSM. 2446 * Check sleep_timeout_tsc > 0 for unit test. 2447 */ 2448 if ((ctrlr->sleep_timeout_tsc > 0) && 2449 (spdk_get_ticks() <= ctrlr->sleep_timeout_tsc)) { 2450 return 0; 2451 } 2452 ctrlr->sleep_timeout_tsc = 0; 2453 2454 if (nvme_ctrlr_get_cc(ctrlr, &cc) || 2455 nvme_ctrlr_get_csts(ctrlr, &csts)) { 2456 if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE) { 2457 /* While a device is resetting, it may be unable to service MMIO reads 2458 * temporarily. Allow for this case. 2459 */ 2460 SPDK_ERRLOG("Get registers failed while waiting for CSTS.RDY == 0\n"); 2461 goto init_timeout; 2462 } 2463 SPDK_ERRLOG("Failed to read CC and CSTS in state %d\n", ctrlr->state); 2464 return -EIO; 2465 } 2466 2467 ready_timeout_in_ms = 500 * ctrlr->cap.bits.to; 2468 2469 /* 2470 * Check if the current initialization step is done or has timed out. 2471 */ 2472 switch (ctrlr->state) { 2473 case NVME_CTRLR_STATE_INIT_DELAY: 2474 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, ready_timeout_in_ms); 2475 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_INIT) { 2476 /* 2477 * Controller may need some delay before it's enabled. 2478 * 2479 * This is a workaround for an issue where the PCIe-attached NVMe controller 2480 * is not ready after VFIO reset. We delay the initialization rather than the 2481 * enabling itself, because this is required only for the very first enabling 2482 * - directly after a VFIO reset. 2483 */ 2484 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Adding 2 second delay before initializing the controller\n"); 2485 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2000 * spdk_get_ticks_hz() / 1000); 2486 } 2487 break; 2488 2489 case NVME_CTRLR_STATE_INIT: 2490 /* Begin the hardware initialization by making sure the controller is disabled. */ 2491 if (cc.bits.en) { 2492 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1\n"); 2493 /* 2494 * Controller is currently enabled. We need to disable it to cause a reset. 2495 * 2496 * If CC.EN = 1 && CSTS.RDY = 0, the controller is in the process of becoming ready. 2497 * Wait for the ready bit to be 1 before disabling the controller. 2498 */ 2499 if (csts.bits.rdy == 0) { 2500 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 0 - waiting for reset to complete\n"); 2501 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2502 return 0; 2503 } 2504 2505 /* CC.EN = 1 && CSTS.RDY == 1, so we can immediately disable the controller. */ 2506 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 0\n"); 2507 cc.bits.en = 0; 2508 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2509 SPDK_ERRLOG("set_cc() failed\n"); 2510 return -EIO; 2511 } 2512 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2513 2514 /* 2515 * Wait 2.5 seconds before accessing PCI registers. 2516 * Not using sleep() to avoid blocking other controller's initialization. 2517 */ 2518 if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) { 2519 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Applying quirk: delay 2.5 seconds before reading registers\n"); 2520 ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2500 * spdk_get_ticks_hz() / 1000); 2521 } 2522 return 0; 2523 } else { 2524 if (csts.bits.rdy == 1) { 2525 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 0 && CSTS.RDY = 1 - waiting for shutdown to complete\n"); 2526 } 2527 2528 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2529 return 0; 2530 } 2531 break; 2532 2533 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1: 2534 if (csts.bits.rdy == 1) { 2535 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 1 - disabling controller\n"); 2536 /* CC.EN = 1 && CSTS.RDY = 1, so we can set CC.EN = 0 now. */ 2537 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 0\n"); 2538 cc.bits.en = 0; 2539 if (nvme_ctrlr_set_cc(ctrlr, &cc)) { 2540 SPDK_ERRLOG("set_cc() failed\n"); 2541 return -EIO; 2542 } 2543 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); 2544 return 0; 2545 } 2546 break; 2547 2548 case NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0: 2549 if (csts.bits.rdy == 0) { 2550 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 0 && CSTS.RDY = 0\n"); 2551 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE, ready_timeout_in_ms); 2552 /* 2553 * Delay 100us before setting CC.EN = 1. Some NVMe SSDs miss CC.EN getting 2554 * set to 1 if it is too soon after CSTS.RDY is reported as 0. 2555 */ 2556 spdk_delay_us(100); 2557 return 0; 2558 } 2559 break; 2560 2561 case NVME_CTRLR_STATE_ENABLE: 2562 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Setting CC.EN = 1\n"); 2563 rc = nvme_ctrlr_enable(ctrlr); 2564 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1, ready_timeout_in_ms); 2565 return rc; 2566 2567 case NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1: 2568 if (csts.bits.rdy == 1) { 2569 SPDK_DEBUGLOG(SPDK_LOG_NVME, "CC.EN = 1 && CSTS.RDY = 1 - controller is ready\n"); 2570 /* 2571 * The controller has been enabled. 2572 * Perform the rest of initialization serially. 2573 */ 2574 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_RESET_ADMIN_QUEUE, 2575 ctrlr->opts.admin_timeout_ms); 2576 return 0; 2577 } 2578 break; 2579 2580 case NVME_CTRLR_STATE_RESET_ADMIN_QUEUE: 2581 nvme_transport_qpair_reset(ctrlr->adminq); 2582 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY, 2583 ctrlr->opts.admin_timeout_ms); 2584 break; 2585 2586 case NVME_CTRLR_STATE_IDENTIFY: 2587 rc = nvme_ctrlr_identify(ctrlr); 2588 break; 2589 2590 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY: 2591 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2592 break; 2593 2594 case NVME_CTRLR_STATE_SET_NUM_QUEUES: 2595 nvme_ctrlr_update_nvmf_ioccsz(ctrlr); 2596 rc = nvme_ctrlr_set_num_queues(ctrlr); 2597 break; 2598 2599 case NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES: 2600 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2601 break; 2602 2603 case NVME_CTRLR_STATE_CONSTRUCT_NS: 2604 rc = nvme_ctrlr_construct_namespaces(ctrlr); 2605 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS, 2606 ctrlr->opts.admin_timeout_ms); 2607 break; 2608 2609 case NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS: 2610 _nvme_ctrlr_identify_active_ns(ctrlr); 2611 break; 2612 2613 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS: 2614 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2615 break; 2616 2617 case NVME_CTRLR_STATE_IDENTIFY_NS: 2618 rc = nvme_ctrlr_identify_namespaces(ctrlr); 2619 break; 2620 2621 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS: 2622 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2623 break; 2624 2625 case NVME_CTRLR_STATE_IDENTIFY_ID_DESCS: 2626 rc = nvme_ctrlr_identify_id_desc_namespaces(ctrlr); 2627 break; 2628 2629 case NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS: 2630 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2631 break; 2632 2633 case NVME_CTRLR_STATE_CONFIGURE_AER: 2634 rc = nvme_ctrlr_configure_aer(ctrlr); 2635 break; 2636 2637 case NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER: 2638 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2639 break; 2640 2641 case NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES: 2642 rc = nvme_ctrlr_set_supported_log_pages(ctrlr); 2643 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES, 2644 ctrlr->opts.admin_timeout_ms); 2645 break; 2646 2647 case NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES: 2648 nvme_ctrlr_set_supported_features(ctrlr); 2649 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_SET_DB_BUF_CFG, 2650 ctrlr->opts.admin_timeout_ms); 2651 break; 2652 2653 case NVME_CTRLR_STATE_SET_DB_BUF_CFG: 2654 rc = nvme_ctrlr_set_doorbell_buffer_config(ctrlr); 2655 break; 2656 2657 case NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG: 2658 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2659 break; 2660 2661 case NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT: 2662 rc = nvme_ctrlr_set_keep_alive_timeout(ctrlr); 2663 break; 2664 2665 case NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT: 2666 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2667 break; 2668 2669 case NVME_CTRLR_STATE_SET_HOST_ID: 2670 rc = nvme_ctrlr_set_host_id(ctrlr); 2671 break; 2672 2673 case NVME_CTRLR_STATE_WAIT_FOR_HOST_ID: 2674 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2675 break; 2676 2677 case NVME_CTRLR_STATE_READY: 2678 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Ctrlr already in ready state\n"); 2679 return 0; 2680 2681 case NVME_CTRLR_STATE_ERROR: 2682 SPDK_ERRLOG("Ctrlr %s is in error state\n", ctrlr->trid.traddr); 2683 return -1; 2684 2685 default: 2686 assert(0); 2687 return -1; 2688 } 2689 2690 init_timeout: 2691 if (ctrlr->state_timeout_tsc != NVME_TIMEOUT_INFINITE && 2692 spdk_get_ticks() > ctrlr->state_timeout_tsc) { 2693 SPDK_ERRLOG("Initialization timed out in state %d\n", ctrlr->state); 2694 return -1; 2695 } 2696 2697 return rc; 2698 } 2699 2700 int 2701 nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx) 2702 { 2703 pthread_mutexattr_t attr; 2704 int rc = 0; 2705 2706 if (pthread_mutexattr_init(&attr)) { 2707 return -1; 2708 } 2709 if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) || 2710 #ifndef __FreeBSD__ 2711 pthread_mutexattr_setrobust(&attr, PTHREAD_MUTEX_ROBUST) || 2712 pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) || 2713 #endif 2714 pthread_mutex_init(mtx, &attr)) { 2715 rc = -1; 2716 } 2717 pthread_mutexattr_destroy(&attr); 2718 return rc; 2719 } 2720 2721 int 2722 nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr) 2723 { 2724 int rc; 2725 2726 if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE) { 2727 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT_DELAY, NVME_TIMEOUT_INFINITE); 2728 } else { 2729 nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_INIT, NVME_TIMEOUT_INFINITE); 2730 } 2731 2732 if (ctrlr->opts.admin_queue_size > SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES) { 2733 SPDK_ERRLOG("admin_queue_size %u exceeds max defined by NVMe spec, use max value\n", 2734 ctrlr->opts.admin_queue_size); 2735 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MAX_ENTRIES; 2736 } 2737 2738 if (ctrlr->opts.admin_queue_size < SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES) { 2739 SPDK_ERRLOG("admin_queue_size %u is less than minimum defined by NVMe spec, use min value\n", 2740 ctrlr->opts.admin_queue_size); 2741 ctrlr->opts.admin_queue_size = SPDK_NVME_ADMIN_QUEUE_MIN_ENTRIES; 2742 } 2743 2744 ctrlr->flags = 0; 2745 ctrlr->free_io_qids = NULL; 2746 ctrlr->is_resetting = false; 2747 ctrlr->is_failed = false; 2748 ctrlr->is_destructed = false; 2749 2750 TAILQ_INIT(&ctrlr->active_io_qpairs); 2751 STAILQ_INIT(&ctrlr->queued_aborts); 2752 ctrlr->outstanding_aborts = 0; 2753 2754 rc = nvme_robust_mutex_init_recursive_shared(&ctrlr->ctrlr_lock); 2755 if (rc != 0) { 2756 return rc; 2757 } 2758 2759 TAILQ_INIT(&ctrlr->active_procs); 2760 2761 return rc; 2762 } 2763 2764 /* This function should be called once at ctrlr initialization to set up constant properties. */ 2765 void 2766 nvme_ctrlr_init_cap(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cap_register *cap, 2767 const union spdk_nvme_vs_register *vs) 2768 { 2769 ctrlr->cap = *cap; 2770 ctrlr->vs = *vs; 2771 2772 if (ctrlr->cap.bits.ams & SPDK_NVME_CAP_AMS_WRR) { 2773 ctrlr->flags |= SPDK_NVME_CTRLR_WRR_SUPPORTED; 2774 } 2775 2776 ctrlr->min_page_size = 1u << (12 + ctrlr->cap.bits.mpsmin); 2777 2778 /* For now, always select page_size == min_page_size. */ 2779 ctrlr->page_size = ctrlr->min_page_size; 2780 2781 ctrlr->opts.io_queue_size = spdk_max(ctrlr->opts.io_queue_size, SPDK_NVME_IO_QUEUE_MIN_ENTRIES); 2782 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, MAX_IO_QUEUE_ENTRIES); 2783 ctrlr->opts.io_queue_size = spdk_min(ctrlr->opts.io_queue_size, ctrlr->cap.bits.mqes + 1u); 2784 2785 ctrlr->opts.io_queue_requests = spdk_max(ctrlr->opts.io_queue_requests, ctrlr->opts.io_queue_size); 2786 } 2787 2788 void 2789 nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr) 2790 { 2791 pthread_mutex_destroy(&ctrlr->ctrlr_lock); 2792 } 2793 2794 void 2795 nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr) 2796 { 2797 struct spdk_nvme_qpair *qpair, *tmp; 2798 2799 SPDK_DEBUGLOG(SPDK_LOG_NVME, "Prepare to destruct SSD: %s\n", ctrlr->trid.traddr); 2800 2801 ctrlr->is_destructed = true; 2802 2803 spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2804 nvme_transport_admin_qpair_abort_aers(ctrlr->adminq); 2805 2806 TAILQ_FOREACH_SAFE(qpair, &ctrlr->active_io_qpairs, tailq, tmp) { 2807 spdk_nvme_ctrlr_free_io_qpair(qpair); 2808 } 2809 2810 nvme_ctrlr_free_doorbell_buffer(ctrlr); 2811 2812 if (ctrlr->opts.no_shn_notification) { 2813 SPDK_INFOLOG(SPDK_LOG_NVME, "Disable SSD: %s without shutdown notification\n", 2814 ctrlr->trid.traddr); 2815 nvme_ctrlr_disable(ctrlr); 2816 } else { 2817 nvme_ctrlr_shutdown(ctrlr); 2818 } 2819 2820 nvme_ctrlr_destruct_namespaces(ctrlr); 2821 2822 spdk_bit_array_free(&ctrlr->free_io_qids); 2823 2824 nvme_transport_ctrlr_destruct(ctrlr); 2825 } 2826 2827 int 2828 nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr, 2829 struct nvme_request *req) 2830 { 2831 return nvme_qpair_submit_request(ctrlr->adminq, req); 2832 } 2833 2834 static void 2835 nvme_keep_alive_completion(void *cb_ctx, const struct spdk_nvme_cpl *cpl) 2836 { 2837 /* Do nothing */ 2838 } 2839 2840 /* 2841 * Check if we need to send a Keep Alive command. 2842 * Caller must hold ctrlr->ctrlr_lock. 2843 */ 2844 static void 2845 nvme_ctrlr_keep_alive(struct spdk_nvme_ctrlr *ctrlr) 2846 { 2847 uint64_t now; 2848 struct nvme_request *req; 2849 struct spdk_nvme_cmd *cmd; 2850 int rc; 2851 2852 now = spdk_get_ticks(); 2853 if (now < ctrlr->next_keep_alive_tick) { 2854 return; 2855 } 2856 2857 req = nvme_allocate_request_null(ctrlr->adminq, nvme_keep_alive_completion, NULL); 2858 if (req == NULL) { 2859 return; 2860 } 2861 2862 cmd = &req->cmd; 2863 cmd->opc = SPDK_NVME_OPC_KEEP_ALIVE; 2864 2865 rc = nvme_ctrlr_submit_admin_request(ctrlr, req); 2866 if (rc != 0) { 2867 SPDK_ERRLOG("Submitting Keep Alive failed\n"); 2868 } 2869 2870 ctrlr->next_keep_alive_tick = now + ctrlr->keep_alive_interval_ticks; 2871 } 2872 2873 int32_t 2874 spdk_nvme_ctrlr_process_admin_completions(struct spdk_nvme_ctrlr *ctrlr) 2875 { 2876 int32_t num_completions; 2877 int32_t rc; 2878 2879 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 2880 2881 if (ctrlr->keep_alive_interval_ticks) { 2882 nvme_ctrlr_keep_alive(ctrlr); 2883 } 2884 2885 rc = nvme_io_msg_process(ctrlr); 2886 if (rc < 0) { 2887 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2888 return rc; 2889 } 2890 num_completions = rc; 2891 2892 rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0); 2893 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 2894 2895 if (rc < 0) { 2896 num_completions = rc; 2897 } else { 2898 num_completions += rc; 2899 } 2900 2901 return num_completions; 2902 } 2903 2904 const struct spdk_nvme_ctrlr_data * 2905 spdk_nvme_ctrlr_get_data(struct spdk_nvme_ctrlr *ctrlr) 2906 { 2907 return &ctrlr->cdata; 2908 } 2909 2910 union spdk_nvme_csts_register spdk_nvme_ctrlr_get_regs_csts(struct spdk_nvme_ctrlr *ctrlr) 2911 { 2912 union spdk_nvme_csts_register csts; 2913 2914 if (nvme_ctrlr_get_csts(ctrlr, &csts)) { 2915 csts.raw = 0xFFFFFFFFu; 2916 } 2917 return csts; 2918 } 2919 2920 union spdk_nvme_cap_register spdk_nvme_ctrlr_get_regs_cap(struct spdk_nvme_ctrlr *ctrlr) 2921 { 2922 return ctrlr->cap; 2923 } 2924 2925 union spdk_nvme_vs_register spdk_nvme_ctrlr_get_regs_vs(struct spdk_nvme_ctrlr *ctrlr) 2926 { 2927 return ctrlr->vs; 2928 } 2929 2930 union spdk_nvme_cmbsz_register spdk_nvme_ctrlr_get_regs_cmbsz(struct spdk_nvme_ctrlr *ctrlr) 2931 { 2932 union spdk_nvme_cmbsz_register cmbsz; 2933 2934 if (nvme_ctrlr_get_cmbsz(ctrlr, &cmbsz)) { 2935 cmbsz.raw = 0; 2936 } 2937 2938 return cmbsz; 2939 } 2940 2941 uint32_t 2942 spdk_nvme_ctrlr_get_num_ns(struct spdk_nvme_ctrlr *ctrlr) 2943 { 2944 return ctrlr->num_ns; 2945 } 2946 2947 static int32_t 2948 nvme_ctrlr_active_ns_idx(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 2949 { 2950 int32_t result = -1; 2951 2952 if (ctrlr->active_ns_list == NULL || nsid == 0 || nsid > ctrlr->num_ns) { 2953 return result; 2954 } 2955 2956 int32_t lower = 0; 2957 int32_t upper = ctrlr->num_ns - 1; 2958 int32_t mid; 2959 2960 while (lower <= upper) { 2961 mid = lower + (upper - lower) / 2; 2962 if (ctrlr->active_ns_list[mid] == nsid) { 2963 result = mid; 2964 break; 2965 } else { 2966 if (ctrlr->active_ns_list[mid] != 0 && ctrlr->active_ns_list[mid] < nsid) { 2967 lower = mid + 1; 2968 } else { 2969 upper = mid - 1; 2970 } 2971 2972 } 2973 } 2974 2975 return result; 2976 } 2977 2978 bool 2979 spdk_nvme_ctrlr_is_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 2980 { 2981 return nvme_ctrlr_active_ns_idx(ctrlr, nsid) != -1; 2982 } 2983 2984 uint32_t 2985 spdk_nvme_ctrlr_get_first_active_ns(struct spdk_nvme_ctrlr *ctrlr) 2986 { 2987 return ctrlr->active_ns_list ? ctrlr->active_ns_list[0] : 0; 2988 } 2989 2990 uint32_t 2991 spdk_nvme_ctrlr_get_next_active_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t prev_nsid) 2992 { 2993 int32_t nsid_idx = nvme_ctrlr_active_ns_idx(ctrlr, prev_nsid); 2994 if (ctrlr->active_ns_list && nsid_idx >= 0 && (uint32_t)nsid_idx < ctrlr->num_ns - 1) { 2995 return ctrlr->active_ns_list[nsid_idx + 1]; 2996 } 2997 return 0; 2998 } 2999 3000 struct spdk_nvme_ns * 3001 spdk_nvme_ctrlr_get_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3002 { 3003 if (nsid < 1 || nsid > ctrlr->num_ns) { 3004 return NULL; 3005 } 3006 3007 return &ctrlr->ns[nsid - 1]; 3008 } 3009 3010 struct spdk_pci_device * 3011 spdk_nvme_ctrlr_get_pci_device(struct spdk_nvme_ctrlr *ctrlr) 3012 { 3013 if (ctrlr == NULL) { 3014 return NULL; 3015 } 3016 3017 if (ctrlr->trid.trtype != SPDK_NVME_TRANSPORT_PCIE) { 3018 return NULL; 3019 } 3020 3021 return nvme_ctrlr_proc_get_devhandle(ctrlr); 3022 } 3023 3024 uint32_t 3025 spdk_nvme_ctrlr_get_max_xfer_size(const struct spdk_nvme_ctrlr *ctrlr) 3026 { 3027 return ctrlr->max_xfer_size; 3028 } 3029 3030 void 3031 spdk_nvme_ctrlr_register_aer_callback(struct spdk_nvme_ctrlr *ctrlr, 3032 spdk_nvme_aer_cb aer_cb_fn, 3033 void *aer_cb_arg) 3034 { 3035 struct spdk_nvme_ctrlr_process *active_proc; 3036 3037 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3038 3039 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 3040 if (active_proc) { 3041 active_proc->aer_cb_fn = aer_cb_fn; 3042 active_proc->aer_cb_arg = aer_cb_arg; 3043 } 3044 3045 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3046 } 3047 3048 void 3049 spdk_nvme_ctrlr_register_timeout_callback(struct spdk_nvme_ctrlr *ctrlr, 3050 uint64_t timeout_us, spdk_nvme_timeout_cb cb_fn, void *cb_arg) 3051 { 3052 struct spdk_nvme_ctrlr_process *active_proc; 3053 3054 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3055 3056 active_proc = spdk_nvme_ctrlr_get_current_process(ctrlr); 3057 if (active_proc) { 3058 active_proc->timeout_ticks = timeout_us * spdk_get_ticks_hz() / 1000000ULL; 3059 active_proc->timeout_cb_fn = cb_fn; 3060 active_proc->timeout_cb_arg = cb_arg; 3061 } 3062 3063 ctrlr->timeout_enabled = true; 3064 3065 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3066 } 3067 3068 bool 3069 spdk_nvme_ctrlr_is_log_page_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t log_page) 3070 { 3071 /* No bounds check necessary, since log_page is uint8_t and log_page_supported has 256 entries */ 3072 SPDK_STATIC_ASSERT(sizeof(ctrlr->log_page_supported) == 256, "log_page_supported size mismatch"); 3073 return ctrlr->log_page_supported[log_page]; 3074 } 3075 3076 bool 3077 spdk_nvme_ctrlr_is_feature_supported(struct spdk_nvme_ctrlr *ctrlr, uint8_t feature_code) 3078 { 3079 /* No bounds check necessary, since feature_code is uint8_t and feature_supported has 256 entries */ 3080 SPDK_STATIC_ASSERT(sizeof(ctrlr->feature_supported) == 256, "feature_supported size mismatch"); 3081 return ctrlr->feature_supported[feature_code]; 3082 } 3083 3084 int 3085 spdk_nvme_ctrlr_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3086 struct spdk_nvme_ctrlr_list *payload) 3087 { 3088 struct nvme_completion_poll_status *status; 3089 int res; 3090 struct spdk_nvme_ns *ns; 3091 3092 status = calloc(1, sizeof(*status)); 3093 if (!status) { 3094 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3095 return -ENOMEM; 3096 } 3097 3098 res = nvme_ctrlr_cmd_attach_ns(ctrlr, nsid, payload, 3099 nvme_completion_poll_cb, status); 3100 if (res) { 3101 free(status); 3102 return res; 3103 } 3104 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3105 SPDK_ERRLOG("spdk_nvme_ctrlr_attach_ns failed!\n"); 3106 if (!status->timed_out) { 3107 free(status); 3108 } 3109 return -ENXIO; 3110 } 3111 free(status); 3112 3113 res = nvme_ctrlr_identify_active_ns(ctrlr); 3114 if (res) { 3115 return res; 3116 } 3117 3118 ns = &ctrlr->ns[nsid - 1]; 3119 return nvme_ns_construct(ns, nsid, ctrlr); 3120 } 3121 3122 int 3123 spdk_nvme_ctrlr_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3124 struct spdk_nvme_ctrlr_list *payload) 3125 { 3126 struct nvme_completion_poll_status *status; 3127 int res; 3128 struct spdk_nvme_ns *ns; 3129 3130 status = calloc(1, sizeof(*status)); 3131 if (!status) { 3132 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3133 return -ENOMEM; 3134 } 3135 3136 res = nvme_ctrlr_cmd_detach_ns(ctrlr, nsid, payload, 3137 nvme_completion_poll_cb, status); 3138 if (res) { 3139 free(status); 3140 return res; 3141 } 3142 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3143 SPDK_ERRLOG("spdk_nvme_ctrlr_detach_ns failed!\n"); 3144 if (!status->timed_out) { 3145 free(status); 3146 } 3147 return -ENXIO; 3148 } 3149 free(status); 3150 3151 res = nvme_ctrlr_identify_active_ns(ctrlr); 3152 if (res) { 3153 return res; 3154 } 3155 3156 ns = &ctrlr->ns[nsid - 1]; 3157 /* Inactive NS */ 3158 nvme_ns_destruct(ns); 3159 3160 return 0; 3161 } 3162 3163 uint32_t 3164 spdk_nvme_ctrlr_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload) 3165 { 3166 struct nvme_completion_poll_status *status; 3167 int res; 3168 uint32_t nsid; 3169 struct spdk_nvme_ns *ns; 3170 3171 status = calloc(1, sizeof(*status)); 3172 if (!status) { 3173 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3174 return 0; 3175 } 3176 3177 res = nvme_ctrlr_cmd_create_ns(ctrlr, payload, nvme_completion_poll_cb, status); 3178 if (res) { 3179 free(status); 3180 return 0; 3181 } 3182 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3183 SPDK_ERRLOG("spdk_nvme_ctrlr_create_ns failed!\n"); 3184 if (!status->timed_out) { 3185 free(status); 3186 } 3187 return 0; 3188 } 3189 3190 nsid = status->cpl.cdw0; 3191 ns = &ctrlr->ns[nsid - 1]; 3192 free(status); 3193 /* Inactive NS */ 3194 res = nvme_ns_construct(ns, nsid, ctrlr); 3195 if (res) { 3196 return 0; 3197 } 3198 3199 /* Return the namespace ID that was created */ 3200 return nsid; 3201 } 3202 3203 int 3204 spdk_nvme_ctrlr_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid) 3205 { 3206 struct nvme_completion_poll_status *status; 3207 int res; 3208 struct spdk_nvme_ns *ns; 3209 3210 status = calloc(1, sizeof(*status)); 3211 if (!status) { 3212 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3213 return -ENOMEM; 3214 } 3215 3216 res = nvme_ctrlr_cmd_delete_ns(ctrlr, nsid, nvme_completion_poll_cb, status); 3217 if (res) { 3218 free(status); 3219 return res; 3220 } 3221 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3222 SPDK_ERRLOG("spdk_nvme_ctrlr_delete_ns failed!\n"); 3223 if (!status->timed_out) { 3224 free(status); 3225 } 3226 return -ENXIO; 3227 } 3228 free(status); 3229 3230 res = nvme_ctrlr_identify_active_ns(ctrlr); 3231 if (res) { 3232 return res; 3233 } 3234 3235 ns = &ctrlr->ns[nsid - 1]; 3236 nvme_ns_destruct(ns); 3237 3238 return 0; 3239 } 3240 3241 int 3242 spdk_nvme_ctrlr_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, 3243 struct spdk_nvme_format *format) 3244 { 3245 struct nvme_completion_poll_status *status; 3246 int res; 3247 3248 status = calloc(1, sizeof(*status)); 3249 if (!status) { 3250 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3251 return -ENOMEM; 3252 } 3253 3254 res = nvme_ctrlr_cmd_format(ctrlr, nsid, format, nvme_completion_poll_cb, 3255 status); 3256 if (res) { 3257 free(status); 3258 return res; 3259 } 3260 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3261 SPDK_ERRLOG("spdk_nvme_ctrlr_format failed!\n"); 3262 if (!status->timed_out) { 3263 free(status); 3264 } 3265 return -ENXIO; 3266 } 3267 free(status); 3268 3269 return spdk_nvme_ctrlr_reset(ctrlr); 3270 } 3271 3272 int 3273 spdk_nvme_ctrlr_update_firmware(struct spdk_nvme_ctrlr *ctrlr, void *payload, uint32_t size, 3274 int slot, enum spdk_nvme_fw_commit_action commit_action, struct spdk_nvme_status *completion_status) 3275 { 3276 struct spdk_nvme_fw_commit fw_commit; 3277 struct nvme_completion_poll_status *status; 3278 int res; 3279 unsigned int size_remaining; 3280 unsigned int offset; 3281 unsigned int transfer; 3282 void *p; 3283 3284 if (!completion_status) { 3285 return -EINVAL; 3286 } 3287 memset(completion_status, 0, sizeof(struct spdk_nvme_status)); 3288 if (size % 4) { 3289 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid size!\n"); 3290 return -1; 3291 } 3292 3293 /* Current support only for SPDK_NVME_FW_COMMIT_REPLACE_IMG 3294 * and SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG 3295 */ 3296 if ((commit_action != SPDK_NVME_FW_COMMIT_REPLACE_IMG) && 3297 (commit_action != SPDK_NVME_FW_COMMIT_REPLACE_AND_ENABLE_IMG)) { 3298 SPDK_ERRLOG("spdk_nvme_ctrlr_update_firmware invalid command!\n"); 3299 return -1; 3300 } 3301 3302 status = calloc(1, sizeof(*status)); 3303 if (!status) { 3304 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3305 return -ENOMEM; 3306 } 3307 3308 /* Firmware download */ 3309 size_remaining = size; 3310 offset = 0; 3311 p = payload; 3312 3313 while (size_remaining > 0) { 3314 transfer = spdk_min(size_remaining, ctrlr->min_page_size); 3315 3316 memset(status, 0, sizeof(*status)); 3317 res = nvme_ctrlr_cmd_fw_image_download(ctrlr, transfer, offset, p, 3318 nvme_completion_poll_cb, 3319 status); 3320 if (res) { 3321 free(status); 3322 return res; 3323 } 3324 3325 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3326 SPDK_ERRLOG("spdk_nvme_ctrlr_fw_image_download failed!\n"); 3327 if (!status->timed_out) { 3328 free(status); 3329 } 3330 return -ENXIO; 3331 } 3332 p += transfer; 3333 offset += transfer; 3334 size_remaining -= transfer; 3335 } 3336 3337 /* Firmware commit */ 3338 memset(&fw_commit, 0, sizeof(struct spdk_nvme_fw_commit)); 3339 fw_commit.fs = slot; 3340 fw_commit.ca = commit_action; 3341 3342 memset(status, 0, sizeof(*status)); 3343 res = nvme_ctrlr_cmd_fw_commit(ctrlr, &fw_commit, nvme_completion_poll_cb, 3344 status); 3345 if (res) { 3346 free(status); 3347 return res; 3348 } 3349 3350 res = spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock); 3351 3352 memcpy(completion_status, &status->cpl.status, sizeof(struct spdk_nvme_status)); 3353 3354 if (!status->timed_out) { 3355 free(status); 3356 } 3357 3358 if (res) { 3359 if (completion_status->sct != SPDK_NVME_SCT_COMMAND_SPECIFIC || 3360 completion_status->sc != SPDK_NVME_SC_FIRMWARE_REQ_NVM_RESET) { 3361 if (completion_status->sct == SPDK_NVME_SCT_COMMAND_SPECIFIC && 3362 completion_status->sc == SPDK_NVME_SC_FIRMWARE_REQ_CONVENTIONAL_RESET) { 3363 SPDK_NOTICELOG("firmware activation requires conventional reset to be performed. !\n"); 3364 } else { 3365 SPDK_ERRLOG("nvme_ctrlr_cmd_fw_commit failed!\n"); 3366 } 3367 return -ENXIO; 3368 } 3369 } 3370 3371 return spdk_nvme_ctrlr_reset(ctrlr); 3372 } 3373 3374 int 3375 spdk_nvme_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr) 3376 { 3377 int rc, size; 3378 union spdk_nvme_cmbsz_register cmbsz; 3379 3380 cmbsz = spdk_nvme_ctrlr_get_regs_cmbsz(ctrlr); 3381 3382 if (cmbsz.bits.rds == 0 || cmbsz.bits.wds == 0) { 3383 return -ENOTSUP; 3384 } 3385 3386 size = cmbsz.bits.sz * (0x1000 << (cmbsz.bits.szu * 4)); 3387 3388 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3389 rc = nvme_transport_ctrlr_reserve_cmb(ctrlr); 3390 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3391 3392 if (rc < 0) { 3393 return rc; 3394 } 3395 3396 return size; 3397 } 3398 3399 void * 3400 spdk_nvme_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size) 3401 { 3402 void *buf; 3403 3404 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3405 buf = nvme_transport_ctrlr_map_cmb(ctrlr, size); 3406 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3407 3408 return buf; 3409 } 3410 3411 void 3412 spdk_nvme_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr) 3413 { 3414 nvme_robust_mutex_lock(&ctrlr->ctrlr_lock); 3415 nvme_transport_ctrlr_unmap_cmb(ctrlr); 3416 nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock); 3417 } 3418 3419 bool 3420 spdk_nvme_ctrlr_is_discovery(struct spdk_nvme_ctrlr *ctrlr) 3421 { 3422 assert(ctrlr); 3423 3424 return !strncmp(ctrlr->trid.subnqn, SPDK_NVMF_DISCOVERY_NQN, 3425 strlen(SPDK_NVMF_DISCOVERY_NQN)); 3426 } 3427 3428 int 3429 spdk_nvme_ctrlr_security_receive(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3430 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3431 { 3432 struct nvme_completion_poll_status *status; 3433 int res; 3434 3435 status = calloc(1, sizeof(*status)); 3436 if (!status) { 3437 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3438 return -ENOMEM; 3439 } 3440 3441 res = spdk_nvme_ctrlr_cmd_security_receive(ctrlr, secp, spsp, nssf, payload, size, 3442 nvme_completion_poll_cb, status); 3443 if (res) { 3444 free(status); 3445 return res; 3446 } 3447 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3448 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_receive failed!\n"); 3449 if (!status->timed_out) { 3450 free(status); 3451 } 3452 return -ENXIO; 3453 } 3454 free(status); 3455 3456 return 0; 3457 } 3458 3459 int 3460 spdk_nvme_ctrlr_security_send(struct spdk_nvme_ctrlr *ctrlr, uint8_t secp, 3461 uint16_t spsp, uint8_t nssf, void *payload, size_t size) 3462 { 3463 struct nvme_completion_poll_status *status; 3464 int res; 3465 3466 status = calloc(1, sizeof(*status)); 3467 if (!status) { 3468 SPDK_ERRLOG("Failed to allocate status tracker\n"); 3469 return -ENOMEM; 3470 } 3471 3472 res = spdk_nvme_ctrlr_cmd_security_send(ctrlr, secp, spsp, nssf, payload, size, 3473 nvme_completion_poll_cb, 3474 status); 3475 if (res) { 3476 free(status); 3477 return res; 3478 } 3479 if (spdk_nvme_wait_for_completion_robust_lock(ctrlr->adminq, status, &ctrlr->ctrlr_lock)) { 3480 SPDK_ERRLOG("spdk_nvme_ctrlr_cmd_security_send failed!\n"); 3481 if (!status->timed_out) { 3482 free(status); 3483 } 3484 return -ENXIO; 3485 } 3486 3487 free(status); 3488 3489 return 0; 3490 } 3491 3492 uint64_t 3493 spdk_nvme_ctrlr_get_flags(struct spdk_nvme_ctrlr *ctrlr) 3494 { 3495 return ctrlr->flags; 3496 } 3497 3498 const struct spdk_nvme_transport_id * 3499 spdk_nvme_ctrlr_get_transport_id(struct spdk_nvme_ctrlr *ctrlr) 3500 { 3501 return &ctrlr->trid; 3502 } 3503 3504 /* FIXME need to specify max number of iovs */ 3505 int 3506 spdk_nvme_map_prps(void *prv, struct spdk_nvme_cmd *cmd, struct iovec *iovs, 3507 uint32_t len, size_t mps, 3508 void *(*gpa_to_vva)(void *prv, uint64_t addr, uint64_t len)) 3509 { 3510 uint64_t prp1, prp2; 3511 void *vva; 3512 uint32_t i; 3513 uint32_t residue_len, nents; 3514 uint64_t *prp_list; 3515 int iovcnt; 3516 3517 prp1 = cmd->dptr.prp.prp1; 3518 prp2 = cmd->dptr.prp.prp2; 3519 3520 /* PRP1 may started with unaligned page address */ 3521 residue_len = mps - (prp1 % mps); 3522 residue_len = spdk_min(len, residue_len); 3523 3524 vva = gpa_to_vva(prv, prp1, residue_len); 3525 if (spdk_unlikely(vva == NULL)) { 3526 SPDK_ERRLOG("GPA to VVA failed\n"); 3527 return -1; 3528 } 3529 iovs[0].iov_base = vva; 3530 iovs[0].iov_len = residue_len; 3531 len -= residue_len; 3532 3533 if (len) { 3534 if (spdk_unlikely(prp2 == 0)) { 3535 SPDK_ERRLOG("no PRP2, %d remaining\n", len); 3536 return -1; 3537 } 3538 3539 if (len <= mps) { 3540 /* 2 PRP used */ 3541 iovcnt = 2; 3542 vva = gpa_to_vva(prv, prp2, len); 3543 if (spdk_unlikely(vva == NULL)) { 3544 SPDK_ERRLOG("no VVA for %#lx, len%#x\n", 3545 prp2, len); 3546 return -1; 3547 } 3548 iovs[1].iov_base = vva; 3549 iovs[1].iov_len = len; 3550 } else { 3551 /* PRP list used */ 3552 nents = (len + mps - 1) / mps; 3553 vva = gpa_to_vva(prv, prp2, nents * sizeof(*prp_list)); 3554 if (spdk_unlikely(vva == NULL)) { 3555 SPDK_ERRLOG("no VVA for %#lx, nents=%#x\n", 3556 prp2, nents); 3557 return -1; 3558 } 3559 prp_list = vva; 3560 i = 0; 3561 while (len != 0) { 3562 residue_len = spdk_min(len, mps); 3563 vva = gpa_to_vva(prv, prp_list[i], residue_len); 3564 if (spdk_unlikely(vva == NULL)) { 3565 SPDK_ERRLOG("no VVA for %#lx, residue_len=%#x\n", 3566 prp_list[i], residue_len); 3567 return -1; 3568 } 3569 iovs[i + 1].iov_base = vva; 3570 iovs[i + 1].iov_len = residue_len; 3571 len -= residue_len; 3572 i++; 3573 } 3574 iovcnt = i + 1; 3575 } 3576 } else { 3577 /* 1 PRP used */ 3578 iovcnt = 1; 3579 } 3580 3581 return iovcnt; 3582 } 3583